JP2005136836A - Multiplication oscillation circuit and radio communication apparatus using same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multiplication oscillation circuit capable of realizing a small and low-cost filter circuit to be installed at a poststage of the circuit for the purpose of suppression of unwanted wave, and provide a radio communication apparatus using the same. <P>SOLUTION: The multiplication oscillation circuit has: a fundamental frequency oscillation circuit 4 which oscillates a fundamental frequency signal; an active element 6 for multiplication which outputs a multiplication frequency signal obtained by performing integer multiple of the fundamental frequency signal of the fundamental frequency oscillation circuit 4; and a filter circuit 3 for multiplication which is connected to the output side of the active element 6 for multiplication and selects a frequency signal of a desired band from the multiplication frequency signal of the active element 6 for multiplication, wherein the filter circuit 3 for multiplication includes: a first series resonance element 34 of a distribution constant type which performs series resonance with frequency of the fundamental frequency signal; a parallel resonance element 35 which performs parallel resonance with the multiplication frequency obtained by performing integer multiple of the frequency of the fundamental frequency signal; and a second series resonance element 36 of the distribution constant type which performs the series resonance with frequency of unnecessary waves. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a multiplication oscillation circuit that outputs an oscillation output of a fundamental frequency signal oscillated from a fundamental frequency oscillation circuit by integer multiplication, and more particularly, a multiplication oscillation circuit having a filter circuit that suppresses unnecessary waves, and wireless communication using the same It relates to the device.

  In general, a multiplying oscillation circuit that is used in a wireless communication device or the like and outputs an oscillation output of a fundamental frequency signal that is an integer multiple, oscillates the fundamental frequency signal that is the base, and then amplifies the harmonic components contained in the fundamental frequency signal After that, it has a multiplication circuit that performs a series of operations for extracting the harmonic components in the desired band. Further, the multiplier oscillation circuit has a filter circuit that suppresses unnecessary waves (spurious) other than the desired harmonic component.

  For example, the microwave multiplier disclosed in Patent Document 1 includes a multiplier circuit 15 and a buffer amplifier circuit 16 that amplifies the multiplied wave output by the multiplier circuit 15 to a desired power level. A lumped constant high-pass filter is provided on the bias line on the output side of the multiplier circuit 15 and the buffer amplifier circuit 16 to suppress unnecessary waves. This lumped-constant high-pass filter includes tip short-circuited stubs 21a and 21b having an electrical length of ¼ wavelength of the fundamental frequency signal, inductors 23a and 23b provided at the output of the multiplier circuit 15, and a capacitor 24. Yes.

  However, a multiplying oscillation circuit in which additional components or additional patterns such as stubs and lumped constant filters are provided in the subsequent stage of the circuit causes insertion loss when used in a band of about 1 GHz to 10 GHz. When the insertion loss is large, the output of the multiplier oscillation circuit is reduced, and the output level difference (spurious ratio) between the desired harmonic component and the unnecessary wave is reduced, and the output includes the unnecessary component. . Furthermore, it also causes signal quality degradation such as phase noise and jitter. Therefore, it is necessary to separately prepare an amplifier for compensating for the decrease in output at the subsequent stage of the filter circuit, and there is a problem that current consumption, size, and cost increase.

On the other hand, for example, in the multiplier of Patent Document 2, the lumped constant type coil L2 and the capacitors C1 and C2 are connected to the subsequent stage of the field effect transistor Q1 as an active element for multiplication that multiplies the fundamental frequency signal by an integer. A series-parallel resonant circuit constituted by a single lumped constant element is provided. The series-parallel resonant circuit resonates in series with the frequency of the fundamental frequency signal to reduce the fundamental frequency component, and parallel resonates with the frequency of the desired harmonic component to pass the desired harmonic component.
Japanese Patent Laid-Open No. 10-4319 (second page, FIG. 1) JP-A-5-102728 (second page, FIG. 1)

  However, the high-order unnecessary generated by the multiplier circuit is only required by the series-parallel resonant circuit using the lumped constant type three elements including the inductance element L2 and the capacitive elements C1 and C2 as used in the multiplier of Patent Document 2. There is a problem that waves (high-order harmonic components) cannot be suppressed. In addition, although it is a lumped constant type three element, when mounting on a chip component, it is necessary to secure the size of the component land and the mounting clearance between components, which hinders miniaturization. Further, there is an insertion loss, and the problem mentioned in Patent Document 1 still remains.

  The present invention has been made in order to solve the above-described problems, and uses a multiplying oscillation circuit capable of realizing a small and low-cost filter circuit installed at a subsequent stage of the circuit for the purpose of suppressing unnecessary waves, and the same. An object is to provide a wireless communication device.

[Invention 1] A multiplication oscillator circuit of Invention 1 includes a fundamental frequency oscillation circuit that oscillates a fundamental frequency signal, an active element for multiplication that outputs a multiplication frequency signal that is an integral multiple of the fundamental frequency signal of the fundamental frequency oscillation circuit, A multiplication oscillation circuit connected to the output side of the multiplication active element and having a multiplication filter circuit for selecting a frequency signal of a desired band from the multiplication frequency signal of the multiplication active element, wherein the multiplication filter circuit is a fundamental frequency signal Distributed constant type first series resonant element that series-resonates at a certain frequency, a parallel resonant circuit that performs parallel resonance at a frequency multiplied by an integer multiple of the frequency of the fundamental frequency signal, and a distribution that series-resonates at the frequency of the unwanted wave And a constant type second series resonant element.

In this invention 1, the fundamental frequency signal is attenuated by the series resonance phenomenon of the distributed constant type first series resonant element, and the unnecessary wave is attenuated by the series resonance phenomenon of the distributed constant type second series resonant element. On the other hand, the frequency signal of the desired band selectively passes through the multiplication filter circuit due to the parallel resonance phenomenon of the parallel resonance circuit. Since the first and second series resonant elements are formed in a distributed constant type, a multiplication filter circuit can be formed with a relatively simple configuration, and the multiplication filter circuit can be made small and low cost. Therefore, the multiplying oscillation circuit having this multiplying filter circuit can be made small and at low cost.
[Invention 2] In the multiplication oscillator circuit of Invention 2, the first series resonant element has one end connected to the transmission line extending from the multiplication active element and the other end opened, and has a quarter wavelength of the fundamental frequency signal. The first open stub has an electrical length, and the second series resonant element has one end connected to a transmission line extending from the multiplication active element and the other end opened, and has an electrical length of ¼ wavelength of an unnecessary wave. Second open stub. Therefore, the multiplication filter circuit can be formed with a relatively simple configuration, and can be formed on the substrate by a microstrip line, for example. Therefore, the multiplication filter circuit can be realized at low cost.
[Invention 3] Further, in the multiplying oscillation circuit of Invention 3, the parallel resonant circuit is connected at one end to the transmission line of the active element for multiplication, the other end is grounded, and at a multiplying frequency obtained by multiplying the frequency of the fundamental frequency signal by an integer. A capacitor that resonates in parallel with the inductor component of the first open stub. Therefore, it is possible to easily set the capacity for parallel resonance with the inductor component of the first open stub, and the design cost can be reduced and the frequency signal in the desired band can be accurately passed. Therefore, a highly reliable multiplication filter circuit can be obtained.
[Invention 4] Furthermore, in the multiplying oscillation circuit of Invention 4, the fundamental frequency oscillation circuit oscillates a fundamental frequency signal in the gigahertz band, and the parallel resonant circuit has a predetermined parasitic capacitance and has a fundamental frequency signal. This is a transmission line that performs parallel resonance with the inductor component of the first open stub at a multiplied frequency that is an integral multiple of the frequency of. Therefore, the number of components is reduced and the configuration of the multiplication filter circuit is simplified, and the multiplication filter circuit can be realized in a small size and at low cost. The multiplication oscillation circuit having the multiplication filter circuit can be reduced in size and cost. Can be produced.
[Invention 5] A wireless communication apparatus according to Invention 5 includes the multiplying oscillation circuit according to any one of [Invention 1] to [Invention 4] described above.

In the fifth aspect of the invention, since the wireless communication device is configured using a small and low-cost multiplying oscillation circuit, the wireless communication device itself can also be reduced in size and cost.
[Invention 6] The wireless communication device of Invention 6 further includes a transmission / reception switch connected to an antenna, and the above-mentioned [Invention 1] to [Invention 4] that modulates a transmission signal connected to the transmission side of the transmission / reception switch. ], A transmission circuit having a power amplifier that amplifies the modulation signal modulated by the multiplication oscillation circuit, and a reception band of the desired band from the received modulation signal connected to the reception side of the transmission / reception switch A receiving circuit having a filter for selecting a high frequency modulated wave, a low noise amplifier for amplifying the filter output of the filter, and a demodulating circuit for demodulating the amplified output of the low noise amplifier;

  In the sixth aspect of the invention, the wireless communication apparatus uses the power amplifier to transmit the modulated signal, which is modulated by using the multiplier circuit according to any one of [Invention 1] to [Invention 4] described above. Amplified and transmitted from the antenna via the transmission / reception switcher, the minute received signal received by the antenna is sent to the receiving circuit via the transmission / reception switcher, and a high-frequency modulated wave in the desired band is extracted and extracted by the filter Since the generated high frequency modulated wave is amplified by the low noise amplifier and demodulated by the demodulation circuit, a simple wireless communication device can be provided using the direct oscillation method.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a first embodiment of a multiplier oscillation circuit of the present invention. In FIG. 1, a multiplication oscillation circuit 1 is connected to a multiplication oscillation circuit body 2 that outputs a multiplication frequency signal that is an integral multiple of a fundamental frequency signal, and an output side of the multiplication oscillation circuit body 2 and outputs the multiplication oscillation circuit body 2. And a multiplication filter circuit 3 for selecting a frequency signal in a desired band from the multiplication frequency signal.

The multiplier oscillation circuit body 2 includes a voltage-controlled oscillator 4 as a fundamental frequency oscillator circuit, a fundamental frequency matching circuit 5 as a first matching circuit, an active element 6 for multiplication, and a multiplication frequency as a second matching circuit. And a matching circuit 7.
The configuration of the multiplier oscillation circuit body 2 will be described in more detail. The voltage controlled oscillator 4 oscillates a fundamental frequency signal having a predetermined frequency. The fundamental frequency signal oscillated from the voltage controlled oscillator 4 is supplied to the fundamental frequency matching circuit 5 and impedance-matched to the fundamental frequency. The matching output outputted from the fundamental frequency matching circuit 5 is multiplied by an integral multiple of the fundamental frequency by the multiplication active element 6. Further, the frequency signal multiplied by the multiplication active element 6 is supplied to the multiplication frequency matching circuit 7 and impedance-matched to a multiplication frequency that is an integral multiple of the fundamental frequency.

  Of the configuration of the multiplier oscillation circuit body 2, the voltage-controlled oscillator 4 will be described first. FIG. 2 is a block diagram showing details of the voltage controlled oscillator 4 of FIG. In FIG. 2, the voltage-controlled oscillator 4 has an oscillation amplifier 41. Further, a divider 43, a frequency adjustment circuit 46, an elastic surface are provided in a feedback circuit between the output side and the input side of the oscillation amplifier 41. And a wave resonator 47. The power output from the oscillation amplifier 41 is distributed by the distributor 43 into two systems. One distribution output is output to the output terminal 42, and the other distribution output is fed back to the surface acoustic wave resonator 47 via the frequency adjustment circuit 46. The frequency adjustment circuit 46 includes a phase shifter 44 and a phase adjustment circuit 45.

Next, the multiplication active element 6 will be described. Although not shown, for example, a bipolar transistor is used as the multiplication active element 6 that multiplies the matching output outputted from the fundamental frequency matching circuit 5 to an integral multiple of the fundamental frequency.
Next, the multiplication filter circuit 3 will be described.
FIG. 3 is a circuit diagram showing details of the multiplication filter circuit 3. In FIG. 3, the multiplication filter circuit 3 has an output transmission line (transmission line) 33 extending from an input terminal 31 (which is also an output terminal of the multiplication oscillation circuit body 2) to an output terminal 32 of the multiplication oscillation circuit 1. . Further, a first open stub 34 as a first series resonant element connected to the output transmission line 33, a capacitor 35 as a parallel resonant circuit, and a second open stub as a second series resonant element. 36.

The first open stub 34 has one end connected to the input terminal 31 at the intermediate portion of the output transmission line 33 and the other end opened, and has an electrical length of ¼ wavelength of the fundamental frequency signal. The second open stub 36 has one end connected to the output terminal 32 side at the intermediate portion of the output transmission line 33 and the other end opened, and has an electrical length of ¼ wavelength of an unnecessary wave.
FIG. 4 is an explanatory diagram for explaining the operation of the first open stub 34. FIG. 4 is a diagram for explaining the operation, and does not necessarily indicate the present embodiment. The open stub 34 is formed on a substrate 38 by a microstrip line, for example, and has a distributed constant circuit configuration. Since the open stub 34 is open at the tip, the voltage amplitude is maximized at the tip. In addition, since the open stub 34 is set to have an electrical length of ¼ wavelength of the frequency signal to be suppressed at the center frequency as described above, the tip of the stub 34 and the root thereof have a phase difference of 90 degrees. It becomes. Since the voltage amplitude becomes maximum at the tip, the voltage amplitude becomes zero at the base. Therefore, the root of the stub 34 behaves as if it is GND with respect to the fundamental frequency signal (f1) to be suppressed, and the passage of the fundamental frequency signal (f1) is suppressed. The second open stub 36 has a distributed constant circuit configuration similar to that of the first open stub 34 except that the electrical length is ¼ wavelength of the unnecessary wave.

  Although not shown in the drawing, the capacitor 35 is mounted as a chip capacitor on a substrate, for example. The capacitor 35 is provided between the open stubs 34 and 36 with one end connected to the output transmission line 33 and the other end grounded (FIG. 3). The capacitor 35 is set so as to perform parallel resonance with the inductor component of the first open stub 34 at a desired multiplied frequency obtained by multiplying the fundamental frequency signal by an integer. Due to this parallel resonance phenomenon, the output transmission line 33 passes the output of the multiplied frequency.

Here, the frequency (f1) of the fundamental frequency signal output from the voltage controlled oscillator 4 is set to 2.9 GHz, the desired multiplied frequency (f2) is set to 5.8 GHz which is twice the fundamental frequency (f1), and unnecessary waves are generated. When the frequency (f3) is 8.7 GHz, which is three times the basic frequency (f1), specific design dimensions and circuit constants are as follows, for example.
Substrate thickness: 0.5mm
Substrate dielectric constant: 10
Dielectric loss: 0.4%
Dimensions of first open stub 34: width 0.4 mm, length 9.85 mm
Capacitance value of the capacitor 35: 0.4 pF
Dimensions of second open stub 35: width 0.4 mm, length 3.1 mm
FIG. 5 is a pass characteristic diagram of the filter circuit of the specific configuration example described above. The horizontal axis represents frequency [GHz], and the vertical axis represents insertion loss [dB]. As shown in FIG. 5, a sufficient attenuation characteristic is first obtained at 2.9 GHz (point A in FIG. 5), which is the fundamental frequency (f1). This is an effect of the first open stub 34. More specifically, this is because the frequency (fs) determined by the series resonance phenomenon caused by the inductor component Ls and the capacitor component Cs of the first open stub 34 matches the fundamental frequency signal (f1). That is, the first open stub 34 resonates in series at the fundamental frequency (f1) and suppresses the passage of the fundamental frequency signal (f1). This fs is expressed by the following equation.

  In addition, at 5.8 GHz (point B in FIG. 5) at which the desired multiplied frequency (f2) is obtained, the attenuation amount is almost zero, and the filter circuit passes the doubled frequency component of the fundamental frequency signal (f1). This is because the frequency (fp) determined by the parallel resonance phenomenon of the capacitor component Cs of the first open stub 34 and Cp of the capacitor 35 grounded at one end coincides with the double frequency component (f2). is there. This fp is expressed by the following equation.

Further, at the third harmonic frequency 8.7 GHz (point C in FIG. 5) which is the frequency (f3) of the unnecessary wave, sufficient attenuation characteristics appear as in the case of f1. This is an effect of the second open stub 36, and the operation is the same as that of the first open stub 34.
FIG. 6 is an output spectrum diagram in the case where the multiplication filter circuit is not connected to the multiplication oscillation circuit main body 2, and FIG. 7 is the case where the multiplication filter circuit 3 having the attenuation characteristic as described above is connected to the multiplication oscillation circuit main body 2. FIG. The horizontal axis represents frequency [GHz], and the vertical axis represents output power [dBm] of the multiplier.

  When the multiplication filter circuit 3 is not connected, as shown in FIG. 6, 5.8 GHz, which is the double frequency, has the largest output power and occupies the main spectrum component, but 2.9 GHz generated by the multiplication transistor. Spectral components of 8.7 GHz and 11.6 GHz, which are the third and higher harmonics, are output at a considerable ratio, and the unwanted wave (spurious) cannot be sufficiently suppressed.

On the other hand, when the filter circuit 3 of the invention is added as in the present embodiment, as shown in FIG. 7, the fundamental frequency (2.9 GHz) adjacent to 5.8 GHz and the higher-order harmonic components (8. 7 GHz) is sufficiently suppressed.
In the multiplication oscillation circuit 1 having such a configuration, a voltage-controlled oscillator 4 that oscillates the fundamental frequency signal (f1), an active element 6 for multiplication that outputs a multiplication frequency signal that is an integral multiple of the fundamental frequency signal (f1), and A frequency oscillating circuit having a frequency doubling filter circuit 3 for selecting a frequency signal in a desired band, and the frequency doubling filter circuit 3 has one end connected in series with the frequency of the fundamental frequency signal connected to the output transmission line 33. A first open stub 34 having the other end opened and having an electrical length of a quarter wavelength of the fundamental frequency signal (f1), one end connected to the output transmission line 33, and the other end grounded to obtain the fundamental frequency signal (f1). A capacitor 35 that resonates in parallel with the inductor component of the first open stub 34 at a multiplied frequency (f2) multiplied by an integer, and one end connected to the output transmission line 33 and the other end opened. Since it has the 2nd open stub 36 which has the electrical length of 1/4 wavelength of a wave (f3), it can fully suppress and reduce unnecessary waves (spurious) other than the frequency signal of a desired band. .

  As shown as an example, the multiplication filter circuit 3 can be simply configured by a pattern element (microstrip line) having a distributed constant circuit configuration and one chip capacitor, and is a small and space-saving filter. A circuit can be obtained, and cost reduction can be realized. Furthermore, since the insertion loss is small and the attenuation characteristic is excellent, the output of the multiplier oscillation circuit does not decrease, and the signal quality such as phase noise and jitter is not deteriorated.

In the present embodiment, the desired frequency (f2) is twice the fundamental frequency (f1) and the frequency (f3) of the unwanted wave is three times the fundamental frequency (f1). The circuit constant can be easily selected. The same applies to a multiplication oscillation circuit having a multiplication number other than this, such as a quadruple oscillation circuit or a 6-fold oscillation circuit.
Further, the multiplication oscillation circuit 1 having such a configuration is matched by matching the oscillation signal output from the voltage controlled oscillator 4 on the input side of the multiplication active element 6 with the fundamental frequency matching circuit 5 in the fundamental frequency matching circuit 5. Since the oscillation output is multiplied to an integral multiple by the multiplication active element 6 and then matched to a multiplication frequency that is an integral multiple of the fundamental frequency by the multiplication frequency matching circuit 7, the fundamental frequency signal is converted to the input side of the multiplication active element 6. It is connected to the voltage controlled oscillator 4 with the most suitable impedance, and power is efficiently transmitted to the active element 6 for multiplication, and the output side of the active element 6 for multiplication is matched to a frequency that is an integral multiple of the fundamental frequency. It is connected to a subsequent circuit by impedance, and can be efficiently extracted with a minimum loss at a desired multiplication frequency. For this reason, the conversion loss accompanying frequency multiplication is minimized, the current consumption can be reduced as a whole, the number of parts can be reduced, and the circuit size can be reduced.

In the first embodiment, the case where the voltage controlled oscillator 4 is applied as the fundamental frequency oscillation circuit has been described. However, the present invention is not limited to this, and a fixed frequency oscillator, a crystal oscillator, or the like is used. Other fundamental frequency oscillation circuits can be applied.
In the first embodiment, it has been described that, for example, a bipolar transistor is applied as the multiplication active element 6. However, the present invention is not limited to this, and a GaAs field effect transistor is applied instead of the bipolar transistor. Alternatively, other active elements may be applied.

Next, a second embodiment will be described.
FIG. 8 is a circuit diagram showing details of the multiplication filter circuit in the second embodiment of the multiplication oscillation circuit of the present invention. In FIG. 8, the multiplication filter circuit 8 of the present embodiment is omitted from the one corresponding to the capacitor 35 of the multiplication filter circuit 3 of the first embodiment. Other configurations are the same as those of the multiplication filter circuit 3 of the first embodiment. The voltage-controlled oscillator 4 as the fundamental frequency oscillation circuit of the present embodiment oscillates a fundamental frequency signal in a band of about 1 GHz to 10 GHz. When the multiplication filter circuit 3 according to the first embodiment is used in such a multiplication oscillation circuit used in the gigahertz band, the capacitance value of the capacitor 35 becomes very small and becomes the level of the parasitic capacitance of the output transmission line 33. . For this reason, the capacitor 35 can be omitted. That is, the output transmission line 33 has a predetermined parasitic capacitance, and resonates in parallel with the inductor component of the first open stub 34 at a desired multiplication frequency that is an integral multiple of the fundamental frequency signal. An output having a desired multiplied frequency is passed through the line 33.

  FIG. 9 is a pass characteristic diagram of the multiplication filter circuit 8 of the present embodiment. Similar to FIG. 5, the horizontal axis indicates the frequency [GHz], and the vertical axis indicates the insertion loss [dB]. In FIG. 9, although the insertion loss of 2.5 dB occurs at the double frequency of 5.8 GHz (point E in FIG. 9), the fundamental frequency is 2.9 GHz (see FIG. 9) as in the first embodiment. 9 midpoint D) and unnecessary wave frequency 8.7 GHz (middle point F in FIG. 9) have sufficient attenuation characteristics. Therefore, even when the multiplication filter circuit 8 of this embodiment is connected to the multiplication oscillation circuit body 2, a good output spectrum can be obtained as in the first embodiment.

  In the multiplying oscillation circuit 1 having such a configuration, the multiplying filter circuit 8 has one end that is in series resonance at the frequency of the fundamental frequency signal connected to the output transmission line 33 and the other end is opened to open the fundamental frequency signal (f1). The first open stub 34 having an electrical length of ¼ wavelength and one end of series resonance at the frequency of the unwanted wave (f3) are connected to the output transmission line 33 and the other end is opened, and 1 of the unwanted wave (f3). Since it has the second open stub 36 having an electrical length of / 4 wavelength, unnecessary waves (spurious) other than the frequency signal in the desired band are suppressed and reduced with a simpler configuration than the first embodiment. can do. Further, the multiplication filter circuit 8 can be constituted only by a pattern element (microstrip line) having a distributed constant circuit configuration, and can be made a small and space-saving filter circuit, further realizing cost reduction. can do.

Next, a third embodiment of the present invention will be described.
In the present embodiment, the present invention is applied to a direct modulation method in which a transmission signal is directly input to a voltage controlled oscillator and direct modulation is performed.
FIG. 10 is a block diagram showing a wireless communication apparatus using the multiplying oscillation circuit of the present invention. In FIG. 10, an antenna 91, a transmission / reception switch 92 connected thereto, a transmission circuit 93 connected to the transmission side of the transmission / reception switch 92, and a reception circuit 94 connected to the reception side are provided.

  The transmission circuit 93 is configured to input the transmission signal directly to the multiplication oscillation circuit 1 in the first embodiment described above, and to amplify the modulated transmission signal output from the multiplication oscillation circuit 1 by the power amplifier 95. The transmission signal output from the power amplifier 95 is supplied to the transmission / reception switch 92. Here, the multiplying oscillation circuit 1 is not limited to the case of being configured as a voltage controlled oscillator capable of varying the oscillation frequency by voltage control as in the first embodiment, but is configured as a fixed oscillator that outputs a single frequency. You may do it.

The receiving circuit 94 amplifies the band-pass filter 96 that extracts a high-frequency modulated wave in a desired band from the received modulated wave output from the transmission / reception switch 92, and the minute high-frequency modulated wave extracted by the band-pass filter 96. The low noise amplifier 97 and a demodulation circuit 98 for demodulating the amplified output of the low noise amplifier 97 are configured.
According to the third embodiment, when transmitting data, the transmission signal is input to the multiplication oscillation circuit 1, and the multiplication oscillation circuit 1 directly modulates the transmission signal to a predetermined frequency. Amplified by the power amplifier 95 and transmitted from the antenna 91 via the transmission / reception switch 92.

A minute high frequency modulated wave received by the antenna 91 is sent from the transmission / reception switch 92 to the receiving circuit 94, and a high frequency modulated wave signal of a desired frequency is extracted by the band pass filter 96, and the extracted high frequency modulated wave signal is extracted. Is amplified by the low noise amplifier 97, demodulated into an original signal by the demodulation circuit 98, and output as a received signal.
In the third embodiment, since the multiplying oscillation circuit 1 is applied as an oscillator that performs direct modulation, the overall configuration can be reduced in size and power consumption can be reduced.

1 is a block diagram showing a first embodiment of a multiplier oscillation circuit of the present invention. The block diagram which shows the detail of the voltage control type | mold oscillator of FIG. The circuit diagram which shows the detail of the filter circuit for multiplication of FIG. Explanatory drawing explaining operation | movement of an open stub. FIG. 5 is a pass characteristic diagram of the multiplication filter circuit of the first embodiment. The output spectrum figure when not connecting the filter circuit for multiplication. The output spectrum figure at the time of connecting the filter circuit for multiplication. The circuit diagram which shows the filter circuit for multiplication of 2nd Embodiment. FIG. 6 is a pass characteristic diagram of a multiplication filter circuit according to a second embodiment. The block diagram of the radio | wireless communication apparatus using the multiplication oscillation circuit of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Multiplication oscillation circuit, 2 ... Multiplication oscillation circuit main body, 3 ... Multiplication filter circuit, 4 ... Voltage controlled oscillator (basic frequency oscillation circuit), 5 ... Fundamental frequency matching circuit (1st matching circuit), 6 ... Multiplication Active element 7 ... multiplication frequency matching circuit (second matching circuit) 33 ... output transmission line (transmission line) 34 ... first open stub (first series resonant element) 35 ... capacitor (parallel resonance) Circuit), 36 ... second open stub (second series resonant element), 91 ... antenna, 92 ... transmission / reception switch, 93 ... transmission circuit, 94 ... reception circuit, 95 ... power amplifier, 96 ... band-pass filter ( Filter), 97 ... Low noise amplifier, 98 ... Demodulation circuit.

Claims (6)

A fundamental frequency oscillation circuit for oscillating a fundamental frequency signal; a multiplication active element for outputting a multiplied frequency signal obtained by multiplying the fundamental frequency signal of the fundamental frequency oscillation circuit by an integer; and an output side of the multiplication active element connected to the output side A multiplication oscillation circuit having a multiplication filter circuit for selecting a frequency signal of a desired band from the multiplication frequency signal of the multiplication active element,
The multiplication filter circuit includes: a distributed constant type first series resonance element that performs series resonance at a frequency of the fundamental frequency signal; and a parallel resonance circuit that performs parallel resonance at a multiplication frequency obtained by multiplying the frequency of the fundamental frequency signal by an integer. And a distributed constant type second series resonant element that series-resonates at the frequency of the unwanted wave.   The first series resonant element is a first open stub having one end connected to a transmission line extending from the multiplication active element and the other end opened and having an electrical length of ¼ wavelength of the fundamental frequency signal, The second series resonant element is a second open stub having one end connected to a transmission line extending from the multiplication active element and the other end opened and having an electrical length of ¼ wavelength of the unnecessary wave. 2. The multiplying oscillator circuit according to claim 1, wherein:   The parallel resonant circuit has one end connected to the transmission line of the multiplication active element, the other end is grounded, and parallel resonance with the inductor component of the first open stub at a multiplication frequency that is an integral multiple of the frequency of the fundamental frequency signal. 3. The multiplying oscillator circuit according to claim 2, wherein the frequency oscillating circuit is a capacitor.   The fundamental frequency oscillation circuit oscillates the fundamental frequency signal in a gigahertz band, and the parallel resonant circuit has a predetermined parasitic capacitance and has the frequency multiplied by an integer multiple of the frequency of the fundamental frequency signal. 3. The multiplying oscillator circuit according to claim 2, wherein the transmission line resonates in parallel with an inductor component of one open stub.   5. A wireless communication apparatus having a configuration including the multiplying oscillation circuit according to claim 1.   A transmission / reception switch connected to an antenna, a multiplication oscillator circuit according to any one of claims 1 to 4 connected to a transmission side of the transmission / reception switch, and modulated by the multiplication oscillation circuit A transmission circuit having a power amplifier for amplifying the modulation signal; a filter connected to the reception side of the transmission / reception switch; for selecting a high-frequency modulation wave in a desired band from the received modulation signal; A radio communication apparatus comprising: a noise amplifier; and a reception circuit having a demodulation circuit that demodulates an amplified output of the low noise amplifier.

Images