KR100305524B1 - Method for manufacturing a flat pannel - Google Patents

Abstract

SUMMARY OF THE INVENTION An object of the present invention is to provide a polycrystal capable of easily producing polycrystals composed of crystal grains having substantially uniform and large particle diameters, and a liquid crystal display device capable of displaying images with high image quality and excellent durability. A thin film layer made of a first material thinly deposited on a base material generates a plurality of fine crystals by using the property of agglomeration when heated to a condition that its surface is not oxidized. Two materials are deposited on a plurality of fine crystals and subjected to heat treatment to form a polycrystal.

Description

Manufacturing method of flat panel {METHOD FOR MANUFACTURING A FLAT PANNEL}

The present invention relates to a method for manufacturing a flat panel on which semiconductor elements such as liquid crystal display devices are mounted.

In general, amorphous silicon is manufactured by, for example, plasma chemical vapor deposition (CVD). This method is suitable for forming a thin film layer of amorphous silicon at low temperatures. For example, since it is possible to deposit on a glass substrate, it has been widely used as a channel layer, such as TFT (Thin Film Transistor) mounted in a liquid crystal display device. In the manufacturing process of a TFT, the process of heating an amorphous semiconductor material, melting and recrystallizing it to make a polycrystal has a great influence on the quality of the manufactured semiconductor element. For example, the mobility of electrons in the TFT of Si is only at most about 10 cm 2 / V sec when amorphous silicon is used. On the other hand, when polycrystalline silicon is used, mobility exceeding 100 cm <2> / V * sec by 1 or more digits is also realizable. Therefore, polycrystalline silicon is attracting attention as a material replacing amorphous silicon.

Background Art Conventionally, a method of forming a liquid crystal display device in which polycrystalline silicon is applied to a TFT has been subjected to a process of forming silicon polycrystal by heating amorphous silicon previously deposited on a substrate. In particular, as a method of producing polycrystalline silicon at a high speed with respect to a flat panel substrate having a large area of more than 10 inches, the ELA (Excimer Laser Annealing) method can produce the device with good productivity. This is because the ELA method scans a laser beam at a high speed of 2 mm / sec, for example, on amorphous silicon, unlike the solid state growth method, in which a substrate is introduced into a huge furnace for several hours and processed. This is because polycrystalline silicon can be formed on a large-area substrate within minutes.

However, the size of the polycrystalline crystal grains produced by the ELA method is usually about 0.1 to 0.5 탆, at most about 1 탆 even when conditions are limited, and there is a problem that uniform crystal grains cannot be obtained.

In addition, in a semiconductor device such as a TFT having polycrystalline silicon manufactured by the ELA method, in order to make the electron mobility exceed 100 cm 2 / V · sec, it is necessary to grow the polycrystal under narrow conditions in accordance with the ELA method. In addition, even if ELA is performed under these conditions, the particle diameter of the crystal grains fluctuates, and therefore, when a plurality of semiconductor elements are formed on the surface of the flat panel, the electrical characteristics become nonuniform in the plane. When a liquid crystal display device is produced using this flat panel, there is a problem that an image with high image quality cannot be displayed because the brightness of the display screen changes depending on the place.

As described above, the conventional flat panel in which the semiconductor device is formed on the entire surface of the substrate has a problem that the size of the crystal varies depending on the location of the substrate surface, and thus varies depending on the location where the performance of the semiconductor device is formed. In particular, the flat panel display has a problem that the brightness of the display screen changes depending on the in-plane location and thus the image quality is poor.

This invention is made | formed in view of the said problem, Comprising: It aims at providing the polycrystal which is comprised from the crystal grain which is substantially uniform and large particle diameter, and is excellent also in an economical viewpoint. Moreover, it aims at the uniformity of the characteristic of the semiconductor device of the flat panel in which the semiconductor element was formed in the array form on the whole surface of a board | substrate with regularity. Moreover, it aims at equalizing the brightness | luminance in the surface of the display screen of a flat panel for display purposes.

1 is a view showing one pixel of a liquid crystal display device according to a first embodiment of the present invention;

2 is a cross-sectional view of a liquid crystal display device according to a first embodiment of the present invention;

3 is a cross-sectional view of the manufacturing process sequence of the liquid crystal display device according to the first embodiment of the present invention;

4 is a cross sectional view of a semiconductor device according to a first embodiment of the present invention;

5 is a plan view during the manufacture of the flat panel according to the first embodiment of the present invention;

6 is a sectional view of a manufacturing process sequence of a comparative example;

7 is a view for explaining the performance comparison between the TFT of the first embodiment of the present invention and the TFT of the comparative example;

8 is a sectional view of a manufacturing process sequence of the liquid crystal display device according to the first embodiment of the present invention;

9 is a cross-sectional view of the manufacturing process sequence of the liquid crystal display device according to the first embodiment of the present invention;

10 is a cross-sectional view of a liquid crystal display device according to a first embodiment of the present invention;

11 is a cross-sectional view showing a liquid crystal display device according to a first embodiment of the present invention;

It is sectional drawing of the manufacturing process sequence of the flat panel which is 2nd Embodiment of this invention.

MEANS TO SOLVE THE PROBLEM In order to solve the said subject, this invention adopts the following structures.

A first film forming step of forming a first amorphous semiconductor layer having an oxygen content of 10% to 1 × 10 ^-5 % on a flat panel substrate having an insulating surface, and

An agglomeration process of heating the amorphous semiconductor layer under a condition that its surface is not oxidized to form an agglomerated crystal composed of a plurality of fine crystals,

A second film forming step of forming a second amorphous semiconductor layer so as to cover the surface of the agglomerated crystal,

A heating step of heating and melting the second amorphous semiconductor layer to form a crystallization layer using the agglomerated crystal as a nucleus, and

And a device forming step of etching a part of the crystallization layer into a matrix island region and forming a semiconductor element in the island region.

A first film forming step of forming a first amorphous semiconductor layer having an oxygen content of 10% to 1 × 10 ^-5 % on a flat panel substrate having an insulating surface, and

An agglomeration process of heating the amorphous semiconductor layer under a condition that its surface is not oxidized to form an agglomerated crystal composed of a plurality of fine crystals,

A second film forming step of forming a second amorphous semiconductor layer to cover the surface of the agglomerated crystal,

A heating step of heating and melting the second amorphous semiconductor layer to form a crystallization layer using the agglomerated crystal as a nucleus,

An element forming step of etching a part of the molten recrystallization layer into an island region of a matrix shape, and forming a semiconductor element in the island region;

A pixel electrode forming step formed on the first substrate and controlled by an applied voltage according to the semiconductor device;

Forming a second substrate on which a counter electrode is formed at a position facing the pixel electrode;

And forming a liquid crystal layer between the first substrate and the second substrate.

The flat panel demonstrated above includes a substantially flat shape even if it is a panel of a completely flat shape to a somewhat curved shape. In addition, the flat panel using a plastic substrate may be used after pasting to the curved surface after manufacture. As a result, a panel in which semiconductor elements are regularly and correctly arranged on a two-dimensional plane regardless of a flat or curved surface is referred to as a flat panel in the description of the invention.

According to the method for forming a flat panel according to the present invention, agglomerated crystals in which crystals are formed on the substrate in parallel at equal intervals are used as nuclei. The ability to form coagulation crystals correctly and relatively regularly is based on the inventors' new discoveries. By forming the molten and recrystallized layer using this agglomerated crystal as a nucleus, the shape of the crystal grain size and the like can be controlled, so that it is possible to obtain a polycrystal composed of almost uniform peak particles.

Therefore, when applied to the semiconductor device according to the present invention, it is possible to obtain a semiconductor device having almost uniform electrical characteristics from the front surface of the flat panel. In addition, when the flat panel of the present invention is applied to a liquid crystal display device in which semiconductor elements need to be arranged in an array with regularity, display characteristics such as luminance are made uniform on the display screen.

In the present invention, the first amorphous semiconductor layer thinly deposited on the substrate generates a plurality of fine crystals by using the property of agglomeration when heated to a condition that the surface thereof is not oxidized, and then a second amorphous semiconductor layer. Is deposited on agglomerated crystal phase and subjected to heat treatment to melt and solidify to form a polycrystal. Here, the mechanism of aggregation is demonstrated, compared with the polycrystallization by the conventional ELA method.

For example, in the polycrystallization of amorphous silicon using the conventional ELA method, after only amorphous silicon is formed on a substrate, the amorphous silicon is heated and melted by ELA to recrystallize the silicon. According to the conventional method, uneven initial crystal nuclei are formed at random positions on the oxide film surface. Polycrystals formed by the ELA method grow based on crystal nuclei, so that non-uniform crystal grains are finally formed. At this time, the molten silicon starts to grow from the crystal nuclei to the direction perpendicular to the temperature gradient, that is, the surface side opposite to the substrate, but also grows in the direction parallel to the substrate surface. However, since crystal grains grown from adjacent crystal nuclei stop crystal growth in parallel directions when the grain boundaries of the crystal grains come into contact with each other, the particle diameter of the crystal grains is limited according to the density of the crystal nuclei. Therefore, when polycrystals are formed on an insulating substrate by a conventional ELA method, crystal grains having irregular shapes such as grain sizes of crystal grains are formed. If a semiconductor device such as a TFT is manufactured using this polycrystal, the electrical characteristics of the TFT become uneven, and in the liquid crystal display device equipped with the TFT, the variation of the electrical characteristics of the TFT directly influences the variation of the display in each pixel. This makes it difficult to display high quality images.

On the other hand, control of the shape of crystal grains can be realized by controlling the density of the initial crystal nuclei in the course of recrystallization after the amorphous silicon is melted. When a thin film layer of silicon is deposited on a silicon oxide film and subjected to heat treatment, silicon atoms migrate on the surface of the oxide film to change the shape of the surface and form agglomerated (agglomerated) properties of granular silicon crystals. have. The inventors have found that this coagulation crystal is uniformly distributed on the substrate. Therefore, by using this property, by controlling the thickness of the thin film layer of silicon deposited on the oxide film, the temperature of the annealing and the time required for the annealing, it is possible to form silicon microcrystals in units of nm. Therefore, after silicon microcrystals are formed on the oxide film in advance, amorphous silicon is laminated on the oxide film on which silicon microcrystals are formed, and heat treatment is performed to recrystallize molten silicon using the microcrystals of silicon as nuclei (polycrystallization). Can be tried.

The annealing temperature required for the coagulation is preferably 600 ° C to 900 ° C, preferably 700 ° C to 800 ° C. The annealing time is 1 minute to 10 hours, preferably 30 minutes to 1 hour.

In this way, it is possible to achieve high performance such as electrical characteristics of a semiconductor device in which the polycrystal is applied to a channel layer (channel region). In a liquid crystal display device equipped with the semiconductor device, characteristics of each pixel are uniform and display irregularities, etc. This high resolution display can be achieved. On the other hand, the first amorphous semiconductor layer suitable for the agglomeration crystal may be a material that moves on the surface of the base material, and examples thereof include an alloy of metals such as semiconductors, metals, and metal silicides and semiconductors. Group IV elements and compounds thereof, such as SiGe, Ge, C, and SiC, and Group III-V and compounds thereof such as In, As, InAs, Ga, GaAsAl, AlAs, InAlGaAs, InAlAs, InAlP, and InP Can be applied as is. Further, as the second amorphous semiconductor layer, for example, amorphous silicon, amorphous SiGe, amorphous germanium, or the like can be applied. Moreover, as a base material, the thin film which consists of various oxides, such as a silicon oxide film, and the board | substrate whose surface is an oxide film is applicable, for example.

Here, the following are mentioned as preferable embodiment of this invention.

(1) The first amorphous semiconductor layer is selected from Si, SiGe, Ge, C, SiC, In, As, InAs, Ga, GaAsAl, AlAs, InAlGaAs, InAlAs, InAlP and InP.

(2) The second amorphous semiconductor layer is selected from amorphous silicon, amorphous SiGe, and amorphous germanium.

(3) The surface of the substrate is formed of a film selected from a silicon oxide film, a Si nitride film, an Al film, various oxide films added with F, various oxide films added with nitrogen, and a W (tungsten) film.

(3) The semiconductor element is a TFT.

(4) Annealing temperature is 600 to 900 degreeC.

(5) Annealing temperature is 700 to 800 degreeC.

(6) Annealing time is 1 minute-10 hours.

(7) Annealing time is 30 minutes-1 hour.

(8) The oxygen content of the second amorphous semiconductor layer is 10% to 1 × 10 ^-5 %.

(9) The oxygen content of the second amorphous semiconductor layer is 1% to 1x10 ^-5 %.

(10) The coagulation step is performed in an atmosphere selected from vacuum, nitrogen or an inert gas.

(11) The heating step is performed by the ELA method.

(12) Before the coagulation step, the surface of the first amorphous semiconductor layer is washed with hydrofluoric acid.

(13) In forming the first amorphous semiconductor layer, the first amorphous semiconductor layer is formed into an island shape from the mask image opened in a predetermined shape.

Embodiment of the Invention

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

First embodiment

EMBODIMENT OF THE INVENTION Below, 1st Embodiment which concerns on this invention is described in detail with reference to drawings.

1 and 2 show one pixel of the liquid crystal display device according to the first embodiment. 1 is a plan view of one pixel. 2A to 2C show an A-A 'cross section, a B-B' cross section and a C-C 'cross section of a flat panel substrate in the liquid crystal display device having the structure shown in FIG.

1 and 2, the liquid crystal display device includes an active layer (including a channel region, a source region, and a drain region) 101 of a TFT made of p-Si, and a gate insulating film positioned on the impurity electrode 102. In FIG. The gate electrode line 103 and the pixel electrode 104 which are formed as a medium are provided. The impeller electrode line 106 is connected to the impeller electrode 102 via the contact hole 107. The active layer 101 and the pixel electrode 104 are electrically connected by the electrode pattern 110 via the contact holes 108 and 109. Further, the active layer 101 and the signal line 105 are connected by the contact hole 111. Here, the gate insulating film 113 and the interlayer insulating film 124 of silicon oxide are formed on the glass substrate 123. This TFT centering on the active layer 101 is a coplanar TFT.

Here, the manufacturing process of the liquid crystal display device shown in FIG. 1 is demonstrated with reference to FIGS.

First, as shown in FIG. 3A, a silicon oxide film 124 was formed on the glass substrate 123 to have a thickness of 100 nm by plasma CVD. Next, the glass substrate 123 is introduced into an Ultra High Vacuum (UHV) -CVD apparatus, and a very flat amorphous silicon layer 125 having a thickness of 1 nm is deposited without heating the substrate 123. It was. Here, a gas 126 made of Si ₂ H ₆ was used to deposit the amorphous silicon layer 125. Specifically, the molecules of the gas 126 are thermally decomposed by an auxiliary heater provided at a position opposed to the surface of the substrate 123 in the CVD apparatus, and then supplied to the substrate 123. By this method, a thin film of silicon can be formed even at room temperature where decomposition of the gas 126 on the surface of the substrate 123 does not occur. When forming the thin film of amorphous silicon, an apparatus using UHV-CVD method (for example, see Japanese Patent Laid-Open No. 7-245263) can be suitably used. Molecular beam crystal growth (MBE) method to be heated to the substrate by heating, and plasma CVD method, ECR plasma method and gas to be supplied to the substrate by decomposing gaseous raw materials by plasma discharge It can form by the apparatus using the CVD method etc. which were provided. Even when the thin film manufactured by either apparatus is applied, the flocculation microcrystal mentioned later can be obtained. Instead of the above-mentioned amorphous silicon, a thin film made of a part or whole of silicon polycrystal may be used. Here, the most important point is to suppress the mixing of impurities such as oxygen into the thin film layer of the amorphous silicon layer 125. This is because when the amorphous silicon layer 125 contains a large amount of oxygen, silicon atoms cannot move because the migration of silicon atoms is prevented, and formation (agglomeration) of microcrystals cannot be controlled. The oxygen content of the amorphous silicon layer 125 is 10% to 1x10 ^-5 %, preferably 1% to 1x10 ^-5 %.

Then, the amorphous silicon layer 125 was stored in vacuum without being exposed to the atmosphere and heated at 830 ° C. That is, after the amorphous silicon layer 125 is formed by the UHV-CVD apparatus, the auxiliary heater for decomposing molecules constituting the gas 126 is stopped, and the heater for heating the substrate 123 is heated to raise the substrate. (123) was heated in ultra high vacuum for 3 minutes. As a result, as shown in FIG. 3B, the amorphous silicon layer 125 formed flat on the silicon oxide film 124 has a plurality of independent plurals having a maximum diameter of 40 nm and a height of about 10 nm due to the aggregation phenomenon. To become microcrystalline 127 of silicon. In addition, the intervals between the crystals were also 0.09 탆 to 0.11 탆 in parallel at equal intervals. Here, by changing the thickness and heating temperature of the amorphous silicon layer 125, it is possible to control the shape of the size of the microcrystal 127 and the like. For example, when the thickness of the amorphous silicon layer 125 is 0.5 nm and the heating temperature is 730 ° C., microcrystals having a maximum diameter of 25 nm and a height of about 2 nm can be obtained. At this time, the exposure of the amorphous silicon layer 125 before aggregation to the atmosphere is to prevent the amorphous silicon layer 125 from being oxidized in the air as described above, so that the amorphous silicon layer 125 has a high purity. If a means for preventing oxidation, such as maintaining in an atmosphere of an inert gas such as nitrogen, high purity argon, high purity helium, or the like, is not particularly necessary, it does not need to be maintained in vacuum.

If the substrate to be used does not cause mixing with the amorphous silicon layer 125 during heating, instead of the glass substrate 123 cited in the present embodiment, silicon, alkali glass, quartz, SiC, sapphire , Substrates made of various plastics, plastic films, vinyl films, and the like can be used. In these cases, the formation (agglomeration) of the microcrystals is possible. Moreover, in this embodiment, an example in which a silicon oxide film is used as the substrate material is shown, but the substrate material is a material that generates (agglomerates) microcrystals by heat treatment, migrates the surface of the substrate, and changes the shape of the surface. There is no particular limitation as long as it is changed to produce particle-shaped crystals (microcrystals). For example, a SiNx film, an Al film, various oxide films added with F, various oxide films added with nitrogen, and a W (tungsten) film, etc. Can be. When the type or composition of the gas 126 is changed and the heating conditions such as temperature and processing time are changed, hydrogenated Si gas such as SiH ₄ and Si ₃ H ₈ , various gases such as GeH ₄ and Ge ₂ H _{6 may be used} . You can also apply

3C, a 50 nm amorphous silicon layer 128 was formed on the glass substrate 123 on which the microcrystalline 127 of silicon was formed by the plasma CVD method. Thus, a structure in which microcrystalline 127 of silicon is present at the interface between the silicon oxide film 124 and the amorphous silicon layer 128 is obtained. Preferably, before forming the amorphous silicon layer 128, the silicon substrate 123 may be immersed in 0.01% of rare HF for about 1 second to remove the oxide film formed on the microcrystalline 127 of silicon. In addition, if the plasma CVD can be performed so as not to oxidize the surface of the microcrystalline 127 of silicon, for example, by an apparatus capable of transporting in an atmosphere such as nitrogen, argon, helium, hydrogen, or the like, the glass substrate 123 is diluted. It is not necessary to immerse in HF, and even if the glass substrate 123 is exposed to the atmosphere, the oxide film formed on the microcrystalline 127 of silicon may be provided under conditions such that the conveyance of the glass substrate 123 is terminated within a few hours. At most within a few microseconds and the polycrystallization using the amorphous silicon layer 128 is not disturbed.

Next, as shown in FIG. 3D, the amorphous silicon layer 128 formed on the silicon substrate 123 was melted by the ELA method to obtain a polycrystalline silicon layer made of the crystal grains 129. In this case, when producing polycrystals by the ELA method, in the air, the irradiation energy density per unit area of the XeCl laser was 340 mJ / cm 2, and the temperature of the glass substrate 123 at the time of irradiation was room temperature. As a result, the amorphous silicon layer 128 on the silicon oxide film 124 melted, and a polycrystal composed of uniform crystal grains 129 having a particle diameter of about 0.1 mu m was formed. At this time, even when the irradiation energy density per unit area of the XeCl laser was 330 mJ / cm 2, the particle diameter distribution of the crystal grains constituting the polycrystal was not changed. Therefore, in order to realize a process at a lower irradiation energy density compared to the conventional ELA method, the process margin in the ELA method using an excimer laser having a fluctuation of the output of the laser can be increased, thereby improving the yield of polycrystalline silicon. Could be achieved.

Here, an n-ch TFT having a polycrystalline silicon layer 129 according to the present invention formed by using the above manufacturing process as an active region was formed. 4 is a cross-sectional view of the TFT. Polycrystalline silicon 129 is used for the channel region 207, the source region 208, and the drain region 209. On the channel region 207 and the source / drain regions 208 and 209, the gate electrode 103 and the source / drain electrodes 210 and 211 are formed through the gate insulating film 113 of silicon oxide. Reference numeral 124 denotes a protective film of silicon oxide. 5 is a plan view of a state in which a TFT 202 is formed on a flat panel substrate 123. A plurality of such TFTs 202 are formed on the central region 200 of the flat panel substrate 123.

The result of measuring the mobility Vds of the electrons of the TFT 202 formed on the substrate 123 is 701 in FIG. 7. 702 is the mobility Vds of electrons of the TFT of the comparative example. This comparative example does not employ clump-shaped crystals (agglomeration crystals) as nuclei. Instead of agglomerated crystals, polycrystalline silicon is formed from the nuclei of silicon recrystallized with ELA, and the polycrystalline silicon is an active layer. The manufacturing method of TFT of a comparative example is shown in FIG. That is, as shown in Fig. 6A, the polycrystalline silicon 133 was grown using the polycrystalline silicon 132 obtained by melting and solidifying a thin film of amorphous silicon as ELA. Other than this point, it is the same as that of the manufacturing method demonstrated in FIG.

As shown in Fig. 7, the mobility of electrons when each Vds was about 0.1V was about 50 cm 2 / V · s. However, when the n-ch TFT was formed in the polycrystalline silicon layer according to the present invention, While the variation in mobility is within the range of about 35 cm 2 / V · s, when the n-ch TFT is formed in the polycrystalline silicon layer formed by the polycrystalline growth method, the variation in the mobility of the electron is 40 cm 2. It has been expanded to the extent of / V · s. Therefore, in the case where the n-ch TFT is formed in the polycrystalline silicon layer according to the present invention, the variation in electron mobility is compared with the case in which the n-ch TFT is formed in the polycrystalline silicon layer formed by the polycrystalline growth method. This was reduced by approximately 10%. From this result, the method of forming polycrystalline silicon using agglomerated crystals as crystal nuclei has the effect of increasing the uniformity of active elements on the entire surface of the flat panel substrate.

Further, as shown in Fig. 8A, the polycrystalline silicon 129 described above was patterned to form the active layer 101 and the impurity electrode 102 of the TFT 202 in an island shape.

Next, the gate insulating film is formed to have a thickness of about 70 nm to 100 nm by APCVD method, PECVD method, ECR-PECVD method, or the like, and Mo, Al, Ta, W, Cu and alloys thereof or the like are formed on the gate insulating film. Metal films, such as a doped silicon film, were formed so that thickness might be about 200 nm-400 nm, and the gate electrode line 103 and the pixel electrode 104 were patterned as shown in FIG. 8B.

Subsequently, in the region which becomes the source / drain of the TFT using the gate electrode line 103 as a mask and the impurity electrode 102, for example, an n-ch TFT, about 1 × 10 ²² cm ^-3 phosphorus is ionized. It was introduced by the implantation method or the ion doping method. That is, impurities were implanted into the diagonal region shown in Fig. 8B. Next, a silicon oxide film, a silicon nitride film or an interlayer insulating film having a stacked structure thereof is formed on the entire surface by APCVD, PECVD, or ECR-PECVD, and the first implanted impurities are excimer laser anneal or 450 ° C to 550 ° C. Activation and low resistance were achieved by degree opening.

Next, as shown in Fig. 9A, the contact holes 107, 108, 109, 111 are opened, and metal films such as Mo, Al, Ta, W, Cu, and alloys or doped silicon films on the entire surface are about 300 nm to 600 nm in thickness. 9B, the signal line 105, the impurity electrode line 106, and the electrode pattern 110 were formed by patterning as shown in FIG. It is preferable that the thickness of a metal film is thicker than an interlayer insulation film from a relationship of coverage. In addition, as described above, the impedance plane line 106 and the impedance plane 102 are connected via the contact hole 107, and the pixel electrode 104 and the active layer 101 are contact holes 108 and 109. Is electrically connected by the electrode pattern 110 via the? In addition, the signal line 105 and the active layer 101 are connected by a contact hole 111.

Finally, as shown in FIG. 10, an array substrate 300 on which a TFT 202 connected to the pixel electrode (ITO) 201 is formed, and a color filter or a black matrix (not shown) is formed. The liquid crystal molecules 206 are sealed between the counter substrate 205 on which the counter electrode 204 is formed, and the liquid crystal is applied by applying an electric field E1 between the pixel electrode 201 and the counter electrode 204. The liquid crystal display device of the system which displays by making the orientation of the molecule | numerator 206 and changing the light transmittance was obtained. The protective film 207 was formed and patterned as needed. In this liquid crystal display device, when a television screen is displayed using an interface device, since the characteristics of each pixel are uniform, a good moving picture can be displayed at a driving voltage of ± 6 kV, and image quality in which display unevenness is eliminated is eliminated. High marks have been achieved over a long period of time.

On the other hand, except that the TFTs with polysilicon polycrystallized by the ELA method described in Fig. 6 were mounted, a liquid crystal display device similar to the above embodiment was prepared, and a television screen was displayed using an interface circuit. Since the characteristics of the pixels are nonuniform, a good moving picture cannot be displayed even at a driving voltage of ± 6 kV, luminance unevenness or the like is confirmed in the displayed image, and the durability is also slightly inferior.

In the present embodiment, the active element is a coplanar TFT, but a semiconductor element such as a TFT may employ other TFTs such as stagger type and reverse stagger type. This TFT can be modified without departing from the gist of the present invention.

In addition, it is possible to cope with fine pixel pitches sufficiently, and it is possible to significantly reduce the area required for the driving circuit as compared with the area required for the external driver and its mounting portion, and to narrow the liquid crystal display device. Since it is possible to achieve the above, the peripheral drive circuit for controlling the liquid crystal display device may be incorporated in the liquid crystal display device as shown in FIG. In FIG. 11, the liquid crystal display device is provided with the CMOS driver circuit 122 which consists of the P-channel TFT 120 and the N-channel TFT 121 which have the said polycrystal, The above-mentioned FIG. 1 or FIG. It consists of the pixel shown in FIG. Reference numerals 117a and 117b denote gate electrodes, 118 and 119 denote polysilicon layers, 116a denote drain electrodes, 116c denote source electrodes, and 116b denote electrodes for connecting the P-channel TFT 120 and the N-channel TFT 121.

As described above, according to the polycrystalline layer according to the present embodiment, when the polycrystal is applied to a semiconductor device such as a TFT, it is possible to improve the electrical characteristics of the semiconductor device and at the same time improve the manufacturing yield of the semiconductor device. It is possible to provide economically. In addition, the lowering of the heat treatment temperature required for the formation of the polycrystalline silicon can be realized, and the process margin due to the variation of the heat treatment conditions can be expanded.

Moreover, according to the liquid crystal display device according to the present invention, by providing a TFT having a polycrystalline channel region composed of almost uniform crystal grains, carriers such as electrons are rapidly and uniformly formed between the source region and the drain region through the channel region. Can be moved. Therefore, the change in the brightness of the display screen can be suppressed to display an image with high image quality, and a liquid crystal display device excellent in durability can be provided. In addition, since the luminance of each pixel is made uniform and the color unevenness can be suppressed, the eye visibility and the like can be reduced because the visibility of the screen is excellent. In addition, since the polycrystalline layer can be mounted in a peripheral drive circuit in addition to the pixel, it is possible to provide a liquid crystal display device capable of responding at a higher speed.

Second embodiment

Next, in the liquid crystal display device having the configuration shown in FIG. 1, a second embodiment employing a manufacturing method different from the first embodiment will be described. The configuration in the case where the polycrystalline layer described in this embodiment is applied to the liquid crystal display device is the same as in the first embodiment.

After the silicon oxide film 124 was formed on the glass substrate 123 in advance, the prepared slit 130 was provided in the vicinity of the glass substrate 123, and then the amorphous silicon layer 125 was formed. At this time, since the gas 126 has directivity and reaches onto the glass substrate 123 from a direction substantially perpendicular to the glass substrate 123, the slit 130 is provided between 1 mm and 1 mm from the substrate 123 (FIG. 12a).

Thereafter, the glass substrate 123 was heat-treated to form microcrystals 127 of silicon aggregated at desired positions. At this time, even when the supply of the gas 126 was directly deposited at an arbitrary position on the glass substrate 123 by using a nozzle or the like, the microcrystalline 127 of silicon aggregated to a desired position could be formed. Moreover, if patterning is performed by the slits having different openings in advance, it is possible to arbitrarily control the arrangement of the microcrystals according to the pattern (Fig. 12B).

Next, the slits 130 used when the silicon microcrystals 127 are formed on the glass substrate 123 are again placed at the positions, and the amorphous silicon layer 128 is formed via the slits 130. (FIG. 12C). On the other hand, in the conventional plasma CVD method, since it is impossible to form the oriented amorphous silicon layer 128 as shown in Fig. 12A, as the gap between the slit 130 and the glass substrate 123 is narrowed, only in a desired position. Amorphous silicon 128 may be formed. Then, the amorphous silicon layer 128 is subjected to polycrystallization using the microcrystalline 127 as the nucleus by the ELA method, thereby forming an island-like polycrystalline silicon layer composed of crystal grains 129 having a substantially uniform particle size at a desired position. Could form. In the case where the liquid crystal display device is formed using the method of manufacturing the polycrystalline silicon layer shown in FIG. 12, the crystal grains have a large particle diameter only at the position where the TFTs of the pixel portion or the peripheral driving circuit are prepared, and the shape of each crystal grain. Has the effect of producing an almost uniform polycrystal. In addition, needless to say, this embodiment exhibits the effect obtained in the first embodiment.

As described above, according to the present invention, it is possible to provide polycrystals which are composed of crystal grains having substantially uniform and large particle diameters and are excellent in economical efficiency. The characteristics of the semiconductor device can be made uniform, and the luminance in the plane of the display screen of the flat panel for display purposes can be made uniform.

Claims (21)

A first film forming step of forming a first amorphous semiconductor layer having an oxygen content of 10% to 1 × 10 ^-5 % on a flat panel substrate having an insulating surface, and An agglomeration process of heating the amorphous semiconductor layer under a condition that its surface is not oxidized to form an agglomerated crystal composed of a plurality of fine crystals, A second film forming step of forming a second amorphous semiconductor layer so as to cover the surface of the agglomerated crystal, A heating step of heating and melting the second amorphous semiconductor layer to form a crystallization layer using the agglomerated crystal as a nucleus, and And a device forming step of etching a part of the crystallization layer into a matrix island region and forming a semiconductor element in the island region. The flat panel of claim 1, wherein the first amorphous semiconductor layer is selected from Si, SiGe, Ge, C, SiC, In, As, InAs, Ga, GaAsAl, AlAs, InAlGaAs, InAlAs, InAlP, and InP. Method of forming the panel. The method of claim 1, wherein the second amorphous semiconductor layer is amorphous silicon. The method of forming a flat panel according to claim 1, wherein the surface of the first substrate is formed of a film selected from a silicon oxide film, a silicon nitride film, an Al film, a silicon oxide film containing F, and a W (tungsten) film. . 4. The method according to claim 3, wherein the semiconductor element is a TFT which forms an active layer in the island region. The method for forming a flat panel according to claim 3, wherein the annealing temperature of the heating step is 600 ° C to 900 ° C. 7. The method for forming a flat panel according to claim 6, wherein the annealing temperature of the heating step is 700 ° C to 800 ° C. 7. The method for forming a flat panel according to claim 6, wherein the annealing time of the heating step is 1 minute to 10 hours. The method for forming a flat panel according to claim 8, wherein the annealing time of the heating step is 30 minutes to 1 hour. The method of forming a flat panel according to claim 1, wherein the oxygen content of the first amorphous semiconductor layer is 1% to 1 × 10 ^-5 %. The method for forming a flat panel according to claim 3, wherein the coagulation step is performed in an atmosphere selected from vacuum, nitrogen, or an inert gas. The method for forming a flat panel according to claim 3, wherein the heating step is performed by an ELA method. The method of forming a flat panel according to claim 3, wherein the surface of the first amorphous semiconductor layer is washed with hydrofluoric acid before the agglomeration step. 4. The method of forming a flat panel according to claim 3, wherein, on forming the first amorphous semiconductor layer, the first amorphous semiconductor layer is formed on an island shape from a mask opening in a predetermined shape. A first film forming step of forming a first amorphous semiconductor layer having an oxygen content of 10% to 1 × 10 ^-5 % on a flat panel substrate having an insulating surface, and An agglomeration process of heating the amorphous semiconductor layer under a condition that its surface is not oxidized to form an agglomerated crystal composed of a plurality of fine crystals, A second film forming step of forming a second amorphous semiconductor layer to cover the surface of the agglomerated crystal, A heating step of heating and melting the second amorphous semiconductor layer to form a crystallization layer using the agglomerated crystal as a nucleus, An element forming step of etching a part of the molten recrystallization layer into an island region of a matrix shape, and forming a semiconductor element in the island region; A pixel electrode forming step formed on the first substrate and controlled by an applied voltage by the semiconductor device; Forming a second substrate on which a counter electrode is formed at a position facing the pixel electrode; And forming a liquid crystal layer between the first substrate and the second substrate. The method of claim 15, wherein the second amorphous semiconductor layer is amorphous silicon. The method for forming a flat panel according to claim 15, wherein the annealing temperature of the heating step is 700 ° C to 800 ° C. 18. The method for forming a flat panel according to claim 17, wherein the annealing time of the heating step is 30 minutes to 1 hour. The method of forming a flat panel according to claim 16, wherein the oxygen content of the first amorphous semiconductor layer is 1% to 1x10 ^-5 %. The method of forming a flat panel according to claim 16, wherein, before the coagulation step, the surface of the first amorphous semiconductor layer is washed with hydrofluoric acid. 17. The method of forming a flat panel according to claim 16, wherein during the device forming step, an impurity electrode is formed simultaneously with the formation of a matrix island region from the crystallization layer.