KR100280102B1 - Method of forming single crystal cobalt disulfide contact using cobalt-carbon alloy thin film - Google Patents
Method of forming single crystal cobalt disulfide contact using cobalt-carbon alloy thin film Download PDFInfo
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- KR100280102B1 KR100280102B1 KR1019980042816A KR19980042816A KR100280102B1 KR 100280102 B1 KR100280102 B1 KR 100280102B1 KR 1019980042816 A KR1019980042816 A KR 1019980042816A KR 19980042816 A KR19980042816 A KR 19980042816A KR 100280102 B1 KR100280102 B1 KR 100280102B1
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- cobalt
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- single crystal
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- 238000000034 method Methods 0.000 title claims abstract description 56
- 239000010409 thin film Substances 0.000 title claims abstract description 44
- CODVACFVSVNQPY-UHFFFAOYSA-N [Co].[C] Chemical compound [Co].[C] CODVACFVSVNQPY-UHFFFAOYSA-N 0.000 title claims abstract description 41
- 229910001339 C alloy Inorganic materials 0.000 title claims abstract description 38
- 239000013078 crystal Substances 0.000 title claims abstract description 30
- XUKVMZJGMBEQDE-UHFFFAOYSA-N [Co](=S)=S Chemical compound [Co](=S)=S XUKVMZJGMBEQDE-UHFFFAOYSA-N 0.000 title claims 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims abstract description 67
- 229910017052 cobalt Inorganic materials 0.000 claims abstract description 59
- 239000010941 cobalt Substances 0.000 claims abstract description 59
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 57
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 57
- 239000010703 silicon Substances 0.000 claims abstract description 57
- 239000000758 substrate Substances 0.000 claims abstract description 50
- 229910019001 CoSi Inorganic materials 0.000 claims abstract description 42
- 238000004544 sputter deposition Methods 0.000 claims abstract description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 11
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 9
- 238000007669 thermal treatment Methods 0.000 claims abstract description 4
- 238000010438 heat treatment Methods 0.000 claims description 21
- 229910052799 carbon Inorganic materials 0.000 claims description 18
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 17
- 239000000203 mixture Substances 0.000 claims description 12
- 229920005591 polysilicon Polymers 0.000 claims description 10
- 238000001704 evaporation Methods 0.000 claims description 2
- 230000008020 evaporation Effects 0.000 claims description 2
- 239000010410 layer Substances 0.000 abstract description 64
- 238000000151 deposition Methods 0.000 abstract description 21
- 239000011241 protective layer Substances 0.000 abstract description 14
- 230000008021 deposition Effects 0.000 abstract description 11
- 229910021332 silicide Inorganic materials 0.000 abstract description 11
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 abstract description 10
- 230000015572 biosynthetic process Effects 0.000 abstract description 6
- 239000004065 semiconductor Substances 0.000 abstract description 6
- 238000007796 conventional method Methods 0.000 abstract description 4
- 238000005137 deposition process Methods 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 239000010936 titanium Substances 0.000 description 13
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 12
- 239000010408 film Substances 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 9
- 238000009792 diffusion process Methods 0.000 description 9
- 229910052719 titanium Inorganic materials 0.000 description 9
- 238000003860 storage Methods 0.000 description 7
- 238000002441 X-ray diffraction Methods 0.000 description 6
- 238000005755 formation reaction Methods 0.000 description 6
- 239000007789 gas Substances 0.000 description 6
- 229910052739 hydrogen Inorganic materials 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 5
- 239000001257 hydrogen Substances 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 4
- 230000002776 aggregation Effects 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000005054 agglomeration Methods 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000007738 vacuum evaporation Methods 0.000 description 2
- 229910000531 Co alloy Inorganic materials 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000010549 co-Evaporation Methods 0.000 description 1
- -1 cobalt metal organic compound Chemical class 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 238000004611 spectroscopical analysis Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- C—CHEMISTRY; METALLURGY
- C01—INORGANIC CHEMISTRY
- C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
- C01B33/00—Silicon; Compounds thereof
- C01B33/06—Metal silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28097—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a metallic silicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
Abstract
본 발명은 고집적회로 반도체소자에 이용되는 모스 트랜지스터에서의 콘택 형성에 있어서, 코발트-카본 합금박막을 이용한 단결정 코발트다이실리사이드(epitaxial cobalt disilicide)의 형성방법에 관한 것으로, 보다 상세하게는 미세구조의 고집적 반도체 소자의 소스/드레인(source/drain) 및 폴리실리콘 게이트(poly-silicon gate) 전극의 접촉저항과 비저항을 감소시키기 위해 실리사이드(silicide) 공정을 이용한 단결정 CoSi2층을 형성시키는데 있어 코발트-카본 합금박막을 코스퍼터링(co-sputtering)방법에 의해 상온 혹은 350 ℃ 이하의 기판온도에서 증착하거나, 화학기상증착법에 의해 기판온도 350℃ 정도에서 코발트-카본 합금박막을 증착한 다음 보호층을 사용하지 않고 후속 급속열처리 공정에 의하여 (100) 방위를 가지는 실리콘 표면에서 코발트와 실리콘의 화합물인 CoSi2층을 직접 형성시키는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a single crystal cobalt disilicide using a cobalt-carbon alloy thin film in forming a contact in a MOS transistor for use in a highly integrated circuit semiconductor device. Cobalt-carbon alloy in forming single crystal CoSi 2 layer using silicide process to reduce contact resistance and specific resistance of source / drain and poly-silicon gate electrode of semiconductor device The thin film is deposited at a substrate temperature of 350 ° C. or lower by a co-sputtering method, or a cobalt-carbon alloy thin film is deposited at a substrate temperature of about 350 ° C. by chemical vapor deposition, and then without using a protective layer. Combination of Cobalt and Silicon on Silicon Surface with (100) Orientation by Subsequent Rapid Thermal Treatment The CoSi to a method of forming a second layer directly.
본 발명에 의해 종래의 방법에서 사용하던 중간층 증착 및 보호층 증착 공정들을 모두 생략할 수 있어 실리사이드 형성공정을 단순화시킬 수 있으며 기존의 방법보다도 단결정이나 단결정에 가까운 에피택시층의 CoSi2층을 성장시킴으로써 도포성(step coverage)이 우수하여 기가디램급 이상의 초미세반도체 집적회로 제조에 이용할 수 있다.According to the present invention, the intermediate layer deposition and the protection layer deposition processes used in the conventional method can be omitted, thereby simplifying the silicide formation process and growing the CoSi 2 layer of the epitaxial layer closer to the single crystal or the single crystal than the conventional method. It has excellent step coverage and can be used to manufacture ultra-semiconductor integrated circuits of more than giga DRAM grade.
Description
본 발명은 기가디램(Giga DRAM)급 이상의 ULSI(Ultra large scale integration)용 초미세 반도체소자의 콘택형성에 관한 것으로, 보다 상세하게는 고융점 금속과 게이트전극인 폴리실리콘과의 반응에 의해 형성되는 폴리사이드(polycide)와 고융점 금속과 소스/드레인에서의 실리콘과의 반응에 의해 형성되는 콘택실리사이드 형성방법인 샐리사이드(salicide) 공정에서 단결정 코발트 실리사이드를 형성하는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to contact formation of ultra-fine semiconductor devices for ultra large scale integration (ULSI) of Giga DRAM or higher grade. The present invention relates to a method for forming single crystal cobalt silicide in a salicide process, which is a method of forming a contact silicide formed by reaction of a polycide with a high melting point metal and silicon in a source / drain.
종래의 기가디램급 이상의 메모리 소자에서 콘택형성 방법은 기술적으로 어려운 점이 많다고 알려져 있으며 한국특허출원 93-21059호, 93-616호, 93-28017호 등의 내용에 미세구조의 고집적 반도체소자에서 소스, 드레인 및 게이트 전극의 저항을 감소시키기 위한 샐리사이드 공정을 나타내고 있다. 또 다른 선행기술로 코발트와 실리콘기판 사이에 중간층을 이용하는 것으로서 다스(M. L .A. Dass, Applied Physics Letter 1991, Vol. 58, 1308쪽 참조)가 발표한 내용은 미세구조의 고집적 반도체소자에서 소스/드레인 및 폴리실리콘 게이트 전극의 저항을 감소시키기 위하여 수행된 샐리사이드 공정 중, 소스/드레인의 단결정 코발트 다이실리사이드 형성방법으로 도 6에 나타내고 있으며 이를 간단히 요약하면 다음과 같다.It is known that the method of forming a contact in the memory device of the conventional giga DRAM class or more has many technical difficulties, and the source, in the microstructure of the highly integrated semiconductor device according to the contents of Korean Patent Application Nos. A salicide process is shown to reduce the resistance of the drain and gate electrodes. Another prior art is the use of an intermediate layer between cobalt and silicon substrates (see M. L.A. Dass, Applied Physics Letter 1991, Vol. 58, 1308). In the salicide process performed to reduce the resistance of the source / drain and the polysilicon gate electrode, a single crystal cobalt disilicide formation method of the source / drain is shown in FIG. 6, which is briefly summarized as follows.
실리콘 기판(1)의 온도는 상온으로 하고 소스/드레인과 게이트를 형성한 후 티타늄(6)을 20 Å의 두께로 증착한 다음 150 Å의 두께로 코발트(4)를 스퍼터링 및 진공증발기를 이용하여 증착한 후 열처리 중의 산화와 응집을 방지하기 위하여 보호층으로 TiN(5) 을 스퍼터링 및 반응성 진공증발(reactive evaporation) 방법에 의하여 200∼400℃에서 증착한 후 700℃ 이상에서 열처리하여 단결정의 CoSi2층(7)을 형성한다.The temperature of the silicon substrate 1 is maintained at room temperature, and the source / drain and the gate are formed. Then, the titanium 6 is deposited to a thickness of 20 kPa, and the cobalt 4 is sputtered to a thickness of 150 kPa using a sputtering and vacuum evaporator. after the sputtering deposition, and reactive of TiN (5) with a protective layer to prevent the oxidation and aggregation of the heat treatment after vacuum evaporation deposited at 200~400 ℃ by (reactive evaporation) method by heat treatment at more than 700 ℃ of the single crystal CoSi 2 Form layer 7.
후속 공정으로서 미반응 코발트(4), 티타늄(6) 및 TiN(5)을 에칭한 다음 800℃ 이상의 고온에서 2차 열처리하여 최종적으로 접촉저항 및 비저항이 낮은 실리사이드를 형성시킨다.As a subsequent process, unreacted cobalt (4), titanium (6) and TiN (5) are etched and then secondary heat treated at a high temperature of 800 ° C. or higher to finally form silicides having low contact resistance and specific resistance.
한편 티타늄(6) 이외에도 황산과 염산의 화학적 세정시 실리콘웨이퍼 위에 형성되는 소위 '시라키 산화막'과 같이 SiOx의 조성을 가지는 화학적 산화막을 이용한 텅 등에 의한 방법(R. T. Tung, Applied Physics Letter 1996, Vol. 68, 3461쪽 참조)과 게르마늄(Ge)을 이용한 오기노 등에 의한 방법(T. Ogino, Applied Surface Science, 1997, Vol 117/118, 280쪽 참조)이 있으나 이 역시 다단계의 증착이 필요할 뿐만 아니라 두께가 500Å 정도 되는 단결정의 CoSi2층(7)을 형성시키기는 매우 어려운 것으로 보고하고 있다. 그리고 도만스(Dormans)등 (J. Crystal Growth, 1991, Vol. 114, 364쪽 참조)은 화학기상증착법에 의하여 300∼600℃에서 코발트 증착이 가능함을 기재하고 있으나 새로운 샐리사이드 공정을 제시하지 못했다.On the other hand, in addition to titanium (6), a method such as tongue using a chemical oxide film having a composition of SiOx such as a so-called 'Shiraki oxide film' formed on a silicon wafer during chemical cleaning of sulfuric acid and hydrochloric acid (RT Tung, Applied Physics Letter 1996, Vol. 68 (See page 3461) and by Ogino using germanium (see T. Ogino, Applied Surface Science, 1997, Vol 117/118, 280), but this also requires multi-step deposition and a thickness of 500Å. It is reported that it is very difficult to form a single crystal CoSi 2 layer 7 to a degree. And Dormans et al. (See J. Crystal Growth, 1991, Vol. 114, 364) describe the possibility of cobalt deposition at 300-600 ° C by chemical vapor deposition, but did not suggest a new salicide process. .
상기에서 언급한 종래의 샐리사이드 공정방법에 의하여 얻어진 실리사이드 박막의 면저항은 5∼10 Ω/□ 정도이다. 그러나 이들 종래의 방법은 상온∼400℃에서 스퍼터링 및 진공증발기에 의해 중간층 및 보호층을 연속적으로 하나의 반응기 안에서 증착하고 열처리해야하는 등 공정이 복잡하고 고가의 장치가 필요하며 금속의 산화와 응집(agglomeration)을 방지하기 위해 보호층을 반드시 필요로 할뿐만 아니라 초미세구조의 소자에서 도포성이 떨어져 균일한 박막을 얻기 어려우며 중간층으로 가장 널리 이용되는 티타늄(6)을 이용하는 방법은 산화막(field oxide와 space oxide)(2) 끝부분(edge)의 열처리과정에서 핀홀(pin-hole)이 형성되어 이로 인한 누설전류가 야기되어 소자의 특성을 저하시키는 원인이 되며 재현성이 떨어진다는 단점이 있다.The sheet resistance of the silicide thin film obtained by the conventional salicide process method mentioned above is about 5-10 ohms / square. However, these conventional methods require complicated apparatuses and expensive equipment, such as the deposition and heat treatment of the intermediate layer and the protective layer in one reactor by sputtering and vacuum evaporation at room temperature to 400 ° C., and the oxidation and agglomeration of metals. It is difficult to obtain a uniform thin film because it is not only necessary to have a protective layer to prevent), but also has a poor coating property in ultra-fine devices, and a method of using titanium (6), which is most widely used as an intermediate layer, is an oxide film (field oxide and space). oxide) (2) During the heat treatment of the edge (pin) is formed a pin-hole (pin-hole), causing a leakage current resulting in the deterioration of the characteristics of the device and has the disadvantage of poor reproducibility.
한편 종래의 방법을 사용함으로써 가장 큰 단점은 다결정의 CoSi2층(7)의 결정립입계(grain boundary)를 통하여 코발트(4)가 실리콘기판(1)으로 쉽게 확산하여 CoSi2층(7)과 실리콘기판(1)의 계면이 균일하지 않고 심한 경우, 소스/드레인의 접합층 내부까지 실리사이드층이 형성되어 소자의 특성을 떨어뜨리는 것이다. 소자의 크기가 작은 차세대 모스트랜지스터에서는 균일한 계면을 가지는 단결정 CoSi2층(7)을 형성시켜야 하며, 이는 매우 얕은 접합의 소스/드레인 영역을 형성시키는 공정에 있어서도 필수적이다.On the other hand, the biggest disadvantage of using the conventional method is that the cobalt (4) easily diffuses into the silicon substrate (1) through the grain boundary of the polycrystalline CoSi 2 layer (7), so that the CoSi 2 layer (7) and silicon In the case where the interface of the substrate 1 is not uniform and severe, a silicide layer is formed inside the junction layer of the source / drain, thereby degrading the characteristics of the device. Next-generation MOS transistors with small device size must form a single crystal CoSi 2 layer 7 having a uniform interface, which is also essential in the process of forming source / drain regions of very shallow junctions.
일반적으로 (100) 방위의 실리콘기판(1)과 CoSi2층(7)은 (100) 방위의 정합면 외에 (110), (221)과 같은 면이 있다고 알려져 있으며, (100) 방위의 정합면은 계면 에너지가 다른 면에 비하여 높으므로 균일한 계면을 가지는 단결정 CoSi2층(7)을 형성하기가 매우 어렵다. 균일한 계면을 가지기 위하여서는 가급적이면 실리콘 기판(1)과 (100) 방위의 정합면을 가지는 단결정 CoSi2층(7)을 형성시키는 것이 바람직한데, 단결정의 CoSi2층(7)을 형성시키기 위해서는 실리콘기판(1)의 표면이 매우 깨끗한 상태가 되어야 하며, 코발트가 실리콘 기판(1)으로의 확산을 억제하는 것이 중요한 변수이다. 코발트의 확산이 빠를 경우, 열처리 과정중에 Co2Si, CoSi, CoSi2같은 조성을 가지는 상들이 연속적으로 형성되어 최종적으로 다결정이 형성되며, 에너지 상태가 높은 (100) 정합면을 가지는 계면보다는 낮은 계면에너지를 가지는 다른 정합면을 가지는 계면이 형성되기 쉽기 때문에 균일한 계면을 가지는 CoSi2층(7)을 형성하기 어렵게 된다. 따라서 코발트의 확산을 억제하기 위하여 종래에는 코발트(4)와 실리콘기판(1) 사이에 중간층을 형성시켜 코발트의 확산이 중간층에 의해 억제되도록 하는 것이 주된 방법이었다. 그러나 중간층을 사용하는 방법은 이미 상기에서 언급했던 것처럼 여러 가지 문제점을 가지고 있다.In general, it is known that the silicon substrate 1 and the CoSi 2 layer 7 in the (100) orientation have the same surface as the (110) and (221) in addition to the matching surface of the (100) orientation. because the interface energy is higher than the other side is very difficult to form a uniform interface with the single crystal CoSi 2 layer 7. In order to have a uniform interface, it is preferable to form a single crystal CoSi 2 layer 7 having a matching surface of the silicon substrate 1 and the (100) orientation as much as possible. In order to form the single crystal CoSi 2 layer 7 The surface of the silicon substrate 1 should be in a very clean state, and it is an important parameter that cobalt suppresses diffusion into the silicon substrate 1. In the case of fast diffusion of cobalt, phases having compositions such as Co 2 Si, CoSi, and CoSi 2 are continuously formed during the heat treatment process, and finally polycrystals are formed, and the interfacial energy is lower than that of the interface having a high (100) interface. It is difficult to form the CoSi 2 layer 7 having a uniform interface because an interface having another matching surface having a structure is easily formed. Therefore, in order to suppress the diffusion of cobalt, it has conventionally been a main method to form an intermediate layer between the cobalt 4 and the silicon substrate 1 so that the diffusion of cobalt is suppressed by the intermediate layer. However, the method of using the intermediate layer has various problems as mentioned above.
본 발명은 코발트(4)를 실리콘 기판(1)위에 증착시켜 CoSi2층(7)을 형성시키는 방법에 있어서, TiN(5)과 같은 중간층을 이용하지 않고 코발트-카본 합금박막(8)을 이용하였다. 도나톤(R. A. Donaton, Applied Physics Letter, 70 (1997) 1266쪽 참조)등에 의하면 극소량의 카본은 코발트의 확산을 억제한다고 보고하고 있다. 본 발명은 화학기상증착법과 진공증발기 및 스퍼터링에 의하여 코발트-카본 합금박막(8)을 이용하여 코발트(4)가 실리콘 기판(1)으로의 확산을 억제하도록 하여 단결정 CoSi2층(7)을 형성하였다.The present invention uses a cobalt-carbon alloy thin film (8) without depositing cobalt (4) on a silicon substrate (1) to form a CoSi 2 layer (7), without using an intermediate layer such as TiN (5). It was. Donaton (see RA Donaton, Applied Physics Letter, pp. 70 (1997), 1266) reports that trace amounts of carbon inhibit the diffusion of cobalt. The present invention uses the cobalt-carbon alloy thin film (8) by chemical vapor deposition, vacuum evaporator and sputtering to suppress the diffusion of cobalt (4) to the silicon substrate (1) to form a single crystal CoSi 2 layer (7) It was.
본 발명은 (100) 방위 실리콘 기판(1)위에 앞에서 언급한 방법으로 코발트-카본 합금박막(8)을 증착한 후 열처리에 의해 기판의 실리콘과의 반응으로 실리콘과 같은(100) 방위를 갖는 단결정이나 단결정에 가까운 에피택시층(epitaxial layer)의 CoSi2층(7)을 형성시킴으로써, 금속 및 중간층을 이용한 다단계의 증착을 수행하지 않고 단지 코발트-카본 합금박막(8)만을 반응기(reaction chamber) 내에서 증착하고 열처리공정을 수행함으로 콘택 형성공정을 단순화시킬 수 있고 저 저항을 실현시킬 수 있어 기가디램급 이상의 반도체소자 개발에 기여하고자 한다.The present invention is to deposit a cobalt-carbon alloy thin film (8) on the (100) orientation silicon substrate (1) by the method mentioned above, and then to heat-treat the single crystal having a silicon-like (100) orientation by reaction with the silicon of the substrate. By forming a CoSi 2 layer 7 of an epitaxial layer close to a single crystal or a single crystal, only the cobalt-carbon alloy thin film 8 is carried out in a reaction chamber without performing multi-step deposition using a metal and an intermediate layer. By depositing and performing heat treatment process, the contact forming process can be simplified and low resistance can be realized.
도 1은 실리콘 기판온도를 350℃로 유지한 상태에서 코발트 금속유기화합물인 시클로펜타디에닐코발트디카보닐[C5H5Co(CO)2]을 이용하여 실리콘 기판에 증착한 코발트-카본 합금박막의 비정질 상태를 나타내는 X-선 회절패턴 그래프이다.1 is a cobalt-carbon alloy thin film deposited on a silicon substrate by using a cyclopentadienyl cobalt dicarbonyl [C 5 H 5 Co (CO) 2 ], which is a cobalt metal organic compound, at a silicon substrate temperature of 350 ° C. Is an X-ray diffraction pattern graph showing an amorphous state of.
도 2는 도 1의 코발트-카본 합금박막의 조성분포를 나타내는 오오제 전자 분광기(auger electrom spectroscopy; AES)의 스펙트럼 그래프이다.FIG. 2 is a spectral graph of an Auger electrom spectroscopy (AES) showing the compositional distribution of the cobalt-carbon alloy thin film of FIG.
도 3은 코발트를 실리콘 기판에 증착한 후 보호층으로 Ti을 증착하고 800℃에서 열처리 후 실리콘 표면의 X-선 회절패턴 그래프이다.3 is a X-ray diffraction pattern graph of the silicon surface after depositing cobalt on a silicon substrate and then depositing Ti as a protective layer and heat-treating at 800 ° C.
도 4는 코발트를 실리콘 기판에 증착한 후 보호층을 사용하지 않고 600℃∼ 800℃에서 열처리 후 단결정 실리콘 기판 표면 소스/드레인의 X-선 회절패턴 그래프이다.4 is an X-ray diffraction pattern graph of a single crystal silicon substrate surface source / drain after cobalt is deposited on a silicon substrate and then heat treated at 600 ° C. to 800 ° C. without using a protective layer.
도 5는 실리콘 기판에 보호층을 사용하지 않고 800℃에서 열처리 후 실리콘 표면의 조성분포를 오오제 전자 분광기를 이용하여 나타낸 그래프이다.FIG. 5 is a graph showing a composition distribution of a silicon surface after heat treatment at 800 ° C. without using a protective layer on a silicon substrate using an Ohze electron spectrometer.
도 6은 소스/드레인 및 폴리실리콘 게이트에서의 실리콘과 금속간의 종래 스퍼터링(sputtering)법 또는 진공증발기(evaporator)에 의한 단결정 코발트다이실리사이드 형성방법을 개략적으로 나타낸 MOS 트랜지스터의 단면구조도로서FIG. 6 is a cross-sectional structural view of a MOS transistor schematically showing a method of forming a single crystal cobalt disilicide by sputtering or evaporator between silicon and a metal in a source / drain and a polysilicon gate; FIG.
(a)는 MOS 트랜지스터의 소스/드레인과 폴리실리콘 게이트를 산화막 또는 질화막으로 스페이서(spacer)를 형성한 상태이다.(a) shows a spacer in which a source / drain and a polysilicon gate of an MOS transistor are formed of an oxide film or a nitride film.
(b)는 스퍼터링 및 진공증발기에 의해 중간층으로 티타늄층을 실리콘 기판위에 증착한 상태이다.(b) is a state in which a titanium layer is deposited on a silicon substrate as an intermediate layer by sputtering and vacuum evaporator.
(c)는 스퍼터링 또는 진공증발기에 의해 실리콘 기판위의 티타늄(Ti)이 증착된 중간층위에 코발트(Co)를 증착한 다음, 코발트의 산화와 응집(agglomeration) 방지를 위한 보호층인 TiN을 증착한 상태이다.(c) deposits cobalt (Co) on an intermediate layer on which titanium (Ti) is deposited on a silicon substrate by sputtering or vacuum evaporator, and then deposits TiN, a protective layer for preventing oxidation and agglomeration of cobalt. It is a state.
(d)는 700℃ 이상에서 열처리를 하여 단결정의 CoSi2층을 형성한 상태이다.(d) is a state in which a single crystal CoSi 2 layer is formed by heat treatment at 700 ° C. or higher.
(e)는 미반응 티타늄(Ti), 코발트(Co) 및 TiN을 에칭한 상태이다.(e) is the state which etched unreacted titanium (Ti), cobalt (Co), and TiN.
도 7은 본 발명의 코발트-카본 합금박막에 의한 CoSi2층 형성 공정 개략도로서7 is a schematic view of a CoSi 2 layer formation process by the cobalt-carbon alloy thin film of the present invention.
(a)는 MOS 트랜지스터의 소스/드레인 및 폴리실리콘 게이트가 형성된 상태이다.(a) shows a state where the source / drain and the polysilicon gate of the MOS transistor are formed.
(b)는 화학기상증착법에 의해 350℃ 정도에서 코발트-카본 합금박막을 (100) 방위의 실리콘 기판위에 증착한 상태이다.(b) is a state in which a cobalt-carbon alloy thin film is deposited on a silicon substrate in the (100) orientation at about 350 ° C. by chemical vapor deposition.
(c)는 700℃이상의 열처리에 의해 실리콘기판과 코발트-카본 합금박막내의 코발트와 실리사이드 형성 반응으로 소스/드레인에 단결정의 CoSi2층이 형성된 상태이다.(c) is a state in which a single crystal CoSi 2 layer is formed on a source / drain by a cobalt and silicide formation reaction in a silicon substrate and a cobalt-carbon alloy thin film by a heat treatment of 700 ° C. or higher.
(d)는 미반응 코발트-카본 합금박막을 에칭한 상태이다.(d) is a state which etched the unreacted cobalt-carbon alloy thin film.
〈 도면의 주요부분에 대한 부호의 설명 〉<Description of reference numerals for the main parts of the drawings>
1 : 실리콘 기판 2 : 산화막1: silicon substrate 2: oxide film
3 : 폴리실리콘 게이트 4 : 코발트(Co)3: polysilicon gate 4: cobalt (Co)
5 : TiN 6 : 티타늄(Ti)5: TiN 6: Titanium (Ti)
7 : CoSi2층8 : 코발트-카본 합금박막7: CoSi 2 layer 8: Cobalt-carbon alloy thin film
본 발명은 코발트-카본 합금박막(8)을 이용하여 MOS 트랜지스터의 소스/드레인 및 게이트에서 직접 콘택(contact)이 가능한 CoSi2층 콘택공정을 도 6에 나타낸 종래의 공정보다 간단히 할 수 있으며 이를 개략적으로 도 7에 나타내었다. 도 7에 나타나 있는 것처럼 본 발명에서 사용한 코발트-카본 합금박막(8)을 이용하여 MOS 트랜지스터를 제작하는 경우, 종래의 공정에 비해 중간층을 증착하는 공정이 생략되어 보다 간단히 콘택공정을 수행할 수 있게된다.The present invention can simplify the CoSi two- layer contact process, which can be directly contacted at the source / drain and gate of the MOS transistor using the cobalt-carbon alloy thin film 8, compared to the conventional process shown in FIG. 7 is shown. As shown in FIG. 7, when the MOS transistor is fabricated using the cobalt-carbon alloy thin film 8 used in the present invention, a process of depositing an intermediate layer is omitted compared to the conventional process so that the contact process can be performed more simply. do.
본 발명의 공정은 다음과 같다. 먼저 n+ 및 p+ 의 소스/드레인과 폴리실리콘게이트(3)로 구성된 실리콘 기판(1)을 300℃∼400℃의 온도로 유지한 다음, 시클로펜타디에닐코발트디카보닐[Co(C5H5)(CO)2] 또는 비스시클로펜타디에닐코발트[Co(C5H5)2] 등과 같은 코발트-금속유기물소스를 -10℃에서부터 50℃의 온도로 보관된 저장용기에서부터 반응기까지 가스상태로 직접 이송시키거나 수소, 질소 및 아르곤가스 등을 이용하여 반응기까지 코발트-금속유기물소스를 이송시켜 화학기상증착법으로 증착하여 소스/드레인 실리콘 위에서 코발트-카본 합금박막(8)을 증착한 다음, 700℃ 이상의 열처리에 의해 코발트-카본 합금박막(8)내의 코발트(4)와 실리콘과의 반응으로 실리콘 기판(1)의 (100) 방위와 같은 방위에서는 (100) 방위의 에피택시층의 CoSi2층(7)이 형성되고, 폴리실리콘 게이트(3) 위에는 다결정 CoSi2층(7)이 바로 형성되며 산화막(2) 위에는 코발트(4)가 산화막(2)과 반응하지 않고 남아있게 된다.The process of the present invention is as follows. First, a silicon substrate 1 composed of a source / drain of n + and p + and a polysilicon gate 3 is maintained at a temperature of 300 ° C. to 400 ° C., and then cyclopentadienyl cobalt dicarbonyl [Co (C 5 H 5 ) Cobalt-metal organic sources, such as (CO) 2 ] or biscyclopentadienyl cobalt [Co (C 5 H 5 ) 2 ], are stored in a gaseous state from the storage vessel to the reactor stored at a temperature of -10 ° C to 50 ° C. Transfer the cobalt-metal organic source to the reactor using hydrogen, nitrogen, and argon gas or the like and deposit by chemical vapor deposition to deposit the cobalt-carbon alloy thin film (8) on the source / drain silicon, and then 700 ° C. or more. CoSi 2 layer 7 of the epitaxy layer in the (100) orientation in the same orientation as the (100) orientation of the silicon substrate 1 by reaction of cobalt 4 and silicon in the cobalt-carbon alloy thin film 8 by heat treatment. ) Is formed, and on the polysilicon gate 3 Forming a polycrystalline CoSi 2 layer 7 is directly and it is possible the cobalt (4) formed on the oxide film (2) remains without reacting with the oxide film (2).
진공증발기를 이용하여 코발트-카본 합금박막(8)을 증착하는 경우 카본과 코발트(4)를 코이베이퍼레이션(co-evaporation)방법으로 기판을 상온으로 하여 증착할 수 있다. 진공증발기내에서 2 기의 텅스텐 및 몰리브덴 보트(boat)나 분출기(effusion cell)내에 코발트(4)와 카본을 장입하고 온도를 1,000∼1,500℃를 유지하고 기준진공도를 10-7토르(Torr) 이하로 유지하면 기판에 증착이 가능하다.In the case of depositing the cobalt-carbon alloy thin film 8 using a vacuum evaporator, carbon and cobalt 4 may be deposited at room temperature by a co-evaporation method. In the vacuum evaporator, cobalt (4) and carbon are charged in two tungsten and molybdenum boats or effusion cells, and the temperature is maintained at 1,000 to 1,500 ° C and the standard vacuum is 10 -7 Torr. If kept below, it is possible to deposit on the substrate.
스퍼터링을 이용하여 코발트-카본 합금박막(8)을 증착하는 경우 코발트 대 카본이 1 대 1의 조성비를 가지거나 2 대 1의 조성비를 가지는 합금 타겟(target)을 이용하여 실리콘 기판(1)온도를 상온으로 하여 아르곤가스를 1∼10 sccm 스퍼터링기로 흘려 압력을 1∼10 mTorr 정도로 유지하고 기판을 상온 혹은 350℃ 이하로 유지하면 실리콘 기판(1)위에 증착이 된다. 코발트-카본 합금박막(8)타겟 외에 코발트(4)와 카본 타겟을 위와 유사한 방법으로 각각 스퍼터링하는 코스퍼터링(co-sputtering)방법에 의해서도 실리콘기판(1) 온도를 상온으로 하여 마찬가지로 비정질상의 코발트-카본 합금박막(8)이 증착된다. 이후, 화학기상증착법과 마찬가지로 700℃ 이상의 열처리에 의해 코발트-카본 합금박막(8)내의 코발트(4)와 실리콘과의 반응으로 실리콘 기판(1)의 (100) 방위와 같은 방위에서는 (100) 방위의 에피택시층의 CoSi2층(7)이 형성되고, 폴리실리콘 게이트(3) 위에는 다결정 CoSi2층(7)이 바로 형성되며 산화막(2) 위에는 코발트(4)가 산화막(2)과 반응하지 않고 남아있게 된다.When the cobalt-carbon alloy thin film 8 is deposited by sputtering, the temperature of the silicon substrate 1 is increased by using an alloy target in which cobalt-to-carbon has a composition ratio of 1 to 1 or a composition ratio of 2 to 1. When argon gas is flowed to a 1-10 sccm sputtering machine at room temperature, the pressure is maintained at about 1-10 mTorr, and the substrate is kept at room temperature or 350 ° C. or less, and is deposited on the silicon substrate 1. In addition to the cobalt-carbon alloy thin film (8) target, the cobalt (4) and carbon targets were sputtered in a similar manner to the co-sputtering method, respectively. Carbon alloy thin film 8 is deposited. Subsequently, in the same orientation as the (100) orientation of the silicon substrate 1 by the reaction between the cobalt 4 and the silicon in the cobalt-carbon alloy thin film 8 by the heat treatment of 700 ° C. or the like, as in the chemical vapor deposition method, the (100) orientation CoSi 2 layer 7 of epitaxial layer of is formed, polycrystalline CoSi 2 layer 7 is formed directly on polysilicon gate 3 and cobalt 4 does not react with oxide film 2 on oxide film 2. Will remain.
이후 최종 샐리사이드 공정을 위하여 스페이서(spacer)나 산화막(field oxide)(2)위에 미반응한 코발트-카본 합금박막(8)은 에칭으로 제거한다.The unreacted cobalt-carbon alloy thin film 8 on the spacer or field oxide 2 is then removed by etching for the final salicide process.
이하 실시예를 통하여 본 발명을 설명하고자 한다. 그러나 이 실시예는 본 발명의 설명을 용이하게 하기 위하여 제공되는 것일 뿐 본 발명의 기술적 범위가 이 실시예에 의해 한정되는 것은 아니다.Through the following examples will be described the present invention. However, this embodiment is provided only to facilitate the description of the present invention, the technical scope of the present invention is not limited by this embodiment.
< 실시예 1 ><Example 1>
n+ 및 p+ 의 소스/드레인과 폴리실리콘게이트로 구성된 실리콘 기판을 반응기 내에서 350℃의 온도로 유지한 다음, 코발트-금속유기물소스로서 비스시클로펜타디에닐코발트[Co(C5H5)2]를 35℃의 저장용기에서부터 이송가스로서 수소 50 sccm을 저장용기를 통하여 흘러나오도록 하여 반응기로 이송하여 화학기상증착법으로 증착한 후 800℃의 온도에서 급속열처리방법으로 5분 동안 열처리를 하여 실리콘 기판(1) 위에 CoSi2층(7)을 형성하였다. 이때의 증착압력은 10∼500 mtorr의 범위로 이 범위내에서 증착된 박막의 코발트 대 카본의 조성비는 조금씩 다르나 대개 50 % : 50 % 조성비를 갖는다.A silicon substrate composed of polysilicon gates and sources / drains of n + and p + was maintained in a reactor at a temperature of 350 ° C., and then biscyclopentadienylcobalt [Co (C 5 H 5 ) 2 ] as a cobalt-metal organic source. 50 sccm of hydrogen as a transfer gas from the storage vessel at 35 ° C flows out through the storage vessel, transferred to the reactor, deposited by chemical vapor deposition, and then heat treated for 5 minutes by rapid thermal treatment at a temperature of 800 ° C. CoSi 2 layer 7 was formed on (1). At this time, the deposition pressure is in the range of 10 to 500 mtorr, and the composition ratio of cobalt to carbon of the thin film deposited within this range is slightly different, but usually has a composition ratio of 50%: 50%.
한편 저장용기의 온도에 따라 코발트-금속유기물소스의 증기압이 달라지는데 저장용기의 온도가 상온일 경우에는 수소나 기타 이송가스를 사용하지 않고 코발트-금속유기물소스의 증기압만으로도 충분히 이송이 가능하기 때문에 상기와 같이 수소를 이송가스로 사용하는 경우에는 1분 이내에 500 Å이상의 두께를 가지는 코발트-탄소합금 박막을 실리콘 기판(1)위에 형성시킬 수 있다.On the other hand, the vapor pressure of the cobalt-metal organic source varies depending on the temperature of the storage container. When the temperature of the storage container is room temperature, the vapor pressure of the cobalt-metal organic source can be sufficiently transferred without using hydrogen or other transport gas. Likewise, in the case of using hydrogen as a transport gas, a cobalt-carbon alloy thin film having a thickness of 500 kPa or more can be formed on the silicon substrate 1 within 1 minute.
< 실시예 2 ><Example 2>
기판온도 350℃에서 코발트-금속유기물소스로서 시클로펜타디에닐코발트디카보닐[Co(C5H5)(CO)2]을 35℃의 저장용기 내에 저장한 후 수소 50 sccm을 저장용기 안으로 흘려 반응기까지 이송하였으며 이때 환산된 Co(C5H5)(CO)2의 양은 5∼15 sccm(Square per Cubic Centi Meter), 증착압력은 400∼500 mtorr 이었으며, 실시예 1의 방법과 같이 화학기상증착법으로 증착한 후 800℃의 온도에서 급속열처리방식으로 5분 동안 열처리를 하여 실리콘 기판(1) 위에 CoSi2층(7)을 형성하였다. 이때, 증착된 코발트-탄소합금 박막은 50%의 코발트와 50%의 카본으로 되어있으며 X-선 회절패턴을 실시하여 결과를 도 1에 나타내었다.After storing the cyclopentadienyl cobalt dicarbonyl [Co (C 5 H 5 ) (CO) 2 ] as a cobalt-metal organic source at a substrate temperature of 350 ° C. in a 35 ° C. storage vessel, 50 sccm of hydrogen was flowed into the storage vessel. At this time, the amount of Co (C 5 H 5 ) (CO) 2 converted was 5-15 sccm (Square per Cubic Centi Meter), and the deposition pressure was 400-500 mtorr. After the deposition was performed by heat treatment for 5 minutes at a temperature of 800 ℃ rapid thermal treatment to form a CoSi 2 layer 7 on the silicon substrate (1). In this case, the deposited cobalt-carbon alloy thin film is composed of 50% cobalt and 50% carbon, and the result of performing the X-ray diffraction pattern is shown in FIG. 1.
도 1의 비교적 날카로운 회절선 대신 넓고 완만한 곡선은 코발트-카본 합금박막이 비정질 상태임을 나타내고 있다. 또한 코발트-카본의 조성비를 나타내는 오오제 분광기 스펙트럼을 도 2에 나타내었다. 도 2에서 350℃에서 증착된 코발트-카본의 조성비는 대략 각각 비슷한 조성임을 알 수 있다.Wide and gentle curves instead of the relatively sharp diffraction lines of FIG. 1 indicate that the cobalt-carbon alloy thin film is in an amorphous state. In addition, Oze spectrophotometer spectrum showing the composition ratio of cobalt-carbon is shown in FIG. It can be seen that the composition ratios of cobalt-carbon deposited at 350 ° C. in FIG. 2 are approximately similar compositions.
〈 실시예 3 〉<Example 3>
실리콘 기판(1)위에 코발트(4)를 증착한 후, 보호층으로 티타늄(6)을 증착하고 질소분위기에서 800℃로 5분간 급속열처리한 실리콘 기판(1)에서 CoSi2층(7)이 형성됨을 나타내는 X-선 회절패턴을 도 3에 표시하였으며 코발트(4)를 증착한 다음 보호층을 증착하지 않고 온도에 따라 열처리 한 실리콘 기판(1)에서 700℃이상의 단결정 CoSi2층(7)이 형성됨을 나타내는 X-선 회절패턴을 도 4에 표시하였다. 도 3에서는 열처리 후의 실리콘기판(1)에서 실리콘기판(1)을 나타내는 회절선과 (100) 방위의 실리콘과 같은 (100) 방위를 가지는 에피택시층 CoSi2층(7)이 형성되었음을 나타내는 (200) 방위의 회절선만이 나타남을 알 수 있다. 또한 도 4에서는 보호층을 사용하지 않은 경우, 700℃ 이상에서 에피택시층 CoSi2층(7)이 형성되고 있음을 알 수 있다.After depositing cobalt (4) on the silicon substrate (1), the CoSi 2 layer (7) is formed on the silicon substrate (1), which is deposited titanium (6) as a protective layer and rapidly heat treated at 800 ℃ in a nitrogen atmosphere for 5 minutes An X-ray diffraction pattern is shown in FIG. 3, in which a single crystal CoSi 2 layer 7 of 700 ° C. or more is formed on a silicon substrate 1 that is heat-treated according to temperature without depositing cobalt 4 and then depositing a protective layer. An X-ray diffraction pattern indicating is shown in FIG. 4. In FIG. 3, (200) shows that the epitaxial layer CoSi 2 layer 7 having the diffraction line showing the silicon substrate 1 and the (100) orientation as the silicon in the (100) orientation is formed in the silicon substrate 1 after heat treatment. It can be seen that only the diffraction lines of azimuth appear. In addition, in FIG. 4, when the protective layer is not used, the epitaxial layer CoSi 2 layer 7 is formed at 700 ° C. or higher.
이 때 산화막(2)인 SiO2위의 코발트(4)는 SiO2와 반응하지 않으며 이 코발트(4)를 NH4OH/H2O2나 HNO3/H2O 또는 H2SO4/H2O2용액으로 에칭하면 된다.At this time, the cobalt (4) on the SiO 2 which is the oxide film (2) does not react with SiO 2 and the cobalt (4) is replaced by NH 4 OH / H 2 O 2 or HNO 3 / H 2 O or H 2 SO 4 / H. 2 O is etching the second solution.
위와 같이하여 얻어진 코발트실리사이드 박막의 면저항은 5∼10 Ω/□로서 스퍼터링에 의한 방법과 비교해 볼 때 비슷한 면저항 값을 나타내고 있고 비저항 값은 약 16∼20 μΩ·cm 이다. 또한 보호층을 사용한 경우, 에피택시층의 형성여부 및 에피택시층과 실리콘 기판과의 정합여부를 나타내는 투과전자현미경 분석시 450Å 정도의 두께를 가지는 정합 에피택시층 코발트다이실리사이드층이 형성되었음을 확인할 수 있다.The sheet resistance of the cobalt silicide thin film obtained as described above is 5 to 10 Ω / □, and shows a similar sheet resistance value as compared with the sputtering method, and the specific resistance value is about 16 to 20 µΩ · cm. In addition, when the protective layer was used, a matching epitaxial layer cobalt disilicide layer having a thickness of about 450 시 was formed in the transmission electron microscope analysis indicating whether the epitaxial layer was formed and whether the epitaxial layer was matched with the silicon substrate. have.
〈 실시예 4 〉<Example 4>
보호층을 사용하지 않고 실리콘 기판(1)위에 실시예 2의 방법으로 코발트 금속유기물 소스가스로서 시클로펜타디에닐코발트디카보닐[Co(C5H5)(CO)2]을 이용하여 코발트-카본 합금박막(8)을 증착한 후 800℃의 질소분위기 하에서 급속열처리방식으로 5분 동안 열처리하여 실리콘 기판위(1)에 CoSi2층(7)을 형성한 다음 오오제 전자 분광기를 이용하여 실리콘 기판(1)의 표면 조성분포를 나타내는 그래프를 도 5에 나타내었다.Cobalt-carbon using cyclopentadienylcobaltdicarbonyl [Co (C 5 H 5 ) (CO) 2 ] as a cobalt metal organic source gas in the method of Example 2 on the silicon substrate 1 without using a protective layer. After depositing the alloy thin film (8) to form a CoSi 2 layer (7) on the silicon substrate (1) by heat treatment for 5 minutes in a rapid heat treatment method under a nitrogen atmosphere of 800 ℃ and then using a Ohze electron spectrometer A graph showing the surface composition distribution of (1) is shown in FIG. 5.
도 5는 실리콘 표면으로부터 스퍼터링 후 각각의 원소에 대한 양을 원자 % 단위로 나타낸 것으로서 카본이 포함된 코발트-카본 합금박막(8)으로부터 코발트(4)가 실리콘 기판(1)쪽으로 확산하여 들어갔음을 알 수 있고, 이때 카본은 코발트(4)의 과도한 확산을 억제하여 에피택시한 CoSi2층(7)을 형성시킨다. 또한 열처리과정에서 흔히 볼 수 있는 코발트(4)의 산화 역시 카본이 산소의 확산을 억제하여 형성된 코발트-카본 합금박막(8) 내에서 산소량이 매우 적음을 알 수 있다. 즉, 본 발명에서 이용한 코발트-카본 합금박막(8)은 열처리과정에서 단결정 CoSi2층(7)을 형성시키기 위하여 코발트(4)가 실리콘기판(1)으로의 확산을 억제하고, 코발트(4)의 산화를 억제하는 두 가지 역할을 한다는 것을 알 수 있다.FIG. 5 shows the amount of each element in units of atomic percent after sputtering from the silicon surface, showing that cobalt (4) diffused into the silicon substrate (1) from the cobalt-carbon alloy thin film (8) containing carbon. As can be seen, carbon inhibits excessive diffusion of cobalt 4 to form an epitaxial CoSi 2 layer 7. In addition, it can be seen that the oxidation of cobalt (4), which is commonly seen in the heat treatment process, is also very small in the cobalt-carbon alloy thin film (8) formed by carbon inhibiting the diffusion of oxygen. That is, the cobalt-carbon alloy thin film 8 used in the present invention suppresses the diffusion of the cobalt 4 into the silicon substrate 1 to form the single crystal CoSi 2 layer 7 during the heat treatment process, and the cobalt 4 It can be seen that it plays two roles to inhibit the oxidation of.
본 발명의 콘택형성 방법은 단결정의 CoSi2층을 형성하는데 있어서, 다단계의 중간층의 증착과 보호층인 TiN 증착공정 그리고, 공정 후에 수행되는 고온 열처리와 같은 여러 공정이 필요한 종래의 콘택형성 방법의 문제점을 해결함으로써 저항이 낮고 재현성이 높은 에피택시층 CoSi2층을 다단계의 중간층 증착공정을 거치지 않고 카본이 포함된 카본-코발트 합금박막의 증착과 열처리에 의해 형성시킬 수 있어 콘택 배선공정을 크게 단순화시킬 수 있다.In the contact formation method of the present invention, in forming a single crystal CoSi 2 layer, there is a problem of a conventional contact formation method that requires various processes such as a multi-stage intermediate layer deposition, a TiN deposition process as a protective layer, and a high temperature heat treatment performed after the process. The low resistivity and high reproducibility of the epitaxial CoSi 2 layer can be formed by deposition and heat treatment of carbon-cobalt alloy thin film containing carbon without going through a multi-stage interlayer deposition process, greatly simplifying the contact wiring process. Can be.
또한 화학기상증착법을 이용함으로써 초미세구조의 콘택 배선공정에서 도포성이 우수하고, 균일한 계면을 형성시킬 수 있을 뿐만 아니라 에피택시층 실리사이드를 형성하여 실리사이드와 실리콘간의 계면 결함이 적어 소스/드레인에서 우수한 접합특성을 얻을 수 있어 기가디램(GDRAM)급 이상의 고집적회로 초미세 반도체 소자의 제조에 활용할 수 있다.In addition, by using the chemical vapor deposition method, it is excellent in coating property in the ultra-fine contact wiring process and can form a uniform interface, and also forms epitaxial layer silicide, so that the interface defect between silicide and silicon is small, The excellent bonding characteristics can be obtained, and thus it can be utilized for the manufacture of high-integrated circuit ultra-fine semiconductor devices of more than GDRAM level.
Claims (6)
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KR1019980042816A KR100280102B1 (en) | 1998-10-13 | 1998-10-13 | Method of forming single crystal cobalt disulfide contact using cobalt-carbon alloy thin film |
PCT/KR1999/000617 WO2000022659A1 (en) | 1998-10-13 | 1999-10-13 | Method of forming cobalt-disilicide contacts using a cobalt-carbon alloy thin film |
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KR100654340B1 (en) | 2004-12-08 | 2006-12-08 | 삼성전자주식회사 | Semiconductor device having a carbon-containing silicide layer and method for manufacturing the same |
KR101220916B1 (en) | 2010-06-29 | 2013-01-14 | 한국과학기술연구원 | Pd-Y alloy catalyst and method for preparing the same, fuel cell comprising the catalyst |
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US6727169B1 (en) | 1999-10-15 | 2004-04-27 | Asm International, N.V. | Method of making conformal lining layers for damascene metallization |
KR100873800B1 (en) * | 2002-07-19 | 2008-12-15 | 매그나칩 반도체 유한회사 | Silicide Forming Method of Semiconductor Device Using Carbon Nanotubes |
US7186630B2 (en) | 2002-08-14 | 2007-03-06 | Asm America, Inc. | Deposition of amorphous silicon-containing films |
US7064050B2 (en) * | 2003-11-28 | 2006-06-20 | International Business Machines Corporation | Metal carbide gate structure and method of fabrication |
US7687383B2 (en) | 2005-02-04 | 2010-03-30 | Asm America, Inc. | Methods of depositing electrically active doped crystalline Si-containing films |
US8278176B2 (en) | 2006-06-07 | 2012-10-02 | Asm America, Inc. | Selective epitaxial formation of semiconductor films |
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JP2738333B2 (en) * | 1995-03-30 | 1998-04-08 | 日本電気株式会社 | Method for manufacturing semiconductor device |
JPH09326369A (en) * | 1996-06-04 | 1997-12-16 | Hitachi Ltd | Fabrication of semiconductor device |
JPH1045416A (en) * | 1996-07-31 | 1998-02-17 | Sony Corp | Formation of cobalt silicide film |
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KR100654340B1 (en) | 2004-12-08 | 2006-12-08 | 삼성전자주식회사 | Semiconductor device having a carbon-containing silicide layer and method for manufacturing the same |
KR101220916B1 (en) | 2010-06-29 | 2013-01-14 | 한국과학기술연구원 | Pd-Y alloy catalyst and method for preparing the same, fuel cell comprising the catalyst |
US9269965B2 (en) | 2010-06-29 | 2016-02-23 | Korea Institute Of Science And Technology | Pd-Y alloy catalyst, method for preparing the same, and fuel cell comprising the catalyst |
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