KR100273944B1 - Hard Disk Servo Information Recording Device - Google Patents

Abstract

By configuring a plurality of memories in the form of a main-sub, and loading some of the unchanged servo information and the changed servo information among the three-dimensional servo information about the generated head, track, and sector numbers into the main memory and the sub memory, one track The present invention relates to a hard disk servo information recording apparatus which improves the load speed of a memory and the recording speed of a disk because only a small amount of servo information that changes per track, rather than a servo information unit, needs to be continuously loaded into the sub memory.

Description

Hard Disk Servo Information Recording Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a servo track writer that loads three-dimensional servo information, which is a combination of a head, track, and sector number, into a memory and then writes it onto a specific head surface of a disk through the memory.

In general, the servo tracker writes a head assembly and a bare disk in the manufacturing process of a hard disk driver (HDD), and then, the servo information (head, track, and sector related to the position control of the blank disk disc) is required. It refers to equipment that records number on the head of disk by controlling electrical / mechanical control from outside).

The servo information recorded on the hard disk is three-dimensional information, which includes head information indicating the track surface of each disc, track information indicating the recording area on the head, and sectors in which the track is divided into predetermined sections. ) Indicates that the information is changing in three dimensions, and the servo information always changes.

The memory control method of the servo tracker that loads such servo information into the memory and records the servo information loaded into the memory on the head surface of each disk is unique to each company, and FIG. 1 shows a schematic diagram of an alternative servo tracker. Let's look at the prior art with reference.

Conventionally, a servo information constructing unit (1) for constructing and generating servo information, a memory (3) for receiving one track of servo information from the servo information constructing unit (1), and a servo stored in the memory (3) P / S circuit section 5 for reading information and converting data in parallel form to serial form and outputting the serial data from the P / S circuit section 5; It consists of a recording part 7 which records in.

Referring to FIG. 2, the operation process of the prior art configured as described above is described first. In the servo information configuring unit 1, one track amount of servo information is configured (S1), and the single track amount of servo information is controlled. The memory 3 is loaded in accordance with the signal (S2).

The servo information in the memory 3 is converted (5) to parallel information according to a predetermined control signal, and then recorded on the specific head surface of the disc 7 (S3).

Thereafter, the system controller (not shown) determines whether the servo information of the last track is loaded into the memory 3, and then repeats the routine until the servo information of the last track is transmitted (S4).

The servo information writing method as described above has a large time loss that occurs when loading servo information of one track and servo information into a memory, thereby causing a problem of lowering production efficiency in terms of productivity. It was.

SUMMARY OF THE INVENTION An object of the present invention is to configure a plurality of memories in a main-sub form, and to load some servo information and variable servo information which do not change among three-dimensional servo information generated into the main memory and the sub memory, respectively. The present invention provides a hard disk servo information recording apparatus that improves the load speed of a memory and the recording speed of a disk because only a small amount of servo information that changes per track, rather than a servo information unit, needs to be continuously loaded into the sub memory.

In order to achieve the above object, the apparatus of the present invention comprises: a main memory for storing one track of initial servo information according to a main address and a control signal; A main controller for loading initial track information of one track into the main memory and outputting a main address latched in synchronization with a predetermined write start signal and a clock signal to the main memory; A sub memory for storing servo information changed for each track according to the sub address and a control signal; A sub controller which loads initial servo information changed for each track into the sub memory and outputs a latched sub address to the sub memory in synchronization with a predetermined clock signal; And 16-bit servo information provided from the main memory for each bit according to a predetermined control signal and a clock signal, and according to the control information of each bit, a head surface for recording data and servo information to be written are stored in the main memory or the sub memory. And a write circuit section for writing the servo information of the memory selected above to the disc after being selected from the drawings.

1 is a schematic view showing a conventional servo track writer,

2 is a flowchart illustrating an operation of FIG. 1;

3 is a schematic block diagram showing a servo information loading and recording apparatus of the present invention;

4 is a block diagram illustrating a detailed circuit of FIG. 3 according to an embodiment of the present invention;

5 is a diagram illustrating a data format loaded into a main memory according to the present invention.

Explanation of symbols on the main parts of the drawings

10; Main control unit 11: main address latch

13: main address counter 15: main address selection switch unit

20: main memory 30: sub control unit

31: sub address latch 33: address counter

35: address select switch 40: sub memory

50: light circuit 51: data filter

53: Head Side Selection Section 55: Sub Memory Selection Section

57: data switch 59: shift register

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

3 is a schematic block diagram showing a servo information loading and recording apparatus of the present invention, wherein the main control unit 10, the main memory unit 20, the sub control unit 30, the sub memory unit 40, and the write circuit unit 50 are shown. ).

Reference numeral 10 denotes a latch and count received by a main address signal generated by an external controller (not shown), and inputted above in synchronization with a predetermined write clock signal. It is a main control unit which loads the initial 1 track amount of servo information with reference to the main address.

Reference numeral 20 is a main memory for storing one track of servo information Data output from the main control unit 10 according to a predetermined control signal.

Reference numeral 30 is latched and counted by receiving a sub address signal generated from an external controller (not shown), and is changed for each track with reference to the sub address input above in synchronization with a predetermined clock signal (Clock). This is a sub control unit for loading servo information data.

Reference numeral 40 denotes a sub memory that stores servo information for storing servo information that is changed for each track output from the sub controller 40 according to a predetermined control signal.

Reference numeral 50 denotes a head surface for separating the 16-bit servo information provided from the main memory 20 for each bit according to a predetermined control signal and a write clock signal, and recording data according to the control information of each bit. After selecting the servo information to be written from the main memory 20 or the sub memory 40, the write circuit unit writes the servo information of the memory 20 or 40 selected above to the head surface of the disk.

4 is a block diagram illustrating a detailed circuit of FIG. 3 according to an exemplary embodiment of the present invention.

The main controller 10 may include an address latch 11 configured to receive and latch a main address signal for addressing the main memory 20, and a main address from the address latch 11. Each time is transmitted, the address counter 13 outputs a main address after counting, and one track of servo information is synchronized with a predetermined write clock signal and a write start signal in synchronization with the address counter. It consists of an address selection switch section 15 that determines whether or not to load to the address output from (13).

The main memory unit 20 is configured to store one track of servo information or to output servo information stored at a provided address according to an address (Main Address) output through the address selection switch unit 15.

In addition, the servo controller 30 receives an address latch 31 for receiving and latching a sub address signal for addressing the sub memory 40 and the address in synchronization with a predetermined clock signal Clock. An address counter 33 that counts each time a sub address is transmitted from the latch 31 and outputs the sub address, and determines whether to load servo information changed for each track to the address output from the address counter. It consists of an address selection switch section 35.

In addition, the sub memory unit 40 is configured to store servo information changed for each track according to the sub address output through the address selection switch unit 35 or to output servo information stored at a provided address.

The write circuit unit 50 includes a data filter 51 for classifying 16-bit servo information data output from the main memory 20 into 8-bit high control byte and 8-bit low servo information byte, respectively, and the data filter. A head selector 53 for selecting a head face of a specific disc by separating the head select bit among the 8-bit higher bytes separated from 51, and when data to be written to the disc head face is data changed for each track; A sub-memory selector 55 for selecting an output of sub-memory data by separating the sub-memory select bits among the 8-bit lower bytes separated from the data filter 51; It is determined whether or not to write the servo information to the disk by separating the write decision bit among the bytes, and outputting the output signal of the sub memory selecting unit 55. The data switch unit 57 controls to output main or sub servo information output from the main memory 20 or the sub memory 40 according to the call, and in synchronization with a write clock signal applied from the outside. And a shift register 59 for converting parallel 8-bit servo information output through the data switch unit 57 into serial and outputting it to a predetermined head surface 60 of the disk.

FIG. 5 is a diagram illustrating a servo information format loaded into a main memory according to the present invention. The meaning and processing of each bit of a data format are as follows.

The data loaded into the main memory 20 is composed of 16-bit data consisting of 8-bit high byte and 8-bit low byte as shown in the figure. The upper 8 bits are the control byte, and the lower 8 bits are written on the disk head surface. Actual servo information data.

The meaning of each bit is shown in Table 1 below, and the meaning of control and data changes depending on whether each bit is data '0' or '1'.

Bite beat meaning High byte 15 1 bit to determine whether to write servo information 13 1 bit to indicate whether sub memory is selected 11-8 4 bits for specific head selection Lower byte 7 to 0 8-bit servo information data Bits 14, 12: Unused extra bits

The 16-bit data is bit-separated through the data filter of the write circuit unit, and the separated bit 15 is applied to the data switch unit 57 to control whether or not to write servo information (bits 7 to 0) to the disc. Bit 13 is applied to the sub memory selector 55 to control whether to write the servo information of the sub memory 40 rather than the servo information of the main memory 20 to the disc. It is applied to the selector 53 to select one of the plurality of head faces 60 provided in the hard disk.

Looking at the overall operation of the present invention with reference to FIGS. 4 and 5 as follows.

The amount of servo information to be recorded on the disk depends on the design of the hard disk driver. If the model has a total of six head faces, the head information of each sector of the track is switched in turn, and the servo information is displayed on the head face of the disk. Is written on.

The program configures servo information related to the current head number, track number, and sector number, and then converts the servo information into a certain type of servo information and stores it in the memory 20 as follows.

In order to load the servo information corresponding to one track, the main address selection switch 15 is selected as the main address, and the servo information is sequentially loaded into the main memory 20 with reference to the main address. Load it.

In addition, the information to be newly recorded without repetition in the next track among the servo information is configured by byte unit, and the sub address selection switch 35 is selected as the sub address, and is not repeated for each track with reference to the sub address. The changing servo information is loaded into the sub memory 40.

Once the servo information has been loaded into the main and sub memories 20 and 40, the loaded servo information must be written to the disc. To do this, an initial address indicating the servo information stored in the main memory 20 by the main address latch 11 is indicated. Should be saved.

In addition, the sub address latch 31 is latched with an initial address of information to be newly written without being repeated.

In addition, the main address selection switch 15 is selected by the main address counter 13 and the sub address selection switch 35 is selected by the sub address counter 33.

Subsequently, when the write start signal (Write Start) is enabled, a signal divide8 of the write clock divided by eight is input to the main address counter 13 as a clock, and the main memory 20 is synchronized with the signal. ), And the servo information stored in the main memory 20 is output to the data filter 51 side, and each bit is used as a head selection signal, 8-bit servo information, a write status discrimination signal, and a sub memory selection signal. Are classified.

The head select signal (bits 8 to 11) is applied to the head selector 53 to select a predetermined head surface, and 8-bit servo information (bits 0 to 7) is used as a data switch unit ( 57) and is recorded on the head surface of the disk selected by the head selecting section.

The write discrimination signal (bit 15) is used to determine whether or not to record servo information, and is controlled by turning the data switch 57 on and off.

The sub memory selection signal (bit 13) is turned on only when recording servo information that is newly changed for each track to the disc. The data output of this bit is inputted to the clock of the address counter 33 of the sub memory and automatically. The sub memory 40 is selected according to the address of the sub memory 40, and the servo information stored in the sub memory 40 is output through the data switch unit 57.

The servo information through the data switch unit 57 is recorded on the specific head surface of the disk selected by the head selector 53 via the shift register 59.

The information for the next track is composed of only the portion to be changed, loaded into the sub memory 40, stored, and then repeated in the previous order.

Note that in the present invention, only the first track amount of information needs to be loaded into the main memory 20, and then only newly changing data needs to be loaded into the sub memory 40.

In addition, this method is very convenient because the main memory 20 only needs to calculate the initial address as much as desired information to designate the servo information.

In addition, a new method of increasing address of the sub memory 40 is unique in that it uses information extracted from the data of the main memory 20.

By doing this, it is a very convenient way to not only minimize the time to load into the memory, but also to use only two memories by newly recording some extremely small pieces of information, for example, track numbers.

As described above, the longer the recording density of the blank disk is, the longer the recording time of the servo information is. However, in the present invention, only one track is initially loaded into the main memory, and thereafter, less information is changed than one sector. By loading only bay into the sub memory, it is possible to minimize the load time and the write time to increase the hard disk production efficiency.

Claims (4)

A main memory for storing initial track information of one track in accordance with a main address and a control signal; A main controller for loading initial track information of one track into the main memory and outputting a main address latched in synchronization with a predetermined write start signal and a clock signal to the main memory; A sub memory for storing servo information changed for each track according to the sub address and a control signal; A sub controller which loads initial servo information changed for each track into the sub memory and outputs a latched sub address to the sub memory in synchronization with a predetermined clock signal; And The 16-bit servo information provided from the main memory is separated for each bit according to a predetermined control signal and a clock signal, and the head surface to write data and the servo information to be written are stored from the main memory or the sub memory according to the control information of each bit. And a write circuit unit which writes the servo information of the memory selected above to the disk after the selection. The method of claim 1, wherein the main control unit; An address latch for receiving and latching a main address signal for addressing the main memory; An address counter that counts each time a main address is transferred from the address latch and outputs a main address; And Hard disk servo information recording apparatus comprising: an address selection switch section for determining whether to load one track of servo information to an address output from the address counter in synchronization with a predetermined write clock signal and a write start signal . The apparatus of claim 1, further comprising: a light circuit unit; A data filter for dividing the 16-bit data output from the main memory into 8-bit upper control bytes and 8-bit lower servo information bytes, respectively; A head selector for selecting a head surface of a specific disk by separating a head select bit among 8-bit upper bytes separated from the data filter; A sub-memory selection unit for selecting an output of sub-memory data by separating sub-memory selection bits among 8-bit lower bytes separated from the data filter when data to be written on the disk head surface is data changed for each track; Determining whether or not to write the servo information to the disk by separating the write whether or not out of the 8-bit higher byte output from the data filter, and the main output from the main memory or the sub memory in accordance with the output signal of the sub memory selection unit Or a data switch unit controlling to output sub-servo information; And Hard disk servo information recording apparatus comprising: a shift register for converting parallel 8-bit servo information output through the data switch unit in synchronization with an externally written write clock signal to a predetermined head surface of a disk; . The method of claim 1, wherein the servo control unit; An address latch configured to receive and latch a sub address signal for addressing the sub memory; An address counter that increments an address in synchronization with a clock signal output from the sub memory selector, counts each time a sub address is transferred from the sub address latch, and outputs a sub address after counting the sub address; And And an address selection switch section for determining whether or not to load servo information changed for each track provided externally to an address output from the address counter.