KR100268302B1 - Lcd structure and its fabrication method - Google Patents

Abstract

PURPOSE: A method for manufacturing a liquid crystal display is provided to be capable of improving a screen quality by preventing a critical dimension loss from being caused at a pixel electrode. CONSTITUTION: A buffer layer(147) is formed by depositing the first insulation material on a glass substrate(101), and a gate electrode(111) and a gate wiring(113) are formed on the buffer layer with the first metal. A source electrode(121), a drain electrode(131), and a source wiring(123) intersected with the gate wiring are formed by depositing and patterning the second insulation material, a pure semiconductor material(133a), a doped semiconductor material(135a), and the second metal. Simultaneously, the impurity semiconductor material(135a) is removed which is exposed between the source electrode and the drain electrode. The third insulation layer is formed on the substrate. The third insulation layer(137), the semiconductor material(135) and the second insulation layer are removed except for the buffer layer. A pixel electrode(141) is formed by depositing and patterning a transparent conduction material. The pixel electrode is formed on the buffer layer and is connected to the drain electrode.

Description

Structure of Liquid Crystal Display and Manufacturing Method of Liquid Crystal Display

The present invention relates to a " liquid crystal display device " (or active matrix liquid crystal display (AMLCD)) including a thin film transistor (or thin film transistor (TFT)) arranged on a substrate and an active panel having a pixel electrode connected to the thin film transistor. The present invention relates to a structure of a liquid crystal display device according to the present invention, in particular, to improve the performance of a liquid crystal display device. In this case, the present invention relates to a manufacturing method for preventing various defects occurring in a pad part, which is a terminal part of internal wiring, and a structure of a liquid crystal display device by the manufacturing method.

Among the display devices that display image information on the screen, the CRT (or Cathode Ray Tube (CRT)), which has been widely used so far, is being replaced with a thin film flat panel display device that can be easily used in any place because of its thinness and lightness. The display device is the most active development research because the display resolution is superior to other flat panel devices, and the response speed is faster than that of the CRT when sphering a moving picture.

The driving principle of the liquid crystal display device is to use the optical anisotropy and polarization property of the liquid crystal. Since the structure is thin and long, the direction of the molecular arrangement can be controlled by artificially applying an electromagnetic field to liquid crystal molecules having directionality and polarization in the molecular arrangement. Therefore, if the orientation direction is arbitrarily adjusted, light can be transmitted or blocked according to the arrangement direction of the liquid crystal molecules by optical anisotropy of the liquid crystal, and thus it is applied to a screen display device. Nowadays, the active matrix liquid crystal display in which the thin film transistors and the pixel electrodes connected thereto are arranged in a matrix manner is excellent in providing high quality and natural colors. Looking at the structure of a general liquid crystal display device in detail as follows.

The liquid crystal display has a form in which two panels provided with various elements face each other and a liquid crystal layer is sandwiched therebetween. One panel of the liquid crystal display includes elements that implement color. This is often called "color filter panel". In the color filter panel, red (R), green (G), and blue (B) color filters are sequentially arranged along the positions of pixels designed in a matrix arrangement on a transparent substrate. Between these color filters, a very thin black matrix is formed. This prevents the appearance of mixed colors between each color. And a common electrode is formed in the color filter whole surface. The common electrode serves as one electrode for forming an electric field applied to the liquid crystal.

On the other panel of the liquid crystal display, switch elements and wirings for generating an electric field for driving the liquid crystal are formed. This is often called "active panel". In the active panel, pixel electrodes are formed along positions of pixels designed in a matrix manner on a transparent substrate. The pixel electrode faces the common electrode formed on the color filter panel and serves as the other electrode forming an electric field applied to the liquid crystal. Signal lines are formed along the horizontal array direction of the pixel electrodes, and data lines are formed along the vertical array direction. In one corner of the pixel electrode, a thin film transistor for applying an electric field signal to the pixel electrode is formed. The gate electrode of the thin film transistor is connected to the signal wiring (hence the signal wiring is called "gate wiring"), and the source electrode is connected to the data wiring (thus the data wiring is also called "source wiring"). ). The drain electrode of the thin film transistor is connected to the pixel electrode. At the ends of the gate wiring and the source wiring, gate pads and source pads, which are terminal terminals (or terminals) for receiving signals applied from the outside, are formed.

When an external electrical signal applied to the gate pad is applied to the gate electrode along the gate wiring, image information applied to the source pad is applied to the source electrode along the source wiring and is conducted to the drain electrode. If no electrical signal is applied to the gate electrode, the voltage signal applied to the source electrode overlapping the gate electrode is not transmitted to the drain electrode opposite the source electrode. Therefore, it is possible to determine whether to apply the data signal to the drain electrode by adjusting the signal of the gate electrode. Therefore, the data signal can be artificially transferred to the pixel electrode connected to the drain electrode. That is, the thin film transistor serves as a switch for driving the pixel electrode.

The two panels thus made are attached opposite each other at a certain interval (called the "cell gap"), and the liquid crystal material is filled therebetween. And a polarizing plate is affixed on both surfaces of the bonded panel, and the liquid crystal panel which is a part of a liquid crystal display device is completed.

The liquid crystal display may be manufactured in various ways, and the structure thereof is also various. In particular, many studies have been conducted to improve performance and reduce manufacturing costs. As a result, various structures and manufacturing methods have been introduced. Among the structures and manufacturing methods of various liquid crystal display devices known to date, there are the following manufacturing methods with a relatively small number of mask steps. 1 is a plan view illustrating the structure of a conventional liquid crystal display, and FIG. 2 is a cross-sectional view taken along the cutting line II-II of FIG.

A metal including chromium (Cr), aluminum (Al), tantalum (Ta), or the like is deposited on the transparent glass substrate 1, and patterned in a first mask process to form a gate electrode 11, a gate wiring 13, and The gate pad 15 is formed. The gate wirings are formed along a row array direction of pixels having a rectangle and arranged in a matrix array. The gate electrode 11 is formed at one corner of the pixels branched from the gate wiring 13 and arranged in a matrix arrangement. The gate pad 15 is formed at the end of the gate wiring (FIG. 2A).

The first inorganic insulating material 17a such as silicon nitride or silicon oxide, the intrinsic semiconductor material 33a such as pure amorphous silicon, and the amorphous silicon to which impurities are added are formed on the entire surface of the substrate on which the gate electrode 11 or the like is formed. The semiconductor material 35a to which the impurity is added and metals containing chromium are successively deposited. The metal including chromium is patterned in a second mask process to form the source electrode 21, the drain electrode 31, the source wiring 23, and the source pad 25. The source electrode 21 overlaps one side of the gate electrode 11 with the intrinsic semiconductor material 33a and the impurity semiconductor material 35a therebetween. The drain electrode 31 faces the source electrode 21 and overlaps the other side of the gate electrode 11. The source wiring 23 is a wiring connecting the electrodes in the column array direction among the source electrodes 21. The source pad 25 is formed at the end of the source wiring 23 and is connected to an external video signal terminal (FIG. 2B). The impurity semiconductor layer is continuously etched by using a source electrode 21, a source wiring 23 formed of the chromium metal layer, and a layer made of a semiconductor material 35a to which underlying impurities are added using the drain electrode 31 as a mask. (35) is formed. The impurity semiconductor layer 35 is in ohmic contact with the source electrode 21, the source wiring 23, and the drain electrode 31 (FIG. 2C).

A protective film 37 is formed by coating a second inorganic insulating material such as SiN _x on the entire surface of the substrate on which the source electrode 21 and the like are formed. In addition, the semiconductor layer 33 serving as a channel may be formed in a portion where the gate electrode 11 is formed by patterning the first inorganic insulating material 17a, the intrinsic semiconductor material 33a, and the passivation layers 37 by a third mask process. ). The drain contact hole 71, the gate pad contact hole 59, and the source pad contact hole 69 are formed. At this time, the inorganic materials covering the gate pad 15 and the source pad 25 are removed to completely expose the gate pad 15, the source pad 25, and a part of the organic substrate 1. An impurity semiconductor material 35a and an intrinsic semiconductor material 33a, which are dummy thin film layers, remain under the source pad 25. Then, a part of the drain electrode 31 is exposed through the drain contact hole 71 (FIG. 2D).

Indium Tin Oxide (ITO) is deposited on the passivation layer 37 and patterned by a fourth mask process to form the pixel electrode 41, the gate pad connection terminal 57, and the source pad connection terminal 67. The pixel electrode 41 is connected to the drain electrode 31 through the drain contact hole 71. The gate pad connection terminal 57 is connected to the gate pad 15 through the gate pad contact hole 59. The source pad connection terminal 67 is connected to the source pad 25 through the source pad contact hole 69 (FIG. 2E).

The manufacturing method of the liquid crystal display device described above has an advantage in that the number of mask steps is relatively small to increase the production yield. However, in the third mask process of patterning three layers of the second inorganic insulating material, the semiconductor material, and the first inorganic insulating material by dry etching, the surface of the glass substrate under the first inorganic insulating material is exposed to the dry etching water. Inevitably exposed. The dry etching method used in this pattern process is as follows. A gas including an F group is injected into an etching chamber in which an etching target is located, and RF is operated to make the gas into a plasma state to perform etching. In fact, in the dry etching method of the present invention, CF 4 + O 2 + He gas is introduced into the etching chamber at a flow rate of 240 sccm, 40 sccm, and 200 sccm, respectively, and the gas is dried by using an RF power having an energy of 1500 Watts. Perform etching. At this time, the glass surface is attacked by the etching gas, and as a result, the glass surface has a significantly curved shape.

Then, in the subsequent formation of the pixel electrode with ITO, if ITO is deposited on the highly curved glass surface, the surface of the ITO also has a severely curved shape. Moreover, ITO deposited on surfaces with severe curvatures is deposited with an uneven deposition thickness. As a result, when the pixel electrode is formed by patterning the ITO layer deposited in the fourth mask process, as shown in FIGS. 3A and 3B, the thinly deposited portion of the ITO is etched to form a pixel electrode having a scratched rectangular shape. do. Particularly, the shape of the pixel electrode is damaged due to the adhesion problem between the ITO and the glass surface. This damage results in a reduction in the size and shape of the pixel electrode. This is often called CD (critical dimension) loss.

When the CD loss occurs, the shape of the pixel electrode is not formed according to the originally designed standard, and the shape of the electric field to be formed by the pixel electrode is deformed by that much, or the intensity of the electric field is changed. As a result, the driving of the liquid crystal becomes uneven or a desired driving cannot be caused, resulting in a problem of deterioration in image quality of the liquid crystal display.

An object of the present invention is to prevent CD loss from occurring in the pixel electrode pattern. It is another object of the present invention to provide a liquid crystal display device having high quality image quality by preventing CD loss from occurring in the pixel electrode.

1 is an enlarged plan view showing the structure of a liquid crystal display device according to the prior art.

2 is a cross-sectional view illustrating a process of manufacturing a liquid crystal display according to the related art.

3A is a cross-sectional view illustrating in detail a structure of a portion in which a pixel electrode is formed in a liquid crystal display device manufactured according to the prior art.

3B is a plan view illustrating in detail the structure of a portion in which a pixel electrode is formed in a liquid crystal display manufactured in the related art.

4 is an enlarged plan view showing the structure of a liquid crystal display device according to the present invention.

5 is a cross-sectional view illustrating a process of manufacturing a liquid crystal display device according to the present invention.

FIG. 6A is a cross-sectional view illustrating in detail the structure of a portion in which a pixel electrode is formed in a liquid crystal display according to the present invention.

FIG. 6B is a plan view showing in detail the structure of a portion where a pixel electrode is formed in the liquid crystal display according to the present invention.

<Explanation of symbols for main parts of drawing>

1, 101: substrate 11, 111: gate electrode

13, 113: gate wiring 15, 115: gate pad

17, 117: gate insulating film 17a, 117a: first inorganic insulating material

147: buffer layer 21, 121: source electrode

23, 123: source wiring 25, 125: source pad

31 and 131: drain electrodes 33 and 133: semiconductor layer

35, 135: impurity semiconductor layers 33a, 133a: intrinsic semiconductor material

35a, 135a: semiconductor material to which impurities are added

37, 137: protective film 4, 141: pixel electrode

57, 157: gate pad connection terminal 59: gate pad contact hole

67, 167: source pad connection terminal 69: source pad contact hole

71, 171: drain contact hole

In the present invention, a buffer layer is formed of an inorganic insulating material on a glass substrate as follows so as to prevent CD loss from occurring in the pixel electrode patterning process. As a result, since the buffer layer protects the surface of the glass substrate in various etching processes used before the deposition of ITO used for the pixel electrode, the surface of the substrate can maintain a smooth surface. Therefore, CD loss does not occur when forming the pixel electrode. The present invention will be described in more detail with reference to the following examples. 4 is a cross-sectional view taken along the cut line V-V of FIG. 4 and FIG.

EXAMPLE

A first inorganic insulating material such as silicon oxide or silicon nitride is deposited on the transparent glass substrate 101 to form the buffer layer 147.

A metal including chromium (Cr), aluminum (Al), tantalum (Ta), and the like is deposited on the substrate 101 on which the buffer layer 147 is formed, and patterned using a first mask process to form a gate electrode 111, The gate wiring 113 and the gate pad 115 are formed. The gate wiring 113 is formed along a row array direction of pixels having a rectangular shape and arranged in a matrix array. The gate electrode 111 is formed at one corner of the pixels branched from the gate wiring 113 and arranged in a matrix arrangement. The gate pad 115 is formed at the end of the gate wiring 113 (FIG. 5A).

The second inorganic insulating material 117a such as silicon nitride or silicon oxide, the intrinsic semiconductor material 133a such as pure amorphous silicon, and the amorphous silicon to which impurities are added are formed on the entire surface of the substrate where the gate electrode 111 or the like is formed. The semiconductor material 135a to which the impurity is added and metals containing chromium are successively deposited. The metal including chromium is patterned in a second mask process to form a source electrode 121, a drain electrode 131, a source wiring 123, and a source pad 125. The source electrode 121 overlaps one side of the gate electrode 111 with the intrinsic semiconductor material 133a and the impurity semiconductor material 135a interposed therebetween. The drain electrode 131 faces the source electrode 121 and overlaps the other side of the gate electrode 11. The source wiring 23 is a wiring connecting the electrodes in the column array direction among the source electrodes 21. The source pad 125 is formed at the end of the source wiring 123 and is connected to an external video signal terminal (FIG. 5B). The impurity semiconductor layer is continuously etched by using a source electrode 121 formed of the chromium metal layer, a source wiring 123, and a layer made of a semiconductor material 135a to which underlying impurities are added using the drain electrode 131 as a mask. And form 135. The impurity semiconductor layer 135 is in ohmic contact with the source electrode 121, the source wiring 123, and the drain electrode 131 (FIG. 5C).

A protective film 137 is formed by coating a third inorganic insulating material such as silicon oxide or silicon nitride on the entire surface of the substrate on which the source electrode 121 and the like are formed. In addition, the second inorganic insulating material 117a, the intrinsic semiconductor material 133a, and the passivation layer 137 may be patterned in a third mask process to form a gate layer 111 on the semiconductor layer 133, which serves as a channel. ). The drain contact hole 171, the gate pad contact hole 159, and the source pad contact hole 169 are formed. At this time, the first inorganic insulating material 117a covering the gate pad 115 and the source pad 125 and the passivation layer 137 are completely removed to remove the gate pad 115 and the source pad 125. A portion of the buffer layer 147 deposited on the substrate 101 is completely exposed. An impurity semiconductor material 135a and an intrinsic semiconductor material 133a, which are dummy thin film layers, remain under the source pad 125. A part of the drain electrode 131 is exposed through the drain contact hole 171 (FIG. 5D).

Indium Tin Oxide (ITO) is deposited on the passivation layer 37 and the exposed buffer layer 147 and patterned using a fourth mask process to form the pixel electrode 141, the gate pad connection terminal 157, and the source pad connection terminal. 167 is formed. The pixel electrode 141 is connected to the drain electrode 131 through the drain contact hole 171. The gate pad connection terminal 157 is connected to the gate pad 115 through the gate pad contact hole 159. The source pad connection terminal 167 is connected to the source pad 125 through the source pad contact hole 169 (FIG. 5E).

As a result, as shown in FIG. 6A, the pixel electrode 141 is formed on the buffer layer 147 having a smooth surface, and the thickness thereof is uniformly formed. In addition, the outer shape of the pixel electrode also has a smooth rectangular shape almost the same as the originally designed shape (FIG. 6B). Therefore, it can be seen that the CD loss is much less than in the conventional liquid crystal display.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of improving the roughness of the surface of a glass substrate generated by a dry etching method used in the manufacture of an active substrate used in a liquid crystal display. Various elements constituting the active panel are formed by repeated deposition and etching several times. In particular, in the manufacturing method using a small number of mask processes used for etching to simplify the manufacturing process, when etching the insulating film and the semiconductor layer, etc., which are superimposed on the glass substrate at the same time, the surface of the glass substrate becomes uneven due to the etching water . Subsequently, when the pixel electrode is formed, many differences occur in the shape of the pixel electrode formed on the uneven glass substrate compared with the shape originally designed. That is, the edge shape of the pixel electrode having a rectangular shape is uneven, or various parts inside the pixel electrode are torn off. As a result, the shape and intensity of the electric field generated at the pixel electrode are not normally formed, resulting in poor image quality of the liquid crystal display.

In the case of using such a manufacturing method, in the present invention, when the inorganic insulating material is first deposited on the glass substrate to form a buffer layer, and then various elements constituting the active substrate are formed, the glass substrate is directly etched in the etching process. No contact. However, the buffer layer is exposed to etching water, and the surface of the buffer layer made of an inorganic insulating material remains even even when attacked by the etching material. Therefore, when the pixel electrode is subsequently formed, the shape of the pixel electrode has the same shape as originally designed. As a result, the shape and intensity of the electric field formed in the pixel electrode are the same as the designed ones, and uniform and good image quality can be obtained.

In addition, even if the surface of the glass substrate is used according to the present invention, a smooth substrate surface is obtained with a buffer layer made of an inorganic insulating material formed on the glass substrate. Therefore, good fabrication results were obtained not only in pixel electrodes but also in forming other elements constituting an active panel such as thin film transistors.

Claims (10)

Depositing a first insulating material on the glass substrate to form a buffer layer; Forming a gate electrode and a gate wiring on the buffer layer with a first conductive material; A second insulating material, a pure semiconductor material, a semiconductor material doped with impurities, and a second conductive material are stacked and patterned on the glass substrate on which the gate electrode and the gate wiring are formed to cross the source electrode, the drain electrode, and the gate wiring. Forming a source wiring and removing an impurity semiconductor material exposed between the source electrode and the drain electrode; Forming a third insulating layer by coating a third insulating material on the substrate on which the source electrode and the drain electrode are formed; Etching leaving only the buffer layer of the third insulating layer, the semiconductor material, the second insulating layer and the buffer layer, which are stacked in an area defined by the gate wiring and the source wiring crossing each other; And depositing and patterning a transparent conductive metal on the entire surface of the substrate on which the second and third insulating layers and the semiconductor layer are etched to form a pixel electrode formed on the buffer layer and connected to the drain electrode. Method for manufacturing array substrate for device. The method of claim 1, further comprising: forming a source electrode, a drain electrode, a source wiring, and an impurity semiconductor layer using the pure semiconductor material, the semiconductor material to which impurities are added, and the second conductive material on the second insulating material; Depositing a third insulating material on the substrate on which the source electrode and the drain electrode are formed; Patterning the deposited third insulating material, the semiconductor material, and the second insulating material to form a semiconductor layer, a gate insulating film, and a protective film; And the pixel electrode is formed to be connected to the drain electrode on the passivation layer. When the third insulating material, the semiconductor material, and the second insulating material are patterned, the passivation layer covers a portion where the gate wiring, the source wiring, the gate electrode, the source electrode, and the drain electrode are formed. And a portion of the gate pad, the source pad, and the drain electrode is formed by exposing a contact hole, and a portion of the pixel electrode is formed to expose the buffer layer. The method of claim 1, wherein the first insulating material and the second insulating material comprise any one selected from the group consisting of silicon oxide and silicon nitride. . The method of claim 2, wherein the third insulating material comprises any one selected from the group consisting of silicon oxide and silicon nitride. A substrate; A buffer layer covering an entire surface of the substrate; A gate electrode formed on the buffer layer; A gate wiring connecting the gate electrode; A gate insulating film covering the gate electrode and the gate wiring; And a pixel electrode formed on the buffer layer. The semiconductor device of claim 6, further comprising: a semiconductor layer formed on the gate electrode portion on the gate insulating film; A source electrode overlapping one side of the gate electrode with the semiconductor layer interposed therebetween; A drain electrode facing the source electrode and overlapping the other side of the gate electrode with the semiconductor layer interposed therebetween; A protective film covering all of the source electrodes, all of the source wirings, and a part of the drain electrode; A gate pad connection terminal connected to the gate pad; A source pad connection terminal further connected to the source pad; The pixel electrode is connected to a part of the drain electrode. The liquid crystal display of claim 7, wherein the gate insulating film, the semiconductor material, and the protective film are formed only at a portion where the gate wiring, the source wiring, the gate electrode, the source electrode, and the drain electrode are formed. The liquid crystal display device according to any one of claims 6 to 8, wherein the buffer layer and the gate insulating film comprise any one selected from the group consisting of silicon oxide and silicon nitride. The liquid crystal display device according to claim 7, wherein the protective film comprises any one selected from the group consisting of silicon oxide and silicon nitride.

Images