KR100257502B1 - Shifter operated without cluck - Google Patents

Abstract

PURPOSE: A shift operating unit operated without a clock is provided to perform a shift operation at high speed by processing whole operation course as a simple logic without a special clock for operation. CONSTITUTION: A control unit(100) generates a buffer select signal from past values and present values of a direction input, an edge select input, and a shift pulse input. A present value providing unit(200) provides a shift present value. A right shift value providing unit(300) provides a value shifted to the right as much as one unit on the basis of the present value. A left shift value providing unit(400) provides a value shifted to the left as much as one unit on the basis of the present value.

Description

Shift operated without clock {Shifter operated without cluck}

The present invention relates to a shift calculation device that does not require a clock that solves the time delay problem of a conventional shift calculation device that requires a separate clock for calculation among various elements constituting a logic calculation device widely used in industrial control equipment.

In general, industrial control equipment such as a logic control module of a distributed control system (DCS), a general-purpose programmable logic controller (PLC), and the like control a given input / output signal to a logic such as an AND gate, an OR gate, or an inverter NOT. Operators can perform the desired sequential control by operating counters, timers, shift registers, and drum programmers with the input and output signals.

Such logic operation may be implemented using software, but in most cases, high-speed operation is required, so it is implemented using dedicated logic operation hardware. Such logic operation hardware generally includes a program memory, an input / output data memory, and an operation unit as follows. The operation type is similar to a general CPU, and the following operation is repeated.

Read logic operation instructions from program memory

입출력 Read I / O data from I / O data memory according to command.

연산 After processing according to the instruction

Write to the I / O data memory

This operation is generally made of a single system clock, and the operation of V at the rising edge of the system clock is performed, the operation of V and V is performed while rising, and the operation of V is performed at the falling edge.

However, unlike the logical operators such as AND gate, AND gate, OR, and NOT, the shift operator is composed of existing general shift registers. A separate clock is required for operation, and the shift register shifts to the right or left on the rising or falling edge of this clock. That is, the existing shift register operates in the following steps.

현재 Load the current value of the shift register

입력 Determines the input that determines the clock edge and shift direction

Generate and shift the clock to shift the shift register to the right or left.

Therefore, the existing shift operation unit requires at least two different clocks in two operations of loading the current value of the shift register and generating a clock. Thus, the shift register operation is a common AND gate and an OR gate. Unlike the logic operators such as the inverter (NOT), there was a problem that required three times the processing time.

The present invention has been made to solve the above problems, and unlike the conventional shift operation apparatus, there is no need for a separate clock for operation, and thus an object thereof is to provide a shift operation apparatus capable of high-speed logic operation.

1 is a block diagram of a preferred embodiment of a shift operation apparatus operating without a clock according to the present invention.

2 is an exemplary view of a logic table of a control unit according to the present invention.

Figure 3 is a detailed configuration diagram of an embodiment of the right shift value providing unit according to the present invention.

Figure 4 is a detailed configuration of one embodiment the left shift value providing unit according to the present invention.

* Explanation of symbols for the main parts of the drawings

100: control unit 200: present value providing unit

201,301,401: Data buffer 300: Right shift value providing unit

400: left shift value providing unit

In order to achieve the above object, the present invention provides a shift computing device operating without a clock, comprising: control means for determining a shift direction and whether to shift and generating a corresponding selection signal; And after the shift current value I input from the outside is stored to the right by a predetermined unit according to the shift data Si input from the outside, to the first selection signal SR from the control means. And a right shift value providing means for outputting accordingly.

In addition, the present invention is characterized in that the second selection signal SL from the control means after storing the shifted current value I is shifted to the left by the predetermined unit according to the shift data Si. Means for providing a left shift value for outputting in accordance with; And a present value providing means for receiving and storing the shift present value I from the outside and outputting the shift current value I as it is according to the third selection signal SC input from the control means.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a configuration diagram of a preferred embodiment of a shift operation apparatus operating without a clock according to the present invention, in which "100" represents a direction input, an edge selection input, and a shift pulse input from a past value and a present value of a shift operation. A control unit for generating a buffer selection signal, "200" inputs a shift current value, and a current value providing unit providing a shift current value when its buffer selection signal is turned on, and "300" inputs a shift current value. If the own buffer selection signal is ON, the right shift value providing unit which provides a shifted value by one unit to the right, and "400" inputs the shift current value, When it is ON, the left shift value providing unit, "201, 301, 401", which provides a shifted value by one unit to the left, indicates a data buffer, respectively.

The operation of the shift operation unit that does not require a clock for logic operation is as follows.

First, the controller 100 receives and processes control input signals such as a direction input, an edge selection input, a past value of the shift pulse input, and a present value of the shift pulse input generated from a logic operation result up to the present, respectively, to set the present value. A buffer selection signal for selecting the study 200, the right shift value providing unit 300, and the left shift value providing unit 400 is generated. At the same time, the present value providing unit 200 receives the shift present value and prepares the present value, and the right shift value providing unit 300 receives the shift present value and prepares the present value shifted to the right by one unit. The left shift value providing unit 400 receives the shift current value and prepares a shifted value of the current value to the left by one unit. Next, when a buffer selection signal generated according to the operation result of the controller 100 is generated, any one of a current value, a right shift value, and a left shift value is selected and output according to the buffer selection signal. In this manner, the shift calculation apparatus according to the present invention can obtain a shift calculation result without a clock.

Next, the configuration and operation of the shift operation apparatus that does not require a clock for logic operation as described above will be described in detail with reference to FIGS. 2 to 4.

First, the control unit 100 of the shift operation apparatus that does not require a clock for logic operation according to the present invention, the direction input a, the edge selection input b, the past value c of the shift pulse input, the shift pulse from the logic operation results to date A present value buffer selection signal SC for selecting the present value providing unit 200 by receiving and processing a control signal such as an input present value d, a right shift value buffer selecting signal SR for selecting the right shift value providing unit 300, The left shift value buffer selection signal SL for selecting the left shift value providing unit 400 is generated. In this case, the buffer selection signal generation method may be generated by a logic table as shown in FIG. 2.

In addition, the present value providing unit 200 of the shift operation apparatus receives the shift present value I and stores it in the data buffer 201 and outputs the shift present value I as it is when its buffer selection signal SC is ON. .

Then, the right shift value providing unit 300 of the shift calculator receives the shift data Si from the outside and stores the shifted current value I input from the outside in the data buffer 301 by one unit to the right. When its buffer selection signal SR is ON, the current value is shifted to the right by one unit.

At this time, as a preferred embodiment of the right shift value providing unit 300 can be configured as shown in FIG. The input and output of the buffer are arranged in a shifted form in order to obtain a shift effect. The inputs of the buffer are I1, I2 .... In, Si, and the corresponding outputs are D0, D1, It consists of D2 ... Dn.

On the other hand, the left shift value providing unit 400 of the shift operation apparatus receives the shift data Si from the outside and stores the shifted current value I input from the outside in the data buffer 401 by one unit to the left. When its buffer selection signal SL is ON, the current value is shifted to the left by one unit.

At this time, as a preferred embodiment of the left shift value providing unit 400 can be configured as shown in FIG. In this case, the input and output of the buffer are arranged in a shifted form to obtain a shift effect. In this case, the input of the buffer is Si, I0, I1 ... I (n-1), and correspondingly The output is composed of D0, D1, D2 .... Dn.

Therefore, when the buffer selection signal generated according to the operation result is generated, the shift operation apparatus according to the present invention outputs one of the present value, the right shift value, and the left shift value, so that the shift operation result D can be obtained without a clock. do.

For example, if we define the right input data of 8-bit bidirectional shift register as SRD and the left input data (LSB) as SLD and each bit of original data before shift is defined as I0-I7, we can expect The output is one of three things when arranged in bits.

(1) When shift does not occur I7, I6, ..., I2, I1, I0

(2) If shift occurs to the left, I6, I5 ....., I1, I0, SLD

(3) If shift occurs to the right, SRD, I7, I6, ....., I3, I2, I1

Therefore, by arranging the input and output of the buffer as described above and turning on one of these three conditions according to the condition, it is possible to implement an operation device that can perform a shift operation without a clock.

The present invention described above is capable of various substitutions, modifications, and changes without departing from the spirit of the present invention for those skilled in the art to which the present invention pertains, and the above-described embodiments and accompanying It is not limited to the drawing.

According to the present invention configured and operated as described above, unlike a conventional shift operation apparatus, a separate clock for operation is not required, and since the entire operation process is processed only with simple logic, the processing time for operation is determined by the logic circuit. Since there is only a pure propagation delay time, there is an effect that the shift operation can be performed at a very high speed as compared with the conventional shift operation apparatus.

Claims (7)

In a shift operation device that operates without a clock, Control means for determining a shift direction and whether to shift and generating a corresponding selection signal; And The shift current value I input from the outside stores the shifted value to the right by a predetermined unit according to the shift data Si input from the outside, and then according to the first selection signal SR from the control means. Mean for providing right shift value for output Shift computing device comprising a. The method of claim 1, Left shift for storing the shift current value I to the left according to the shift data Si to the left by the predetermined unit and outputting the shifted value according to the second selection signal SL from the control means. A means of providing a value Shift operation unit further comprising. The method of claim 2, The present value providing means for receiving and storing the shift present value I from the outside and outputting it as it is according to the third selection signal SC input from the control means. Shift operation unit further comprising. The method of claim 3, wherein The control means, The current selection is performed by receiving a direction input, an edge selection input, a past value of the shift pulse input, and a present value of the shift pulse input from the logic operation result up to the present to select the present value providing means. A second selection signal SL for outputting to the value providing means, for outputting a first selection signal SR for selecting the right shift value providing means to the right shift value providing means, and for selecting the left shift value providing means. Outputting means to the left shift value providing means. The method according to claim 3 or 4, The present value providing means, A shift operation unit, characterized in that configured as a buffer. The method according to any one of claims 1 to 4, The right shift value providing means, And a buffer, wherein the input / output of the buffer is arranged correspondingly so that the input value of the buffer is shifted and output by the predetermined unit to the right. The method according to any one of claims 2 to 4, The left shift value providing means, And a buffer, wherein the input / output of the buffer is arranged correspondingly so that the input value of the buffer is shifted and output by the predetermined unit to the left.

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