KR100256262B1 - Method for forming inter layer insulating layer of semiconductor device - Google Patents

Method for forming inter layer insulating layer of semiconductor device Download PDF

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KR100256262B1
KR100256262B1 KR1019970030140A KR19970030140A KR100256262B1 KR 100256262 B1 KR100256262 B1 KR 100256262B1 KR 1019970030140 A KR1019970030140 A KR 1019970030140A KR 19970030140 A KR19970030140 A KR 19970030140A KR 100256262 B1 KR100256262 B1 KR 100256262B1
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ferroelectric
film
forming
layer
interlayer insulating
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KR1019970030140A
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KR19990005918A (en
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강응열
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김영환
현대전자산업주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment

Abstract

PURPOSE: A method for forming an interlayer dielectric is to minimize damage of a ferroelectric capacitor due to a hydrogen gas included in a source gas in a process of forming the interlayer dielectric on the capacitor. CONSTITUTION: On a semiconductor substrate(20), a ferroelectric capacitor is formed composed of a lower electrode(21), a ferroelectric layer(22) and an upper electrode(23). A polysilicon layer(24) is deposited on the entire structure. The polysilicon layer is annealed at 500 to 900 deg.C in an oxygen atmosphere to oxidize it and to simultaneously diffuse the excess oxygen into the ferroelectric layer. The oxidized polysilicon layer acts as a barrier against a reducing gas in a subsequent interlayer dielectric forming process. Further, the ferroelectric layer recovers ferroelectric properties through the diffusion of oxygen. Finally, an interlayer dielectric(25) is formed on the polysilicon layer.

Description

반도체 장치의 층간절연막 형성 방법{METHOD FOR FORMING INTER LAYER INSULATING LAYER OF SEMICONDUCTOR DEVICE}METHODS FOR FORMING INTER LAYER INSULATING LAYER OF SEMICONDUCTOR DEVICE}

본 발명은 일반적으로 반도체 장치 제조 방법에 관한 것으로 특히, 환원 기체에 의한 강유전체 캐패시터의 특성 저하를 방지할 수 있는, 강유전체 캐패시터를 포함한 반도체 장치의 층간절연막 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to a method for manufacturing a semiconductor device, and more particularly, to a method for forming an interlayer insulating film of a semiconductor device including a ferroelectric capacitor, which can prevent deterioration of characteristics of the ferroelectric capacitor due to a reducing gas.

종래의 강유전체를 사용하는 기억 소자의 층간절연막으로서 플라즈마 화학 기상 증착법(plasma enhanced chemical vapor deposition)으로 형성되는 산화막을 이용한다. 플라즈마 화학 기상 증착법으로 산화막을 형성하기 위하여 소오스로 환원성 가스인 수소를 사용하는데 이때 패터닝된 강유전 캐패시터가 수소에 노출되어 강유전체의 전하 저장 능력이 감소하는 문제가 발생한다.An oxide film formed by plasma enhanced chemical vapor deposition is used as an interlayer insulating film of a memory element using a conventional ferroelectric. Hydrogen, a reducing gas, is used as a source to form an oxide film by plasma chemical vapor deposition. In this case, the patterned ferroelectric capacitor is exposed to hydrogen, thereby reducing the charge storage capability of the ferroelectric.

도1은 종래 기술에 따른 강유전체를 기억 소자로 사용하는 반도체 장치의 일부를 도시한 단면으로서, 하부전극(11), 강유전체막(12), 상부전극(13)으로 이루어지는 강유전체 캐패시터 형성이 완료된 반도체 기판(10) 상에 층간절연막(14)을 형성하고 금속막(15)을 증착하여 금속 배선을 형성한 것을 나타낸 것이다. 도시한 바와 같이 층간절연막(14)이 캐패시터와 직접 접촉하기 때문에 층간절연막 형성시 사용되는 환원가스로부터 영향을 받게된다. 즉, 층간절연막 증착시 일반적으로 사용되는 수소 가스는 강유전체내의 산소와 결합하여 페로브스카이트(perovskite) 구조를 이루는 산소의 팔면체(octahedral) 구조를 변형, 또는 파괴시키게 되어 강유전 성질이 저하되어 소자의 정보 저장 능력이 감소하는 문제가 발생된다.FIG. 1 is a cross-sectional view of a portion of a semiconductor device using a ferroelectric material according to the prior art as a storage element. A semiconductor substrate having a ferroelectric capacitor formed of a lower electrode 11, a ferroelectric film 12, and an upper electrode 13 completed. The interlayer insulating film 14 was formed on (10), and the metal film 15 was deposited, and metal wiring was formed. As shown in the figure, since the interlayer insulating film 14 is in direct contact with the capacitor, the interlayer insulating film 14 is affected by the reducing gas used in forming the interlayer insulating film. That is, hydrogen gas generally used in the deposition of an interlayer dielectric film deforms or destroys the octahedral structure of oxygen, which is combined with oxygen in the ferroelectric to form a perovskite structure, resulting in deterioration of ferroelectric properties. There is a problem of reduced information storage capacity.

강유전체의 전하 저장 능력의 감소는 기억 소자 동작에 있어 오동작 및 불량을 초래하는 단점이 있다.The reduction of the charge storage capability of the ferroelectric has the disadvantage of causing malfunctions and defects in the operation of the memory element.

상기와 같은 문제점을 해결하기 위한 본 발명은 강유전체 캐패시터 상에 층간절연막을 형성하는 과정에서 수소 가스로 인한 강유전체 캐패시터의 손상을 최소화 할 수 있는 강유전체 캐패시터를 포함한 반도체 장치의 층간절연막 형성 방법을 제공하는데 그 목적이 있다.The present invention for solving the above problems provides a method for forming an interlayer insulating film of a semiconductor device including a ferroelectric capacitor that can minimize the damage of the ferroelectric capacitor due to hydrogen gas in the process of forming an interlayer insulating film on the ferroelectric capacitor. There is a purpose.

도1은 종래 기술에 따른 강유전체 캐패시터를 포함한 반도체 장치의 층간절연막 형성 단면도.1 is a cross-sectional view of forming an interlayer dielectric film of a semiconductor device including a ferroelectric capacitor according to the prior art.

도2a 및 도2b는 본 발명의 일실시예에 따른 강유전체 캐패시터를 포함한 반도체 장치의 층간절연막 형성 공정 단면도.2A and 2B are cross-sectional views of an interlayer insulating film forming process of a semiconductor device including a ferroelectric capacitor according to an embodiment of the present invention.

* 도면의 주요 부분에 대한 설명* Description of the main parts of the drawing

10, 20: 반도체 기판 11, 21: 하부전극10, 20: semiconductor substrate 11, 21: lower electrode

12, 22: 강유전체막 13, 23: 상부전극12, 22: ferroelectric film 13, 23: upper electrode

14, 25: 층간절연막 15: 금속막14 and 25: interlayer insulating film 15: metal film

24: 폴리실리콘막24: polysilicon film

상기 목적을 달성하기 위한 본 발명은 소정의 하부층이 형성된 반도체 기판 상에 하부전극, 강유전체막 및 상부전극으로 이루어지는 강유전체 캐패시터를 형성하는 단계; 전체 구조 상에 폴리실리콘막을 증착하는 단계; 상기 폴리실리콘막을 산화하여 실리콘산화막을 형성하면서 상기 강유전체막에 산소를 확산시키는 단계; 및 상기 전체 구조에 층간절연막을 형성하는 단계를 포함하는 반도체 장치의 층간절연막 형성 방법을 제공한다.The present invention for achieving the above object is a step of forming a ferroelectric capacitor consisting of a lower electrode, a ferroelectric film and an upper electrode on a semiconductor substrate having a predetermined lower layer; Depositing a polysilicon film on the entire structure; Diffusing oxygen into the ferroelectric film while oxidizing the polysilicon film to form a silicon oxide film; And forming an interlayer insulating film in the entire structure.

본 발명은 수소 가스의 영향을 최소화하기 위하여 강유전체 캐패시터 위에 폴리실리콘막을 증착한 후 산화시키고 강유전체 캐패시터가 보호된 상태에서 층간절연막을 형성하여 수소 가스로 인한 강유전체의 손상을 방지하는 방법이다.The present invention is a method for preventing the damage of the ferroelectric due to hydrogen gas by depositing a polysilicon film on the ferroelectric capacitor and then oxidizing to form an interlayer insulating film in a state where the ferroelectric capacitor is protected in order to minimize the influence of hydrogen gas.

상기 폴리실리콘 증착시 환원가스가 포함된 소오스에 의해 강유전체의 특성이 저하되지만 후속 산화 공정을 통하여 폴리실리콘을 실리콘 산화막으로 형성시키는 동시에 강유전체를 다시 산화시킴으로써 원래의 강유전체 특성을 회복할 수 있는 방법이다.Although the characteristics of the ferroelectric are deteriorated by the source containing the reducing gas when the polysilicon is deposited, it is a method of restoring the original ferroelectric properties by forming polysilicon as a silicon oxide film through a subsequent oxidation process and oxidizing the ferroelectric again.

이하, 첨부된 도면을 참조하여 본 발명을 상세히 살펴본다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

도2a 내지 도2b는 본 발명의 일실시예에 따른 강유전체를 포함한 반도체 장치의 층간 절연막 형성 공정 단면도이다.2A to 2B are cross-sectional views of an interlayer insulating film forming process of a semiconductor device including a ferroelectric material according to an embodiment of the present invention.

먼저, 도2a에 도시한 바와 같이 소정의 하부층이 형성된 반도체 기판(20) 상에 하부전극(21), 강유전체막(22), 상부전극(23)으로 이루어지는 강유전체 캐패시터를 형성하고 전체 구조 상에 폴리실리콘막(24)을 증착한다. 이때 상기 폴리실리콘막(24)을 증착하는 소오스로 SiH4와 같은 수소가 포함된 물질이 사용되므로 상기 폴리실리콘막(24) 증착후의 강유전체는 그 특성이 크게 저하된다.First, as shown in FIG. 2A, a ferroelectric capacitor including a lower electrode 21, a ferroelectric film 22, and an upper electrode 23 is formed on a semiconductor substrate 20 on which a predetermined lower layer is formed. The silicon film 24 is deposited. At this time, since the hydrogen-containing material such as SiH 4 is used as the source for depositing the polysilicon film 24, the characteristics of the ferroelectric after deposition of the polysilicon film 24 are greatly reduced.

이어서, 상기와 같은 강유전 특성의 저하를 회복시키기 위하여 노(爐, furnace)를 이용한 열처리 방법이나 급속 열처리(RTA, rapid thermal annealing) 방법으로 약 500 내지 900 ℃의 온도 범위의 산소 분위기에서 상기 폴리실리콘막(24)을 산화시킴과 동시에 여분의 산소가 SiO2와 강유전체의 계면을 통하여 확산되도록 한다. 상기와 같은 산소 분위기에서 실시하는 열처리 과정에서 폴리실리콘을 층분히 산화시켜 증착된 폴리실리콘막(24)을 모두 SiO2막으로 바꾸어 이후의 층간절연막 형성 공정에서 환원 가스에 대한 장벽 역할을 하도록 한다. 또한, 상기 열처리 과정에서 충분한 산소 공급을 하여 산소가 SiO2막을 통하여 강유전체까지 확산되도록 한다. 따라서 강유전체에 상기 열처리 공정으로 충분한 산소 및 열에너지가 공급되므로 상기 폴리실리콘막(24) 증착시 수소에 의해 열화된 페로브스카이트 구조가 복구되어 강유전 성질을 회복하게 된다.Subsequently, in order to recover the degradation of the ferroelectric properties, the polysilicon is formed in an oxygen atmosphere in a temperature range of about 500 to 900 ° C. by a heat treatment method using a furnace or a rapid thermal annealing (RTA) method. At the same time as the film 24 is oxidized, excess oxygen is allowed to diffuse through the interface between SiO 2 and the ferroelectric. In the heat treatment process performed in the oxygen atmosphere as described above, the polysilicon layer 24 is oxidized sufficiently to convert all of the deposited polysilicon layers 24 into SiO 2 layers to serve as a barrier to the reducing gas in a subsequent interlayer insulating layer formation process. In addition, sufficient oxygen is supplied during the heat treatment to allow oxygen to diffuse through the SiO 2 film to the ferroelectric. Therefore, since sufficient oxygen and thermal energy are supplied to the ferroelectric in the heat treatment process, the perovskite structure deteriorated by hydrogen is recovered when the polysilicon film 24 is deposited, thereby restoring ferroelectric properties.

따라서, 폴리실리콘막(24) 증착 후의 산화 공정을 통하여 강유전체 캐패시터의 유전 특성을 회복시키는 동시에 환원가스의 장벽으로 작용할 SiO2막을 동시에 형성할 수 있다.Therefore, the SiO 2 film which serves as a barrier for reducing gas can be simultaneously formed while restoring the dielectric properties of the ferroelectric capacitor through the oxidation process after deposition of the polysilicon film 24.

다음으로, 도2b에 도시한 바와 같이 상기 산화된 폴리실리콘막(24) 상에 층간절연막(25)을 형성한다. 상기 층간절연막(25) 형성시 상기 산화된 폴리실리콘막(24)이 환원 가스(H)가 강유전체 캐패시터의 강유전체막을 침투하는 것을 방지하여 강유전체 캐패시터의 특성 저하를 방지할 수 있다.Next, an interlayer insulating film 25 is formed on the oxidized polysilicon film 24 as shown in FIG. 2B. When the interlayer dielectric layer 25 is formed, the oxidized polysilicon layer 24 may prevent the reduction gas H from penetrating the ferroelectric layer of the ferroelectric capacitor, thereby preventing deterioration of the ferroelectric capacitor.

이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술 분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible in the technical field of the present invention without departing from the technical spirit of the present invention. It will be clear to those of ordinary knowledge.

상기와 같이 이루어지는 본 발명은 실리콘의 산화 공정으로 층간 절연막 형성시 환원가스에 대한 강유전 캐패시터의 손상을 방지할 수 있어서 소자의 특성을 향상시킬 수 있다.The present invention as described above can prevent the damage of the ferroelectric capacitor to the reducing gas when forming the interlayer insulating film by the oxidation process of silicon can improve the characteristics of the device.

Claims (4)

소정의 하부층이 형성된 반도체 기판 상에 하부전극, 강유전체막 및 상부전극으로 이루어지는 강유전체 캐패시터를 형성하는 단계;Forming a ferroelectric capacitor including a lower electrode, a ferroelectric layer, and an upper electrode on a semiconductor substrate on which a predetermined lower layer is formed; 전체 구조 상에 폴리실리콘막을 증착하는 단계;Depositing a polysilicon film on the entire structure; 상기 폴리실리콘막을 산화하여 실리콘산화막을 형성하면서 상기 강유전체막에 산소를 확산시키는 단계; 및Diffusing oxygen into the ferroelectric film while oxidizing the polysilicon film to form a silicon oxide film; And 상기 전체 구조에 층간절연막을 형성하는 단계Forming an interlayer insulating film on the entire structure 를 포함하는 반도체 장치의 층간절연막 형성 방법.An interlayer insulating film forming method of a semiconductor device comprising a. 제 1 항에 있어서,The method of claim 1, 상기 폴리실리콘막을 산화하는 단계는 노를 이용한 열산화 공정으로 실시하는 반도체 장치의 층간절연막 형성 방법.Oxidizing the polysilicon film is a thermal oxidation process using a furnace. 제 1 항에 있어서,The method of claim 1, 상기 폴리실리콘막을 산화하는 단계는 급속열처리 방법을 이용한 열산화 공정으로 실시하는 반도체 장치의 층간절연막 형성 방법.And oxidizing the polysilicon film by a thermal oxidation process using a rapid heat treatment method. 제 2 항 또는 제 3 항에 있어서,The method of claim 2 or 3, 상기 폴리실리콘막을 산화하는 단계를 약 500 내지 900 ℃의 온도 범위에서 실시하는 반도체 장치의 층간절연막 형성 방법.And oxidizing the polysilicon film at a temperature in a range of about 500 to 900 캜.
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Publication number Priority date Publication date Assignee Title
KR970024207A (en) * 1995-10-16 1997-05-30 김광호 Method for fabricating DRAM semiconductor device

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Publication number Priority date Publication date Assignee Title
KR970024207A (en) * 1995-10-16 1997-05-30 김광호 Method for fabricating DRAM semiconductor device

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Title
인용 논문 사본(Hydroge-related Degradation and REcovery PFenomena in Pb(Zr, Ti)O<SB>3</SB> Capacitors with a Platinum Electrode 및 Improvement of leakage currents of Pt/(Ba, Sr)TiO<SB>3</SB>/Pt capacitors) *

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