KR100255508B1 - Cross coupled amplifire - Google Patents

Abstract

PURPOSE: A cross coupled amplifier is provided to increase the gain of the amplifier to be used for high speed devices and to decrease the power dissipation with current amount down to 56% compared with conventional PMOS transistor cross coupled amplifiers. CONSTITUTION: The cross coupled amplifier includes two PMOS transistors(MP2,MP1), an NMOS transistor(MN1) and another NMOS transistor(MN2). The PMOS transistors have the drains connected to a positive and negative signals of the output of the amplifier, respectively. The gates of the PMOS transistors are coupled with the positive and negative signal(SO,SO), respectively and the sources of the MOS transistors are coupled with the VCC. The NMOS transistor has the drain coupled with the output negative signal(SO), a gate coupled with the positive input signal(SI) of the amplifier and a source coupled with a drain of an NMOS transistor(MN3) whose gate is positive output signal(SO) while the source is coupled with a drain of an NMOS transistor(MN5) whose source is coupled with VSS while the gate is enable signal(SE) of the amplifier. The NMOS transistor has the drain coupled with the output negative signal(SO), a gate coupled with the positive input signal(SI) of the amplifier and a source coupled with a drain of an NMOS transistor(MN4) whose drain is coupled with the positive output signal(SO), gate is negative output signal(SI) while the source is coupled with the drain of the NMOS transistor(MN4) whose gate is output negative signal(SO) while the source is coupled with the drain of the NMOS transistor(MN5).

Description

Crosslink amplifier

1 is a schematic diagram of a conventional PMOS cross coupled amplifier circuit.

2 is a schematic diagram of a cross coupled amplifier circuit of the present invention.

Figure 3 (a) is a diagram of voltage change of each node of the prior art and the present invention.

Figure 3 (b) is a diagram showing the current consumption of the prior art and the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to the design technology of high speed, low power sense amplifiers, and more particularly to a cross coupled amplifier that can be used in MOS IC products.

The circuit of the conventional PMOS cross-coupled amplifier has a higher gain than the current mirror amplifier but has the drawback that the current consumption continues while the amplifier is operating.

Referring to the operation state through FIG. 3 (a), when the enable signal SE of the amplifier is '1', that is, the T1-T2 section is the operation time of the amplifier. When the SE becomes '1' and the amplifier is turned on, The output of SO and SO signals are amplified by the difference between SI and SI signals.

In FIG. 3 (a), the output is amplified with SO being 'ø' and SO being '1'. At this time, the MP2 P-MOSFET is turned off because the gate input SO is '1'. Thus, current paths through MP2 and N-MOSFETs MN2 and MN3 are blocked. However, P-MOSFET MP1 is still ON because SO, the gate input, is 'ø' and MN1 is also on when the SI signal is not lower than V _T of N-MOSFET MN1. Current consumption continues.

This is a disadvantage of the P-MOS cross-coupling amplifier. The drawback is that the SE signal is '1' even after the amplification operation is complete and the current continues to draw when the SI or SI signal enters a small input potential that does not swing from OV to Vcc. there was.

Accordingly, the present invention is configured by adding two N-MOSFETs in the conventional P-MOS cross-coupled amplifier in order to solve the conventional drawbacks. The PMOS cross-coupled amplifier of the prior art has a P-MOSFET opposite the gate input. Two P-MOSFETs (MP1, MP2) cross-connected to the drain, and N-MOSFETs (NM1, NM2) and amplifiers, respectively, with drains connected to the amplifier outputs SO and SO, and gate inputs connected to the amplifier input signals SI and SI, respectively. It consists of an on / off control N-MOSFET (MN5), where the drain is connected to the source of NM1, the gate input is SO, and the source is connected to the source of drain MN2, and the gate is connected to N-MOSFET MN3. It is a feature of the invention that the input is SO and the source is further inserted with an N-MOSFET MN4 connected to the drain of MN5. Looking at the operating state, when SI falls below a certain voltage compared to SI, SO is amplified to high state, SO to low state, where MP2 is off state and MN4 (added in the present invention) is N4 node and SO. Fast speeds can be achieved by quickly pulling the node low, and MP1 is on because the SO node is low, so the N3 node and SO node are off because MN3 (added in the present invention) whose gate input is SO is off. As soon as it goes high, the resulting speed is obtained and the current consumption path is also cut off. This makes it possible to create cross-coupled amplifiers with high gain and low power at the same time. Even if SI and SI are reversed, the same principle can be explained. The P-MOSFET MP3 between SO and SO plays a role in degassing both ends when the amplifier is turned off.

Therefore, the present invention can be used in high-speed product design as a high gain cross-coupling amplifier, and has the advantage of low power consumption, and thus has a current reduction effect of approximately 56% compared to the conventional P-MOS cross-coupling amplifier.

Claims (2)

Two P-MOSFETs (MP2, MP1) whose positive and negative signals (SO, SO) are drained, the gate inputs are respectively connected to negative and positive signals (SO, SO), and the sources are respectively connected to VCC power. And drain are connected to the output signal SO, the gate input is the positive signal SI of the input of the amplifier, the source is the gate input is the output positive signal SO, the source is the gate input is the enable signal SE of the amplifier, N-MOSFET (MN1) connected to the drain of the N-MOSFET (MN3) connected to the drain of the N-MOSFET (MN5) connected to the VSS power, the drain is connected to the output positive signal (SO), the gate input is the input of the amplifier N-MOSFET (MN2) connected to the drain of the N-MOSFET (MN4) connected to the drain of the N-MOSFET MN5. Featured cross-coupled amplifier. The amplifier of claim 1, wherein a P-MOSFET is connected to the output positive and negative signals SO and SO, respectively, and a gate input is used as the SE signal. Cross equalizing amplifiers.