KR100253349B1 - Manufacturing method for isolation of semiconductor device - Google Patents

Manufacturing method for isolation of semiconductor device Download PDF

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KR100253349B1
KR100253349B1 KR1019970060408A KR19970060408A KR100253349B1 KR 100253349 B1 KR100253349 B1 KR 100253349B1 KR 1019970060408 A KR1019970060408 A KR 1019970060408A KR 19970060408 A KR19970060408 A KR 19970060408A KR 100253349 B1 KR100253349 B1 KR 100253349B1
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oxide film
pad oxide
nitride film
semiconductor device
film
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KR1019970060408A
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Korean (ko)
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KR19990040091A (en
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최조봉
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김영환
현대반도체주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H01L21/31053—Planarisation of the insulating layers involving a dielectric removal step
    • H01L21/31055—Planarisation of the insulating layers involving a dielectric removal step the removal being a chemical etching step, e.g. dry etching

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE: A method for forming an isolation structure of a semiconductor device is provided to enable the prevention of the scattered reflection of light in a following photolithographic etching process. CONSTITUTION: In the method, a pad oxide layer(2) and a nitride layer are sequentially formed on a substrate(1). A photoresist pattern is then formed on the nitride layer to expose a portion of the nitride layer, and the exposed portion of the nitride layer is etched to expose a corresponding portion of the pad oxide layer(2). Next, after the photoresist pattern is removed, the exposed portion of the pad oxide layer(2) is oxidized to form a field oxide layer(4). Thereafter, upper surfaces of the nitride layer and the field oxide layer(4) are planarized to lie in the same plane. A remaining part of the planarized nitride layer is then removed, and the planarized field oxide layer(4) is etched to have an upper surface coplanar with that of the pad oxide layer(2).

Description

반도체 소자의 분리구조 제조방법{MANUFACTURING METHOD FOR ISOLATION OF SEMICONDUCTOR DEVICE}MANUFACTURING METHOD FOR ISOLATION OF SEMICONDUCTOR DEVICE

본 발명은 반도체 소자의 분리구조 제조방법에 관한 것으로, 특히 LOCOS공정으로 필드산화막을 형성한 후, 그 상부를 평탄화하여 이후의 공정에서 사진식각공정을 사용할 때 그 필드산화막의 주변부에서 인가되는 빛이 난반사되는 것을 방지하여 정확한 반도체 소자의 패턴을 형성하는데 적당하도록 한 반도체 소자의 분리구조 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a separate structure of a semiconductor device. In particular, after forming a field oxide film by a LOCOS process, the top of the field oxide film is flattened, and when the photolithography process is used in a subsequent process, the light applied from the periphery of the field oxide film is applied. The present invention relates to a method for manufacturing a separate structure of a semiconductor device which prevents diffuse reflection and is suitable for forming an accurate pattern of the semiconductor device.

일반적으로, 반도체 소자를 제조하기 위해서는 기판의 상부에 소자간의 절연 및 소자를 형성할 영역을 정의하는 분리구조를 먼저 제조해야 한다. 이와 같은 분리구조는 질화막을 기판의 상부전면에 증착하고, 사진식각공정을 통해 상기 질화막의 일부를 선택적으로 식각하여 기판의 일부를 노출시킨 후, 그 노출된 기판에 산화막을 성장시키는 방법이 가장 많이 쓰이고 있으며, 이를 보통 LOCOS공정이라 한다. 이와 같이 LOCOS공정을 통해 형성되는 분리구조는 넓은 영역에 걸쳐 형성되어 보통 필드산화막이라고 칭하며, 그 필드산화막의 주변부는 그 모양이 새부리와 비슷하다고 하여 새부리영역이라 부르고 있다. 이와 같은 새부리영역은 사진식각공정에서 빛을 난반사하여 패턴의 형성능을 저하시키며, 불필요한 면적을 차지하는 등의 문제점을 일으키며, 이와 같은 종래 반도체 소자의 분리구조 제조방법을 첨부한 도면을 참조하여 상세히 설명하면 다음과 같다.In general, in order to manufacture a semiconductor device, an isolation structure defining an insulation between devices and a region in which the device is to be formed must first be manufactured on a substrate. In such a separation structure, a nitride film is deposited on the upper surface of the substrate, and a portion of the nitride film is selectively etched through a photolithography process to expose a portion of the substrate, and then an oxide film is grown on the exposed substrate. This is usually called LOCOS process. As described above, the separation structure formed through the LOCOS process is formed over a wide area and is generally called a field oxide film. The periphery of the field oxide film is called a bird beak area because its shape is similar to a bird beak. Such a beak region is a reflection of light in the photolithography process to reduce the ability to form patterns, occupy an unnecessary area, and the like, and will be described in detail with reference to the accompanying drawings of the conventional method for manufacturing a separate structure of a semiconductor device. As follows.

도1a 내지 도1e는 종래 반도체 소자 분리구조의 제조공정 수순단면도로서, 이에 도시한 바와 같이 기판(1)의 상부에 패드산화막(2)과 질화막(3)을 순차적으로 증착하는 단계(도1a)와; 상기 질화막(3)의 상부에 포토레지스트(P/R)를 도포하고 노광 및 현상하여 상기 질화막(3)의 일부를 노출시키는 패턴을 형성하는 단계(도1b)와; 상기 패턴이 형성된 포토레지스트(P/R)를 식각 마스크로 사용하는 식각공정으로 상기 노출된 질화막(3)을 식각하여 그 하부의 패드산화막(2)을 노출시키고, 포토레지스트(P/R)를 제거하는 단계(도1c)와; 상기 노출된 패드산화막(2)을 산화시켜 필드산화막(4)을 형성하는 단계(도1d)와; 상기 질화막(3)을 제거하는 단계(도1e)로 구성된다.1A through 1E are cross-sectional views illustrating a process of fabricating a semiconductor device isolation structure, and sequentially depositing the pad oxide film 2 and the nitride film 3 on the substrate 1 (Fig. 1A). Wow; Applying a photoresist (P / R) on top of the nitride film (3), exposing and developing to form a pattern for exposing a portion of the nitride film (FIG. 1B); The exposed nitride film 3 is etched by using the patterned photoresist P / R as an etching mask to expose the pad oxide film 2 below the photoresist P / R, and the photoresist P / R is exposed. Removing (FIG. 1C); Oxidizing the exposed pad oxide film 2 to form a field oxide film 4 (FIG. 1D); And removing the nitride film 3 (FIG. 1E).

이하, 상기와 같이 구성된 종래 반도체 소자의 분리구조 제조방법을 좀 더 상세히 설명한다.Hereinafter, a method of manufacturing a separation structure of a conventional semiconductor device configured as described above will be described in more detail.

먼저, 도1a에 도시한 바와 같이 기판(1)의 상부전면에 패드산화막(2)과 질화막(3)을 순차적으로 증착한다. 이때, 패드산화막(2)을 기판(1)과 질화막(3)의 사이에 증착하는 이유는 질화막(3)의 분자간 거리와, 기판(1)의 분자간 거리가 서로 달라 기판(1)의 상부에 질화막(3)을 직접 증착하면 기판(1)에 손상을 주기 때문이다.First, as shown in FIG. 1A, the pad oxide film 2 and the nitride film 3 are sequentially deposited on the upper surface of the substrate 1. At this time, the reason for depositing the pad oxide film 2 between the substrate 1 and the nitride film 3 is that the intermolecular distance of the nitride film 3 and the intermolecular distance of the substrate 1 are different from each other so that the pad oxide film 2 is deposited on the upper portion of the substrate 1. This is because direct deposition of the nitride film 3 damages the substrate 1.

그 다음, 도1b에 도시한 바와 같이 상기 질화막(3)의 상부에 포토레지스트(P/R)를 도포하고, 마스크를 통해 부분적으로 노광한 다음, 그 노광된 포토레지스트를 제거하는 현상을 통해 상기 질화막(3)의 일부를 노출시키는 패턴을 형성한다.Next, as shown in FIG. 1B, a photoresist (P / R) is applied on the nitride film 3, partially exposed through a mask, and then the exposed photoresist is removed. A pattern for exposing a part of the nitride film 3 is formed.

그 다음, 도1c에 도시한 바와 같이 상기 패턴이 형성된 포토레지스트(P/R)를 식각마스크로 사용하는 식각공정으로, 상기 노출된 질화막(3)을 식각하여 그 하부의 패드산화막(2)을 노출시키고, 상기 포토레지스트(P/R)를 모두 제거한다.Next, as shown in FIG. 1C, in the etching process using the photoresist P / R having the pattern as an etching mask, the exposed nitride layer 3 is etched to remove the pad oxide layer 2 below. Expose and remove all of the photoresist (P / R).

그 다음, 도1d에 도시한 바와 같이 노출된 패드산화막(2)을 습식산화하여 성장시켜 필드산화막(4)을 형성한다. 이때, 필드산화막(4)은 기판(1)의 상부측으로 성장하는 비율과 기판의 하부측으로 성장하는 비율이 약 6 대 4로 성장되며, 상기 질화막(3)측면 하부로 파고들어 성장된다.Then, as shown in FIG. 1D, the exposed pad oxide film 2 is grown by wet oxidation to form a field oxide film 4. At this time, the field oxide film 4 grows in a ratio of growing to an upper side of the substrate 1 and a ratio of growing to a lower side of the substrate at about 6 to 4, and is formed by digging into the lower side of the nitride film 3 side.

그 다음, 도1e에 도시한 바와 같이 상기 질화막(3)을 선택적으로 제거하여 분리구조 제조공정을 완료한다.Next, as shown in FIG. 1E, the nitride film 3 is selectively removed to complete the isolation structure fabrication process.

상기한 바와 같이 종래 반도체 소자의 분리구조 제조방법은 질화막의 사이에 노출된 패드산화막을 습식산화를 통해 중앙부가 높고, 표면이 둥근 형태의 분리구조를 제조하여 이후의 사진식각공정에서 인가되는 광을 반사하는 각이 각 위치마다 다르게 되고, 특히 주변부에서는 난반사가 일어나 반도체 소자 패턴의 형성능을 감소시키는 문제점이 있었다.As described above, in the method of manufacturing a separation structure of a conventional semiconductor device, a pad oxide film exposed between nitride films is wet-oxidized to produce a separation structure having a high central portion and a rounded surface, thereby applying light applied in a subsequent photolithography process. The reflecting angle is different at each position, and particularly, irregular reflection occurs at the peripheral portion, thereby reducing the ability of forming a semiconductor device pattern.

이와 같은 문제점을 감안한 본 발명은 분리구조 제조 후의 사진식각공정에서 인가되는 빛을 난반사하지 않는 반도체 소자의 분리구조 제조방법을 제공함에 그 목적이 있다.It is an object of the present invention to provide a separation structure manufacturing method of a semiconductor device that does not diffusely reflect light applied in a photolithography process after fabrication of the separation structure.

도1a 내지 도1e는 종래 반도체 소자 분리구조의 제조공정 수순단면도.1A to 1E are cross-sectional views of a manufacturing process of a conventional semiconductor device isolation structure.

도2a 내지 도2f는 본 발명 반도체 소자 분리구조의 제조공정 수순단면도.2A to 2F are cross-sectional views of a fabrication process of the semiconductor device isolation structure.

***도면의 주요 부분에 대한 부호의 설명****** Description of the symbols for the main parts of the drawings ***

1:기판 2:패드산화막1: Substrate 2: Pad oxide film

3;질화막 4:필드산화막3; nitride film 4: field oxide film

상기와 같은 목적은 기판의 상부에 패드산화막과 질화막을 순차적으로 증착하는 질화막증착단계와; 상기 증착된 질화막의 일부를 식각하여 그 하부의 패드산화막을 노출시키는 패드산화막 노출단계와; 상기 노출된 패드산화막을 성장시키는 산화막성장단계를 포함하는 반도체 소자의 분리구조 제조방법에 있어서, 상기 산화막성장단계로 성장한 산화막의 상부를 패드산화막의 상부와 동일한 평면상에 위치하도록 평탄화하는 평탄화단계로 구성하여 그 상면이 평탄한 반도체 소자의 분리구조를 형성함으로써 달성되는 것으로, 이와 같은 본 발명을 첨부한 도면을 참조하여 상세히 설명하면 다음과 같다.The above object is a nitride film deposition step of sequentially depositing a pad oxide film and a nitride film on the substrate; Exposing a pad oxide film by etching a portion of the deposited nitride film to expose a pad oxide film under the pad oxide film; In the method of manufacturing a separate structure of a semiconductor device comprising the oxide film growth step of growing the exposed pad oxide film, the planarization step of planarizing the top of the oxide film grown in the oxide film growth step to be located on the same plane as the top of the pad oxide film This is achieved by forming a separation structure of a semiconductor device having a flat upper surface, which will be described in detail with reference to the accompanying drawings.

도2a 내지 도2f는 본 발명 반도체 소자 분리구조의 제조공정 수순단면도로서, 이에 도시한 바와 같이 기판(1)의 상부에 패드산화막(2)과 질화막(3)을 순차적으로 증착하는 단계(도2a)와; 상기 질화막(3)의 상부에 포토레지스트(P/R)를 도포하고 노광 및 현상하여 상기 질화막(3)의 일부를 노출시키는 패턴을 형성하는 단계(도2b)와; 상기 패턴이 형성된 포토레지스트(P/R)를 식각 마스크로 사용하는 식각공정으로 상기 노출된 질화막(3)을 식각하여 그 하부의 패드산화막(2)을 노출시키고, 포토레지스트(P/R)를 제거하는 단계(도2c)와; 상기 노출된 패드산화막(2)을 산화시켜 필드산화막(4)을 형성하는 단계(도2d)와; 상기 질화막(3)의 상부가 필드산화막(4)의 상부와 동일한 높이가 되도록 평탄화하는 단계(도2e)와; 상기 평탄화로 잔존하는 질화막(3)을 제거하고, 상기 필드산화막(4)의 상부가 패드산화막(2)의 상부와 동일한 높이가 되도록 식각하는 단계(도2f)로 구성된다.2A to 2F are cross-sectional views of a process for manufacturing a semiconductor device isolation structure, and the steps of sequentially depositing the pad oxide film 2 and the nitride film 3 on the substrate 1 (Fig. 2A). )Wow; Applying a photoresist (P / R) on top of the nitride film (3), exposing and developing a pattern to expose a portion of the nitride film (3) (FIG. 2B); The exposed nitride film 3 is etched by using the patterned photoresist P / R as an etching mask to expose the pad oxide film 2 below the photoresist P / R, and the photoresist P / R is exposed. Removing (FIG. 2C); Oxidizing the exposed pad oxide film 2 to form a field oxide film 4 (FIG. 2D); Planarizing the upper portion of the nitride film 3 so as to have the same height as the upper portion of the field oxide film 4 (FIG. 2E); Removing the remaining nitride film 3 by the planarization, and etching so that the upper portion of the field oxide film 4 is the same height as the upper portion of the pad oxide film (Fig. 2F).

이하, 상기와 같이 구성된 본 발명 반도체 소자의 분리구조 제조방법을 좀 더 상세히 설명한다.Hereinafter, a method of manufacturing a separate structure of the semiconductor device of the present invention configured as described above will be described in more detail.

먼저, 도2a에 도시한 바와 같이 기판(1)의 상부전면에 패드산화막(2)과 질화막(3)을 순차적으로 증착한다. 이때, 패드산화막(2)을 기판(1)과 질화막(3)의 사이에 증착하는 이유는 질화막(3)의 분자간 거리와, 기판(1)의 분자간 거리가 서로 달라 기판(1)의 상부에 질화막(3)을 직접 증착하면 기판(1)에 손상을 주기 때문이다.First, as shown in FIG. 2A, the pad oxide film 2 and the nitride film 3 are sequentially deposited on the upper surface of the substrate 1. At this time, the reason for depositing the pad oxide film 2 between the substrate 1 and the nitride film 3 is that the intermolecular distance of the nitride film 3 and the intermolecular distance of the substrate 1 are different from each other so that the pad oxide film 2 is deposited on the upper portion of the substrate 1. This is because direct deposition of the nitride film 3 damages the substrate 1.

그 다음, 도2b에 도시한 바와 같이 상기 질화막(3)의 상부에 포토레지스트(P/R)를 도포하고, 마스크를 통해 부분적으로 노광한 다음, 그 노광된 포토레지스트를 제거하는 현상을 통해 상기 질화막(3)의 일부를 노출시키는 패턴을 형성한다.Then, as shown in FIG. 2B, a photoresist (P / R) is applied on the nitride film 3, partially exposed through a mask, and then the exposed photoresist is removed. A pattern for exposing a part of the nitride film 3 is formed.

그 다음, 도2c에 도시한 바와 같이 상기 패턴이 형성된 포토레지스트(P/R)를 식각마스크로 사용하는 식각공정으로, 상기 노출된 질화막(3)을 식각하여 그 하부의 패드산화막(2)을 노출시키고, 상기 포토레지스트(P/R)를 모두 제거한다.Next, as shown in FIG. 2C, in the etching process using the photoresist P / R having the pattern as an etching mask, the exposed nitride film 3 is etched to remove the pad oxide film 2 below. Expose and remove all of the photoresist (P / R).

그 다음, 도2d에 도시한 바와 같이 노출된 패드산화막(2)을 습식산화하여 성장시켜 필드산화막(4)을 형성한다. 이때, 필드산화막(4)은 기판(1)의 상부측으로 성장하는 비율과 기판의 하부측으로 성장하는 비율이 약 6 대 4로 성장되며, 상기 질화막(3)측면 하부로 파고들어 성장된다.Next, as shown in FIG. 2D, the exposed pad oxide film 2 is grown by wet oxidation to form a field oxide film 4. At this time, the field oxide film 4 grows in a ratio of growing to an upper side of the substrate 1 and a ratio of growing to a lower side of the substrate at about 6 to 4, and is formed by digging into the lower side of the nitride film 3 side.

그 다음, 도2e에 도시한 바와 같이 상기 질화막(3)의 상부로부터 평탄화공정을 실시하여 상기 필드산화막(4)과 질화막(3)의 상부가 동일 평면상에 위치할 때까지 실시한다.Then, as shown in Fig. 2E, a planarization process is performed from the top of the nitride film 3 until the top of the field oxide film 4 and the top of the nitride film 3 are located on the same plane.

그 다음, 도2f에 도시한 바와 같이 상기 평탄화로 노출된 필드산화막(4)의 상부사이에 잔존하는 질화막(3)을 선택적으로 제거한 다음, 습식식각공정을 통해 상기 필드산화막(4)의 상부를 식각하여 상기 잔존하는 질화막(3)의 제거로 노출된 패드산화막(2)의 상부와 필드산화막(4)의 상부가 동일 평면상에 위치하도록 한다.Next, as shown in FIG. 2F, the nitride film 3 remaining between the top portions of the field oxide film 4 exposed by the planarization is selectively removed, and then the upper portion of the field oxide film 4 is removed through a wet etching process. By etching, the upper part of the pad oxide film 2 exposed by the removal of the remaining nitride film 3 and the upper part of the field oxide film 4 are located on the same plane.

이와 같이 본 발명은 필드산화막(4)을 평탄화하여 후속공정으로 사진식각공정을 사용하는 경우에 필드산화막(4)의 평면에서 빛이 난반사하는 것을 방지한다.As such, the present invention flattens the field oxide film 4 to prevent diffuse reflection of light in the plane of the field oxide film 4 when the photolithography process is used as a subsequent step.

상기한 바와 같이 본 발명 반도체 소자의 분리구조 제조방법은 필드산화막을 제조한 후, 그 상부를 패드산화막의 상부와 동일 평면상에 위치하도록 평탄화하여 후속공정으로 사진식각공정을 사용할 때 빛의 난반사를 방지하여 반도체 소자 패턴의 형성능을 향상시키는 효과가 있다.As described above, in the method of manufacturing the isolation structure of the semiconductor device of the present invention, after manufacturing the field oxide film, the upper part is flattened so as to be located on the same plane as the upper part of the pad oxide film, and the diffuse reflection of the light is used when the photolithography process is used in the subsequent process. There is an effect of preventing and improving the forming ability of the semiconductor element pattern.

Claims (1)

기판의 상부에 패드산화막과 질화막을 순차적으로 증착하는 질화막증착단계와; 상기 증착된 질화막의 일부를 식각하여 그 하부의 패드산화막을 노출시키는 패드산화막 노출단계와; 상기 노출된 패드산화막을 성장시키는 산화막성장단계와; 질화막의 상부가 성장한 산화막의 상부와 동일한 평면상에 위치할 때까지 평탄화하는 평탄화공정단계와; 상기 평탄화공정단계 후 잔존하는 질화막을 제거하고, 상기 성장한 산화막의 상부가 패드산화막의 상부와 동일한 평면상에 위치할 때까지 식각하는 식각단계로 구성하여 된 것을 특징으로 하는 반도체 소자의 분리구조 제조방법.A nitride film deposition step of sequentially depositing a pad oxide film and a nitride film on the substrate; Exposing a pad oxide film by etching a portion of the deposited nitride film to expose a pad oxide film under the pad oxide film; An oxide film growth step of growing the exposed pad oxide film; A planarization process step of planarizing until the top of the nitride film is located on the same plane as the top of the grown oxide film; And removing the remaining nitride film after the planarization process step and etching until the top of the grown oxide film is on the same plane as the top of the pad oxide film. .
KR1019970060408A 1997-11-17 1997-11-17 Manufacturing method for isolation of semiconductor device KR100253349B1 (en)

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Publication number Priority date Publication date Assignee Title
JPH0461340A (en) * 1990-06-29 1992-02-27 Fujitsu Ltd Manufacture of semiconductor device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0461340A (en) * 1990-06-29 1992-02-27 Fujitsu Ltd Manufacture of semiconductor device

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