KR100248199B1 - Liquid crystal display element - Google Patents

Abstract

The present invention relates to a liquid crystal display device in which a charge transfer scanning circuit is integrated with a liquid crystal panel, and includes a lower substrate on which a pixel driving TFT array is integrated, and an upper portion of the lower substrate, the lower substrate being arranged at a predetermined distance from the lower substrate. A liquid crystal panel comprising an upper substrate on which color filters of G and B are formed, and liquid crystals injected between upper and lower substrates, and having a plurality of scanning lines and data lines; A scan driving circuit integrated on a lower substrate of the liquid crystal panel and outputting a scan line driving signal for driving the scan line according to a clock signal, and mounted on a tape carrier package, the liquid crystal through a pad portion of the tape carrier package; And a data driver circuit electrically connected to the panel for applying the data input signal and the clock signal to the liquid crystal panel, and a controller for applying the clock signal and the data input signal to the data driver circuit.

Description

LCD

The present invention relates to a liquid crystal display device in which a charge transfer scanning circuit is integrated in a liquid crystal panel.

1 is a block diagram of a conventional liquid crystal display device. Referring to FIG. 1, a conventional liquid crystal display device includes a liquid crystal panel 10, a scan driver circuit 20, a data driver circuit 30, and a controller 40.

The liquid crystal panel 10 includes a liquid crystal injected between an upper glass substrate 11 having a color filter, a lower substrate 12 in which pixel driving thin film transistors are integrated, and upper and lower substrates 11 and 12. (Not shown).

The scan driver circuit 20 is mounted on a tape carrier package (TCP) 50, and the pad unit 51 of the TCP 50 is wire-bonded to the liquid crystal panel 10 to scan the scan driver circuit 20. ) Is electrically connected to the liquid crystal panel 10. In addition, the data driving circuit 30 is mounted on the tape carrier package 60, and the pad unit 61 of the TCP 60 is wire-bonded to the liquid crystal panel 10 so that the data driving circuit 40 may be a liquid crystal panel ( 10) is electrically connected.

The controller 40 is for applying a clock signal and a data signal to the scan driver circuit 20 and the data driver circuit 30. The clock signals Q1 and Q2 output from the controller 40 are the data driver circuit 30. ) Is applied to the scan driving circuit 20 and the data input signal is applied to the data driving circuit 30.

Accordingly, the clock signals Q1 and Q2 are alternately applied to the scan driver circuit 20 from the controller 40, so that the scan driver circuit 20 is synchronized with the clock signals Q1 and Q2 of the liquid crystal panel 10. FIG. A signal for sequentially driving the scan lines SL11-SL1n is output. Then, the clock signals Q1 and Q2 and the data input signal are applied to the data driving circuit 30 from the controller 40 so that the data driving circuit 30 is synchronized with the clock signals Q1 and Q2 and the liquid crystal panel 10. Outputs a signal for driving the data lines DL11-DL1m.

As described above, the conventional LCD fabricates a scan driving circuit 20 for scanning the LCD panel and a data driving circuit 40 for applying data to the LCD panel separately from the liquid crystal panel 10 and then the liquid crystal panel. It was mounted in. Accordingly, there is a problem in that the yield of manufacturing the driving circuit separately and mounting on the liquid crystal panel is lowered, and the manufacturing cost is increased.

The present invention is to solve the problems of the prior art as described above, by integrating the charge transfer scan driver circuit on the liquid crystal panel, to simplify the process of mounting a separate drive circuit, and to reduce the size of the device It is an object of the present invention to provide a liquid crystal display device.

Another object of the present invention is to provide a liquid crystal element element which can prevent the deterioration of the image quality due to signal delay by integrating a charge transfer type scan driver circuit on both sides of the liquid crystal panel and simultaneously driving one scan line. have.

1 is a view showing the configuration of a conventional liquid crystal display device.

2 is a diagram showing the configuration of a liquid crystal display device in which a charge transfer scan driving circuit according to a first embodiment of the present invention is integrated in a liquid crystal panel.

3 is a detailed circuit diagram of a charge transfer scanning driver circuit in the liquid crystal display device of FIG.

4 is a diagram showing the configuration of a liquid crystal display device in which a charge transfer scan driving circuit according to a second embodiment of the present invention is integrated in a liquid crystal panel.

FIG. 5 is a detailed circuit diagram of a charge transfer scanning driver circuit in the liquid crystal display device of FIG.

6 is a diagram showing the configuration of a liquid crystal display device in which a charge transfer scanning circuit according to a third embodiment of the present invention is integrated in a liquid crystal panel.

* Explanation of symbols for main parts of the drawings

100: liquid crystal panel 200, 200a, 200b: scan driving circuit

300: data driving circuit 400: tape carrier package

410: pad portion 500: control unit

211 ~ 21n, 221 ~ 22n: scan line driving means

C11-1 to C11-n, C21-1 to C21-n: capacitor

T11-1 to T11-n, T12-1 to T12-n, T21-1 to T21-n, T22-1 to T22-n: thin film transistor

In order to achieve the above object, the present invention provides a lower substrate on which the pixel driving TFT array is integrated, and an upper substrate arranged at a predetermined distance from the lower substrate on the lower substrate, and having R, G, and B color filters formed thereon. And a liquid crystal panel made of liquid crystal injected between upper and lower substrates, the liquid crystal panel having a plurality of scanning lines and data lines; A scan driving circuit integrated on a lower substrate of the liquid crystal panel and outputting a scan line driving signal for driving the scan line of the liquid crystal panel according to a clock signal applied from the outside; A data driving circuit mounted on a tape carrier package and electrically connected to the liquid crystal panel through a pad portion of the tape carrier package to apply a data input signal and a clock signal to the liquid crystal panel; And a controller for applying a clock signal and a data input signal to the data driving circuit.

In the liquid crystal display device according to the embodiment of the present invention, one scan driver circuit is integrated on one side of the lower substrate on which the TFT array is not integrated so as to sequentially drive the scan lines of the liquid crystal panel one by one, or two scan driver circuits. The TFT array is integrated on both sides of the lower substrate not integrated to sequentially drive one scan line of the liquid crystal panel simultaneously.

In the liquid crystal display device according to the embodiment of the present invention, the scan driving circuit includes a plurality of scan line driving means for driving the scan lines of the liquid crystal panel by the two-phase clock signal, and each scan line driving means A first TFT for transferring charge to which a clock signal is applied to a gate; A charge and discharge capacitor connected between the gate and the source of the first TFT; A gate is connected to a source of the first TFT array, and the second TFT is driven by the first TFT to output a scan line driving signal to the liquid crystal panel.

The capacitor of each of the scan line driving means employs a structure in which the source / drain electrodes and the gate electrodes of the first TFT are the upper and lower plates, and the insulating film therebetween is used as the dielectric film, or the source / drain electrodes and the first TFT of the first TFT are upper and lower. The ITO electrodes of the substrate are used as upper and lower plates, and a structure using a liquid crystal as a dielectric film may be adopted.

EXAMPLE

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of a liquid crystal display device according to an exemplary embodiment of the present invention. Referring to FIG. 2, the liquid crystal display of the present invention includes a liquid crystal panel 100, a scan driver circuit 200 integrated in the liquid crystal panel, a data driver circuit 300, and a controller 500.

The liquid crystal panel 100 includes an upper glass substrate 110 having a color filter, a lower substrate 120 in which a thin film transistor (TFT) array for pixel driving is integrated, upper and lower substrates 110, ( And liquid crystal (not shown).

The data driving circuit 300 is mounted on a tape carrier package (TCP) 400, and the pad unit 410 of the TCP 400 is wire-bonded to the liquid crystal panel 100 so that the data driving circuit 300 is a liquid crystal panel. It is electrically connected to 100.

The controller 500 is to apply a clock signal and a data signal to the scan driver circuit 200 and the data driver circuit 300 included in the liquid crystal panel 100, and the two-phase clock signal output from the controller 500 ( Q1 and Q2 are applied to the data driver circuit 300 and to the scan driver circuit 200 through the liquid crystal panel 100.

The charge transfer scanning circuit 200 embedded in the liquid crystal panel 100 according to the exemplary embodiment of the present invention is integrated together when the TFT driving circuit is integrated on the lower substrate 120 which is not overlapped with the upper substrate 110. The configuration is as shown in FIG.

Referring to FIG. 3, the charge transfer scan driver circuit 200 integrated in the liquid crystal panel 100 according to an exemplary embodiment of the present invention drives a plurality of scan lines for driving each scan line of the liquid crystal panel 100. It consisted of means 211-21n. A plurality of scanning line driving means ~ (211 ~ 21n), each scanning line driving signal (V _{g_out1l)} outputted from the (V _{g_out1n)} of the scan driving circuit 200, each scanning line of the liquid crystal panel 100, respectively (SL21 ~ SL2n Drive each).

Each scan line driving means 211 to 21n includes a first TFT T11 for charge transfer to which a clock signal Q1 or Q2 is applied to a gate, and a charge charge / room connected between a gate and a source of the first TFT T11. A second capacitor (T12) for a buffer which is connected to a dedicated capacitor C11 and a source of the first TFT T11 and driven by a first TFT T11 to output scan line driving signals V _{g_out1l} to V _{g_out1n} . Was done.

In the plurality of scanning line driving means 211 to 21n, a constant voltage Vin of a high state is applied to the drain of the first TFT T11-1 of the first scanning line driving means 211, The source of the first TFT of the scan line driving means, for example, the source of the first TFT T11-2 of the second scan line driving means 212 is the first TFT (T11) of the third scan line driving means 213 of the next stage. Is connected to the drain of -3). A constant gate voltage V _{gh in} a high state is applied to the drain of the second TFT T12 of each scan line driving means 211-21n.

Here, the voltage Vin applied to the drain of the first TFT T11-1 of the first scan line driving means 211 is applied with a constant voltage suitable for driving the second TFT T12-1, and each scan line It is the largest voltage among the voltages applied to the drains of the second TFTs T12-1 to T12-n of the driving means 211 to 21n.

The clock signals Q1 and Q2 are 2-phase clock signals having the same width as the gate pulse width, and the first clock signal Q1 is the odd-numbered scan line SL21 of the liquid crystal panel 100. Is applied to the odd-numbered scan line driving means 211, 213, 215, ... for driving the SL23, SL25, ..., and the second clock signal Q2 is applied to the even-numbered scan line SL22 of the liquid crystal panel 100. Is applied to even-numbered scan line driving means 212, 214, 216, ... for driving SL24, SL26, ...).

The charge-charge capacitors C11-1 to C11-n of the scan line driving means 211-21n adopt a structure integrated on the lower substrate separately from the first TFT T11, or the first TFT T11. It is also possible to adopt a structure in which both the source / drain electrodes and the gate electrode are made of both plates, and an insulating film therebetween is used as the dielectric film.

Referring to the operation of the charge transfer scanning drive circuit having the configuration described above is as follows.

First, when the first clock signal Q1 is turned on and applied to the first scan line driving means 211, the first TFT T11-1 is turned on so that the input voltage Vin is applied to the first TFT T11-1. It is applied to the gate of the second TFT T12-1 through and turned on. Therefore, as the second TFT 12-1 is turned on, the V _gh voltage is output as the first scan line driving signal V _{g_out1l} and applied to the liquid crystal panel 100.

At this time, the capacitor C11-1 of the first scan line driving means 211 is charged with the voltage difference between the input signal Vin applied to the drain and V (Q1) applied to the gate.

Subsequently, when the first clock signal Q1 is turned off and the second clock signal Q2 is turned on, the first TFT T11-1 of the first scan line driving means 211 is turned off and the second scan driving means ( The first TFT T11-2 of 212 is turned on. Therefore, the electric charge charged in the capacitor C11-1 is applied to the capacitor C11-2 of the second scan line driving means 212 through the TFT T11-2, and charged to the capacitor C11-1. Since the charged charge is applied to the gate of the second TFT T12-2 and turned on, the second scan line driving signal V _{g_out12} is output and applied to the liquid crystal panel 100.

As described above, as the clock pulses Q1 and Q2 are repeatedly turned on and off, the first scan line driving signal V _{g_out11} sequentially from the first scan driving means 211 to the nth scan driving means 21n. The n th scan line driving signal V _{g_out1n} is output to the liquid crystal panel 100, and is sequentially driven from the first scan line to the n th scan line of the liquid crystal panel 100.

4 is a block diagram of a liquid crystal display device according to a second embodiment of the present invention, and FIG. 5 is a block diagram of a charge transfer scanning driver circuit integrated in the liquid crystal panel of the liquid crystal display device of FIG. will be. The same reference numerals are used for the same components as those of the liquid crystal display according to the first embodiment of FIGS.

The liquid crystal display device according to the second embodiment has a configuration substantially the same as that of the first embodiment. However, as shown in FIG. 5, the charging and discharging capacitors C21-1 to C21-n of the charge transfer driving circuit 200 have a structure different from that of the first embodiment. That is, in the first embodiment, a capacitor structure using both the source / drain electrode layer and the gate electrode layer of the first TFT T11 of the scan driver circuit 200 integrated on the lower substrate 120 of the liquid crystal panel 100 is used as both plates. However, in the second embodiment, the source / drain electrode layer of the first TFT (T21) is used as the lower plate, the ITO electrode, which is a common electrode formed on the upper substrate 110, is used as the upper plate, and the liquid crystal is used as the dielectric film between the two plates. The capacitor structure used was adopted.

In the charge transfer scanning driving circuit according to the second embodiment, the liquid crystal is used as the dielectric film of the charge / discharge capacitor, thereby corresponding to the pixel region of the liquid crystal injected between the upper and lower substrates 110 and 120. The liquid crystal injected into the portion is for display, and the liquid crystal injected into the portion corresponding to the charge transfer driving circuit is used as the dielectric film of the capacitors C21-1 to C21-n.

Accordingly, in the first embodiment, the upper substrate 110 of the liquid crystal panel 100 is arranged at a predetermined interval with the lower substrate on which the TFT array is formed except for the portion where the charge transfer scan driving circuit 200 is formed. In the embodiment, since the ITO electrode of the upper substrate 110 is used as the upper plate, the upper substrate 110 is completely overlapped with the lower substrate 120. That is, the upper substrate 110 is arranged so as to maintain a predetermined distance from the portion in which the TFT array is integrated as well as the lower substrate 120 in the portion in which the charge transfer scanning driver circuit 200 is integrated.

Similarly to the charge transfer scan driver circuit 200 according to the first embodiment of FIG. 3, the charge transfer scan driver circuit 200 according to the second embodiment of FIG. 5 includes a plurality of scan lines of the liquid crystal panel 100. A plurality of scan line driving means 211-22n for outputting the SL21 to SL2n driving signals V _{g_out21} to V _{g_out2n} .

Each scan line driving means (221-22n) also includes a first TFT (T21) for charge transfer, a second TFT (T22) for driving signal output, and a capacitor (C21) for charge and discharge, as in the first embodiment. However, in the second embodiment, the voltage Vcom applied from the common electrode of the upper substrate 110 is applied to the charge and discharge capacitors C21-1 to C21-n at one end.

6 is a block diagram of a liquid crystal display device according to a third embodiment of the present invention. The liquid crystal display according to the third exemplary embodiment has a structure in which charge transfer scan driving circuits 200a and 200b are formed on both sides of the lower substrate 120 except for the pixel region of the liquid crystal panel 100.

The charge transfer driver circuits 200a and 200b according to the third embodiment have the same configuration as the charge transfer scan driver circuit according to the first embodiment of FIG. Therefore, when the first clock signal Q1 is turned on, the scan line driving signal for driving the odd scan line is simultaneously output from the first and second charge transfer scan driver circuits 200a and 200b, and the second clock is output. When the signal Q2 is turned on, the scan line driving signal for driving the even-numbered scan line is simultaneously output from the first and second charge transfer scan driver circuits 200a and 200b.

In the liquid crystal display device according to the third embodiment, charge transfer driving circuits 200a and 200b are formed on both sides of the liquid crystal panel 100 to simultaneously drive one scan line, thereby reducing image degradation due to signal delay. There is an advantage to this.

7 is a block diagram of a liquid crystal display device according to a fourth embodiment of the present invention. Referring to FIG. 7, in the liquid crystal display device according to the fourth embodiment, charge transfer scan drive circuits 200a and 200b are formed on both sides of the liquid crystal panel 100 as in the third embodiment, and charge transfer scan The driving circuit has the same configuration as the charge transfer scanning driving circuit according to the second embodiment of FIG.

Therefore, in the charge transfer scanning driving circuit according to the fourth embodiment, since the liquid crystal is used as the dielectric film and the ITO electrode of the upper substrate 110 is used as the upper plate, the upper substrate 110 is the charge transfer type of the lower substrate 120. Even portions where the scan driving circuits 200q and 200b are formed are overlapped.

In the liquid crystal display according to the fourth embodiment, scan driving circuits are formed on both sides of the liquid crystal panel 100 to simultaneously drive one scan line from the left and the right, thereby reducing the deterioration of image quality due to signal delay. .

As described above, the liquid crystal display device of the present invention integrates the scan driver circuit into the liquid crystal panel, thereby solving the problems of yield decrease and manufacturing cost due to the mounting of the conventional separately manufactured scan driver circuit. In addition, by integrating the scan driving circuits on both sides of the liquid crystal panel, one scan line is simultaneously driven from the left and the right, thereby solving the problem of deterioration of image quality due to signal delay.

Claims (16)

A lower substrate on which the pixel driving TFT array is integrated, an upper substrate arranged at a predetermined distance from the lower substrate on the lower substrate, and having color filters of R, G, and B formed thereon, and a liquid crystal injected between the upper and lower substrates; A liquid crystal panel having a plurality of scan lines and data lines; A scan driving circuit integrated on the lower substrate of the liquid crystal panel and outputting a plurality of scan line driving signals for driving the plurality of scan lines of the liquid crystal panel according to a clock signal applied from the outside; A data driving circuit electrically connected to the liquid crystal panel to apply a data input signal and a clock signal to the liquid crystal panel; And a controller for applying a clock signal and a data input signal to the data driving circuit. A lower substrate on which the pixel driving TFT array is integrated, an upper substrate on which the TFT array is integrated among the lower substrates overlapping at a predetermined interval, and having an R, G, and B color filter formed thereon; A liquid crystal panel made of a liquid crystal injected therebetween and having a plurality of scan lines and data lines; A scan driving circuit integrated on one side of a lower substrate of the liquid crystal panel not overlapping with the upper substrate and outputting a plurality of scan line driving signals for sequentially driving the plurality of scan lines of the liquid crystal panel one by one according to a clock signal; Wow; A data driving circuit electrically connected to the liquid crystal panel to apply a data input signal and a clock signal to the liquid crystal panel; And a control unit for applying a clock signal and a data input signal to the data driving circuit, wherein the scanning driving circuit includes a plurality of driving lines for driving the plurality of scanning lines of the liquid crystal panel by a two-phase clock signal. A plurality of scan line driving means for generating a plurality of scan line driving signals, each scanning line driving means comprising: a first TFT for charge transfer to which the clock signal is applied to a gate; A charge and discharge capacitor connected between the gate and the source of the first TFT; And a second TFT having a gate connected to the source of the first TFT and driven by the first TFT to output a scan line driving signal to the liquid crystal panel. The liquid crystal display device according to claim 2, wherein the clock signal applied to the scan driver circuit is applied to the data line from the controller through a liquid crystal panel. 3. The liquid crystal display device according to claim 2, wherein a constant input voltage is applied to a drain of the first TFT of the first scan line driving means among the scan line driving means. The liquid crystal display device according to claim 4, wherein the constant voltage applied to the drain of the first TT of the first scan line driving means is applied with a constant high state voltage suitable for driving the second TFT. 3. The liquid crystal display device according to claim 2, wherein the source and the drain of the first TFT of two neighboring scan line driving means are connected to each other among the scan line driving means. The liquid crystal display device according to claim 2, wherein a constant voltage is applied to a drain of the second TFT of each of the scan line driving means. 8. The liquid crystal display device according to claim 7, wherein the constant voltage applied to the drain of the second TFT of each scan line driving means is applied with the largest voltage among the voltages applied to the gate of the pixel driving TFT array. A lower substrate on which the pixel driving TFT array is integrated; an upper substrate on which the lower substrate including the TFT array is overlapped with a lower substrate at a predetermined interval, and having R, G, and B color filters formed thereon; A liquid crystal panel made of liquid crystal injected between the plates, the liquid crystal panel having a plurality of scanning lines and data lines; A scan driving circuit integrated on one side of the upper substrate except for a portion in which the TFT array is integrated among the lower substrates, and outputting a plurality of scan line driving signals for sequentially driving the plurality of scan lines of the liquid crystal panel one by one; A data driving circuit electrically connected to the liquid crystal panel to apply a data input signal and a clock signal to the liquid crystal panel; And a control unit for applying a clock signal and a data input signal to the data driving circuit, wherein the scan driving circuit includes a plurality of scan line driving signals for driving the plurality of scan lines of the liquid crystal panel by a two-phase clock signal, respectively. And a plurality of scan line driving means for generating each of the plurality of scan line driving means, the first TFT for charge transfer to which a clock signal is applied to a gate; A capacitor for charge and discharge having a constant voltage applied at one end and connected to a source of the first TFT; And a second TFT connected to a drain of the first TFT and driven by the first TFT to output a scan line driving signal. 10. The liquid crystal display device according to claim 9, wherein the clock signal applied to the scan driver circuit is applied through a liquid crystal panel to a clock signal applied to a data line from a controller. 10. The liquid crystal display device according to claim 9, wherein a constant input voltage is applied to a source of the first TFT of the first scan line driving means among the scan line driving means. 12. The liquid crystal display device according to claim 11, wherein a constant voltage applied to the source of the first TFT of the first scan line driving means is applied to a voltage suitable for driving the second TFT. 10. The liquid crystal display device according to claim 9, wherein the source and the drain of the first TFT of two adjacent scan line driving means are connected to each other among the scan line driving means. 10. The liquid crystal display device according to claim 9, wherein a constant voltage is applied to a drain of the second TFT of each of the scan line driving means. 15. The liquid crystal display device according to claim 14, wherein the predetermined voltage applied to the drain of the second TFT of each of the scan line driving means is applied with the largest voltage among the voltages applied to the gate of the pixel driving TFT. A lower substrate on which the pixel driving TFT array is integrated, an upper substrate on which the TFT array is integrated among the lower substrates overlapping at a predetermined interval, and having an R, G, and B color filter formed thereon; A liquid crystal panel made of a liquid crystal injected therebetween and having a plurality of scan lines and data lines; Integrated on both lower substrates of the liquid crystal panel that do not overlap the lower substrate, respectively, and outputs a plurality of scan line driving signals for sequentially driving the plurality of scan lines of the liquid crystal panel one at a time in accordance with a clock signal. First and second scan driving circuits, a data driving circuit mounted on a tape carrier package and electrically connected to the liquid crystal panel through a pad portion of the tape carrier package to apply a data input signal and a clock signal to the liquid crystal panel; And a controller for applying a clock signal and a data input signal to the data driving circuit.