KR100236038B1 - Multiplexer and demultiplexer for directly interfacing external image signals in an atm card - Google Patents

Abstract

The present invention relates to an ATM card multiplexing and demultiplexing apparatus, wherein a multiplexing processor 32 and a demultiplexing processor 34 for directly accessing video data input from outside are provided between the SAR unit and the physical layer unit. A header storage unit 32-1, in which the multiplexing unit stores a predetermined header; A multiplexer (32-3) which selects and outputs one from among the data input from the SAR unit, the output of the header storage unit, and a multiplex control signal among data input from the outside; Select data from the SAR unit or data input from the outside according to the connection, and when selecting input data from the outside, select the output of the header storage unit by a predetermined byte and then select the data input from the outside. It is composed of a multiplexing control unit 32-2 which provides a multiplexing control signal so that video data input from the outside can be transmitted at high speed.

Description

Multiplexing and Demultiplexing System of ATM Card for Direct Connection of External Images

The present invention relates to an ATM card multiplexing and demultiplexing device that enables data transfer directly from a MPEG card to a physical layer of an ATM card in a host system on which an MPEG card and an ATM card are mounted.

In general, ATM is a connection-oriented technology for the implementation of broadband ISDN (B-ISDN) and can support both connected and disconnected services. However, B-ISDN is evolving by adding and merging functions and services step by step based on the existing principles of ISDN. Therefore, in the process of integrating and developing the existing public telecommunication networks into B-ISDN, it is necessary to interwork the existing network with the network to be newly implemented due to economic efficiency and efficiency, and to accommodate the functions of the existing network. A plan that can be implemented should be prepared.

On the other hand, in terms of communication networks, B-ISDN services can be classified into ones with constant bit rate, one with non-real time information transmission, one with a channel and one with no connection.

Therefore, in terms of bit rate, the B-ISDN service can be broadly classified into a fixed bit rate and a variable one. The former is called a constant bit rate (CBR) service and the latter is a variable bit rate (VBR). : variable bit rate) service. A representative example of the CBR service is a 64kbps PCM audio signal, and can provide a video signal or a data signal in the form of a CBR service.

However, in general, since data signals have a VBR characteristic, it is natural to provide a VBR service, while video and audio signals can also be provided as a VBR service. The bit rate of the CBR service is determined by negotiation between the user and the network at the time of call establishment, and the bit rate is kept constant while the service is continued, and in the case of the VBR service, the bit rate is changed while the service is provided. If the change is too large, it will interfere with the communication network. Therefore, the characteristics of the VBR service should be informed to the network in advance.

On the other hand, AAL Type 1 provides the function of detecting and correcting bit errors in user data depending on the service, and in this case, it is recommended to detect and correct bit errors using Reed-Solomon code. It is. Two recommendations are presented in the above recommendations: the first method is suitable for loss-sensitive signal transmission and the second method is suitable for delay-sensitive signal transmission.

Therefore, note that the recommendation is that the first partitioning and recombination protocol data unit (SAR-PDU) of the convergence layer protocol data unit (CS-PDU) to match the synchronization of the convergence layer protocol data unit (CS-PDU). Convergence sublayer indicator (CSI) bit is set to "1", thereby preventing simultaneous use with a structured data transfer (SDT) scheme. In the loss sensitive signal transmission method, the transmitter adds a 4-octet lead solomon code for every 124 octets of input data, and the lead solomon code is transmitted to and processed by an octet loom. One cross matrix becomes the convergence layer protocol data unit (CS-PDU).

FIG. 1 is a diagram illustrating a flow of video data in a host system in which a MPEG card and an ATM card may be mounted.

As described above, in order to transmit a video signal through a conventional ATM card, the ATM card 30 receives data from an upper layer and sequentially delivers the data through an AAL layer and a physical layer. That is, in order to connect the video signal provided from the video card 20 to the ATM network or another ATM terminal through ATM communication, the video signal 20 is transmitted along the path “a” shown in FIG. 1.

When the MPEG card 20 is mounted on the host system 10, the host processor controls the MPEG card 20 through the MPEG driver 11a to provide a video service required by the application program 12a, and provides an ATM card. When 30 is mounted, the host processor controls the ATM card 30 through the ATM driver 11b to provide the ATM communication service required by the application program 12b.

If the application program in the host system requests a service for transmitting video data through ATM communication, the device drivers 11a and 11b transmit the video data input from the MPEG card 20 as shown in the path “a” of FIG. 1. ) To the ATM card 30, and the ATM card 30 transmits the image data. At this time, the ATM card 30 processes the video data input through the upper layer in accordance with the protocol while passing through a series of layers and connected to the ATM network or another ATM terminal through a transmission line.

However, when the real-time image data is transferred under the control of the device driver, which is the software operating in the host system, the execution speed of the device driver is slow, causing a delay. That is, since the ATM driver of the ATM card needs to allocate / release memory, update the values of control variables, or process various interrupts in order to transmit and receive packet data, video data is delayed during such processing.

Accordingly, an object of the present invention is to provide an ATM card which can improve the processing speed by connecting real-time data directly from the outside.

In order to achieve the above object, the apparatus of the present invention receives and splits data received from an upper layer through an ATM driver, and combines the payload of an ATM cell received from a physical layer to an upper layer through an ATM driver. The SAR unit for transmission and the ATM cells provided by the SAR unit are formed in accordance with a predetermined transmission format and transmitted to a transmission line, and an ATM cell is extracted from data received through the transmission line to transfer a predetermined payload to the SAR unit. In the ATM card provided with a physical layer for transmission,

A multiplexing processor and a demultiplexing processor for directly accessing video data input from the outside are located between the SAR unit and the physical layer,

The multiplexing unit

A header storage unit for storing a predetermined header, a multiplexer for selecting and outputting one of the data input from the SAR, the output of the header storage unit, and a multiplexing control signal from external data; According to the present invention, the data from the SAR or the data input from the outside is selected, but when the input data is selected from the outside, the multiplexing control signal is selected to select data from the outside after selecting a predetermined byte of the output of the header storage unit. It is characterized by consisting of a multiplexing control unit to provide.

1 is a view illustrating a flow of video data in a host system in which a video card and an ATM card may be mounted;

2 is a block diagram showing a transmission system of an ATM card for directly combining and transmitting a video signal input from the outside;

3 is a detailed block diagram of the multiplexing unit shown in FIG. 2;

4 is an example of an ATM header in FIG.

5 is a flowchart showing the flow of a transmission operation;

6 is a block diagram showing a receiving system of an ATM card for directly connecting and receiving a video signal input from the outside;

7 is a flowchart illustrating the flow of a reception operation.

Explanation of symbols on the main parts of the drawings

20: MPEG card 30: ATM card

11b: ATM driver 31: SAR section

32: multiplexing unit 33: physical layer unit

34: demultiplexing unit

Hereinafter, with reference to the accompanying drawings, preferred embodiments of the present invention will be described in detail.

In the present invention, the ATM card receives data from a higher layer and, as needed, receives data directly from the outside and delivers the data to a physical layer, thereby speeding up data transfer. That is, as shown in FIG. 1, the video card (MPEG) card 20 and the ATM card 30 may be mounted in the host system, so that real-time video data provided by the video card (MPEG) card 20 may be transferred to the ATM card 30. ), The real-time data is processed at a higher speed by providing a physical path through which the video card 20 can be directly connected to the ATM card 30 without going through a device driver as in the "b" path of FIG. To do it.

2 is a block diagram showing a transmission system of an ATM card for directly combining and transmitting a video signal input from the outside, FIG. 3 is a detailed block diagram of the multiplexing processor shown in FIG. 2, and FIG. An example of an ATM header, and FIG. 5 is a flowchart showing the flow of a transmission operation.

Referring to FIG. 2, the transmitting portion of the ATM card receives a SAR unit 31 for transferring data received from an upper layer through the ATM driver 11b and real-time data input from the SAR unit 31. It consists of a multiplexing processor 32 for multiplexing and transmitting the data, and a physical layer unit 33 for transmitting ATM cells in a predetermined transmission format (for example, STM-1) and transmitting them on a transmission line. In the embodiment of the present invention, the real-time data received from the outside is directly input from the video (MPEG) card 20 in the configuration as shown in FIG.

In FIG. 2, the SAR unit 31 is a block for dividing the messages received from the upper layer while organically communicating with the ATM driver 11b to form an ATM cell, and outputting the same. The video transmission interface 20a is a real-time to transmit. Logical building blocks that provide data. As shown in FIG. 3, the multiplexing processor 32 includes a header storage unit 32-1, a multiplexing control unit 32-2, and a multiplexer 32-3. ATM cells received from the multiplexing processor 32 are multiplexed to form a predetermined transmission format, converted into optical signals, and connected to an ATM network or another ATM terminal through an optical cable.

Referring to FIG. 3, the header storage unit 32-1 in the multiplexing unit 32 transfers real-time data input from a video card in the form of AAL 1, as shown in FIG. 4, with a 5-byte ATM header. It consists of 1 byte of AAL 1 header. That is, an ATM cell is divided into a 5 byte (or octet) header section and a 48 byte user information section. The 5 byte header structure includes a first byte having 4 bits of generic flow control (GFC) and 4 bytes. It consists of a virtual path identifier (VPI) of bits. The second byte is composed of a 4-bit virtual path identification number (VPI) and a 4-bit virtual channel identifier (VCI), and the third byte is an 8-bit virtual channel identifier (VCI). The fourth byte consists of a 4-bit virtual channel identification number (VCI), a 3-bit payload type (PT), and a 1-bit cell loss priority (CLP). The byte consists of 8 bits of header error control (HEC).

In addition, the SAR format of AAL Type 1 is divided into 47 bytes of SAR-PDU payload and 1 byte of header, and this header is divided into 4 bits of sequence number protection (SNP). SN is composed of a 1-bit convergence sublayer indicator (CSI) and a 3-bit sequence count (SC), and the sequence number protection (SNP) is a 3-bit CRC and a 1-bit parity. (P). In the embodiment of the present invention, when input from the video card, the 1-byte header of AAL 1 may have an arbitrary value.

In FIG. 3, the multiplexing control unit 32-2 includes a bit map table as shown in Table 1 below. The multiplexer 32-3: MUX includes a SAR unit according to an entry value of a bitmap table. 31) After selecting and outputting the ATM cell received from or selecting the output of the header storage unit, the data received from the video card is selected and output for 47 bytes.

TABLE 1

0 0 0 0 One One One 0 0 One One One 0 0 0 0 0 0 0 0 One One One One 0 0 0 0 One One 0 One One 0 0 One 0 0 One 0 0 0 0 0 0 One One One One One 0 0 0 One One One 0 0 0 One One One 0 0

For example, when the multiplexing control unit 32-2 is configured with the bitmap as shown in Table 1 above, and the entry value of the bitmap is "0", it outputs the ATM cell received from the SAR unit 31, and the entry value is In the case of "1", it is assumed that image data received directly from the outside is output.

Then, when the current entry pointer in Table 1 indicates the first entry, the first entry value is "0", so the multiplexer 32-3 receives the 53-byte ATM cell received from the SAR unit 31. And then increments the entry value by one to perform processing for the second entry. Since the value of the second entry is also "0", the ATM cell received from the SAR unit 31 is continuously selected and outputted. When the fifth entry is accessed, the multiplexer 32-3 is external. Select the data received from. At this time, since the SAR header of the ATM header and AAL 1 is stored in the header storage unit 32-1, first the 6-byte output of the header storage unit is selected, and then 47 bytes input from the video card are selected. As such, the multiplexer 32-3 must be provided with a count function for the bytes to be processed.

Next, a transmission operation for transmitting an ATM cell according to the present invention will be described with reference to FIG.

In FIG. 5, the multiplexer reads the current entry value indicated by the entry pointer from the bitmap implemented in the multiplexing control unit to determine whether the current entry value of the bitmap is 1 (100, 101). If the current entry value is 1, the 5-byte ATM header and 1-byte AAL 1 SAR header stored in the header storage unit are sent down to the physical layer in order to transmit the transmission data of the video card (102, 103). At this time, the VPI / VCI value of the ATM header is set at the time of call set-up and the entry value of the bitmap should be appropriately assigned during the initialization process. The entry pointer that points to the entry in the bitmap is also incremented by one each time an entry is incremented after it is reset during initialization. When the last entry in the table is reached, the entry pointer returns to the first entry and continues to cycle.

If the entry value of the bitmap is "0", the multiplexer reads one cell from the SAR and sends it down to the physical layer (104). When the processing for one cell of 53 bytes is completed in this manner, the bitmap pointer is incremented by 1 to process the next entry pointer.

6 is a block diagram illustrating a receiving system of an ATM card for directly connecting and receiving a video signal input from the outside, and FIG. 7 is a flowchart illustrating a receiving operation flow.

In FIG. 6, the reception system of the ATM card is composed of a physical layer unit 33, a demultiplexing processor 34, and a SAR unit 31, and the moving picture according to the VPI / VCI value of the ATM cell received from the physical layer unit 33. If the data is directly received by the card, the demultiplexing unit 34 outputs it to the video card 20 side, and if the data is received along the normal path, the demultiplexing unit 34 transmits it to the ATM driver 11b of the upper layer through the SAR unit 31. do.

Such a reception operation will be described with reference to the flow of FIG. 7 as follows.

When the ATM cell is received, it determines whether the VPI / VCI is a VPI / VCI for moving picture connection by reading 4 bytes of the ATM header to determine the path of the cell (201). In other words, the fifth in the 5-byte ATM header is the CRC, so it is sufficient to read only 4 bytes including the VPI / VCI.

If the VPI / VCI of the received cell matches the VPIm / VCIm for video card connection, two bytes of data corresponding to the CRC and AAL1 SAR headers are read and discarded from the physical layer, and 47 bytes of real-time data from the physical layer are discarded. Read and output to the video receiving interface (203, 204). If the VPI / VCI of the received cell does not match the VPIm / VCIm for connecting the video card, 49 bytes of data are read from the physical layer and output to the SAR unit (205).

The received cell is transferred and processed according to the path according to the VPI / VCI value, and the SAR unit 31 reassembles the received cells and delivers them to the ATM driver of the upper layer.

Here, when a video is directly connected, a 5-byte header and a 1-byte AAL 1 SAR header are transmitted. However, if AAL 1 SAR is unnecessary according to an application, a 5-byte ATM header may be transmitted and 48-byte video data may be transmitted.

As described above, according to the present invention, since the ATM card can directly transfer real-time data to the physical layer without going through the upper layer that requires the control of the device driver, the real-time data can be processed at a high speed. There is an effect that can reduce the burden.

Claims (3)

A SAR unit 31 for receiving and partitioning data received from an upper layer through an ATM driver and combining the payload of an ATM cell received from the physical layer and transferring the same to a higher layer through an ATM driver, and the SAR unit are provided. The physical layer unit 33 is formed to transmit ATM cells to a transmission line by forming the ATM cells in accordance with a predetermined transmission format, extract ATM cells from the data received through the transmission line, and transfer a predetermined payload to the SAR unit. In a given ATM card, A multiplexing processor 32 and a demultiplexing processor 34 for directly connecting the video data input from the outside are located between the SAR unit and the physical layer unit, The multiplexing processing unit A header storage unit 32-1 for storing a predetermined header; A multiplexer (32-3) which selects and outputs one from among the data input from the SAR unit, the output of the header storage unit, and a multiplex control signal among data input from the outside; Select data from the SAR unit or data input from the outside according to the connection, and when selecting input data from the outside, select the output of the header storage unit by a predetermined byte and then select the data input from the outside. Multiplexing and demultiplexing apparatus for ATM card for directly connecting an external image, characterized in that it consists of a multiplexing control unit (32-2) for providing a multiplexing control signal. The ATM card multiplexing and demultiplexing apparatus of claim 1, wherein the multiplexing control unit (32-2) is implemented as a bitmap. The method of claim 1, wherein when the demultiplexing processor 32-4 matches the received VPI / VCI with a predetermined video VPI / VCI, the payload of the received cell is directly output to the outside and does not match. And multiplexing and demultiplexing an ATM card for directly connecting an external image, characterized in that output to the SAR unit.

Images