KR100234726B1 - Method for sawing semiconductor wafer - Google Patents

Method for sawing semiconductor wafer Download PDF

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KR100234726B1
KR100234726B1 KR1019970021932A KR19970021932A KR100234726B1 KR 100234726 B1 KR100234726 B1 KR 100234726B1 KR 1019970021932 A KR1019970021932 A KR 1019970021932A KR 19970021932 A KR19970021932 A KR 19970021932A KR 100234726 B1 KR100234726 B1 KR 100234726B1
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wafer
vacuum
cutting
cut
individual chips
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KR1019970021932A
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Korean (ko)
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KR19980085772A (en
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조재원
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김영환
현대반도체주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68778—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting substrates others than wafers, e.g. chips

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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Abstract

본 발명에 의한 반도체 웨이퍼의 절단방법은 다수개의 진공라인을 구비하고, 상기 진공라인 사이에 절단홈을 형성한 진공척 위에 웨이퍼를 올려놓는 단계와; 상기 진공라인을 통해 웨이퍼를 고정한 후 상기 절단홈위를 톱날이 지나가도록 하여 개별칩으로 웨이퍼를 절단하는 단계와; 상기 개별칩으로 절단된 웨이퍼를 고정한 진공척을 뒤집은 후, 진공공급을 중단하여 칩캐리어 위에 올려놓는 단계의 순으로 진행하여, 웨이퍼 절단공정시 포일 마운트 공정을 삭제시킴으로써, 반도체 패키지 공정을 단순화 시키고, 웨이퍼에 범프 및 와이어핀이 형성되어 있는 경우 이를 간단하게 절단할 수 있도록 하였다.The method of cutting a semiconductor wafer according to the present invention comprises the steps of: placing a wafer on a vacuum chuck having a plurality of vacuum lines and forming cutting grooves between the vacuum lines; Fixing the wafer through the vacuum line and cutting the wafer with individual chips by passing saw blades through the cutting groove; After inverting the vacuum chuck fixing the wafers cut by the individual chips, the vacuum supply is stopped and placed on the chip carrier, thereby eliminating the foil mounting process in the wafer cutting process, thereby simplifying the semiconductor package process. If bumps and wire pins are formed on the wafer, they can be easily cut.

Description

반도체 웨이퍼의 절단방법Cutting method of semiconductor wafer

본 발명은 반도체 웨이퍼의 절단방법에 관한 것으로, 특히 웨이퍼 절단공정시 포일 마운트 공정을 삭제시킴으로써, 반도체 패키지 공정을 단순화 시키고, 웨이퍼에 범프 및 와이어핀이 형성되어 있는 경우 이를 간단하게 절단할 수 있도록 한 반도체 웨이퍼의 절단방법에 관한 것이다.The present invention relates to a method of cutting a semiconductor wafer, and in particular, by eliminating the foil mount process during the wafer cutting process, the semiconductor package process is simplified, and when bumps and wire pins are formed on the wafer, they can be easily cut. A method for cutting a semiconductor wafer.

종래의 기술에 의한 반도체 웨이퍼의 절단방법을 도 1 내지 도 6에 도시한 첨부도면에 의해 설명하면 다음과 같다.A method of cutting a semiconductor wafer according to the prior art will be described with reference to the accompanying drawings shown in FIGS. 1 to 6.

웨이퍼를 잡아줄 수 있는 진공홀(1) 및 웨이퍼의 처짐을 방지할 수 있는 에어부(2)가 구비된 포일 마운트 척(foil mount chuck)(3)위에 웨이퍼 프레임 (4)및 웨이퍼(5)를 웨이퍼의 뒷면이 위로 향하도록 놓는다. 그런 다음 스티키 포일(sticky foil)(6)을 펼쳐 놓는다. 그런 다음 롤러(7)를 사용하여 스티키 포일(6)을 웨이퍼 프레임(4) 및 웨이퍼(5) 뒷면에 붙인다. 그런 다음 커터(8)를 사용하여 상기 웨이퍼 프레임(4) 중간에서 스티키 포일(6)을 절단한다. 그런 다음 진공 및 에어의 공급을 중단하고 웨이퍼 프레임(4)에 스티키 포일로 부착된 웨이퍼(5)를 분리한다. 그런 다음 포일 마운트된 웨이퍼를 절단척(10)에 올려놓고 진공으로 웨이퍼를 고정시킨 후 톱날(9)을 사용하여 웨이퍼(5)를 절단한다.Wafer frame 4 and wafer 5 on foil mount chuck 3 having a vacuum hole 1 to hold the wafer and an air portion 2 to prevent the wafer from sagging. Is placed with the back side of the wafer facing up. The sticky foil 6 is then spread out. The sticky foil 6 is then attached to the wafer frame 4 and the back of the wafer 5 using a roller 7. Then use the cutter 8 to cut the sticky foil 6 in the middle of the wafer frame 4. Then, the supply of vacuum and air is stopped and the wafer 5 attached with the sticky foil to the wafer frame 4 is separated. Then, the foil-mounted wafer is placed on the cutting chuck 10, the wafer is fixed by vacuum, and the wafer 5 is cut using the saw blade 9.

종래의 기술에서는 웨이퍼(5)를 개별칩으로 절단하기 위해 웨이퍼 프레임(4) 및 스티키 포일(6)을 사용하여 반드시 포일 마운트 하여야 하고, 스티키 포일 접착성 물질이 웨이퍼(5) 뒷면에 잔존하므로 반도체 패키지 형성시 봉지수지와의 접착력을 약화시켜 패키지 크랙 및 갈라짐을 유발시켜 신뢰성을 저하시키는 문제점이 있는 바, 본 발명의 목적은 상기와 같은 문제점을 고려하여 안출한 것으로, 웨이퍼 절단공정시 포일 마운트 공정을 삭제시킴으로써, 반도체 패키지 공정을 단순화 시키고, 웨이퍼에 범프 및 와이어핀이 형성되어 있는 경우 이를 간단하게 절단할 수 있도록 한 반도체 웨이퍼의 절단방법을 제공함에 있다.In the prior art, a foil must be mounted using the wafer frame 4 and the sticky foil 6 to cut the wafer 5 into individual chips, and since the sticky foil adhesive material remains on the back of the wafer 5, the semiconductor When the package is formed, there is a problem of reducing the reliability by weakening the adhesive force with the encapsulation resin to cause the package crack and crack, the object of the present invention was devised in consideration of the above problems, the foil mounting process in the wafer cutting process By eliminating the present invention, the semiconductor package process is simplified, and when bumps and wire pins are formed on the wafer, the present invention provides a method of cutting a semiconductor wafer.

도 1은 종래의 기술에 의한 포일 마운트 척 위에 웨이퍼를 올려놓은 상태를 나타내는 단면도.1 is a cross-sectional view showing a state where a wafer is placed on a foil mount chuck according to the related art.

도 2는 종래의 기술에 의한 포일 마운트 척 위의 웨이퍼에 스티키 포일을 올려놓는 상태를 나타내는 단면도.Fig. 2 is a cross-sectional view showing a state where a sticky foil is placed on a wafer on a foil mount chuck according to the prior art.

도 3은 종래의 기술에 의한 포일 마운트 척 위의 웨이퍼에 스티키 포일을 올려놓은 후 롤러로 누르는 상태를 나타내는 단면도.3 is a cross-sectional view showing a state where a sticky foil is placed on a wafer on a foil mount chuck according to the prior art and pressed with a roller;

도 4는 종래의 기술에 의한 포일 마운트 척 위의 웨이퍼에 스티키 포일을 붙인 후 커터로 스티키 포일을 잘라내는 상태를 나타내는 단면도.Fig. 4 is a cross-sectional view showing a state in which a sticky foil is attached to a wafer on a foil mount chuck according to the prior art and then the sticky foil is cut out with a cutter.

도 5는 종래의 기술에 의한 웨이퍼 및 웨이퍼 프레임에 스티키 포일을 붙인 상태를 나타내는 단면도.Fig. 5 is a cross-sectional view showing a state where sticky foil is attached to a wafer and a wafer frame according to the prior art.

도 6은 종래의 기술에 의한 절단척 위에 웨이퍼를 올려놓고 톱날을 이용하여 개별칩으로 절단하는 상태를 나타내는 단면도.6 is a cross-sectional view showing a state in which a wafer is placed on a cutting chuck according to the prior art and cut into individual chips using a saw blade.

도 7은 본 발명에 의한 웨이퍼를 나타내는 평면도 및 부분 확대 사시도.7 is a plan view and a partially enlarged perspective view showing a wafer according to the present invention;

도 8은 본 발명에 의한 진공척 위에 웨이퍼를 올려놓은 상태를 나타내는 단면도.8 is a cross-sectional view showing a state where a wafer is placed on a vacuum chuck according to the present invention.

도 9는 본 발명에 의한 진공척 위에 웨이퍼를 올려놓은 후 웨이퍼를 칩단위로 절단하는 상태를 나타내는 단면도.9 is a cross-sectional view showing a state in which the wafer is cut in units of chips after placing the wafer on the vacuum chuck according to the present invention.

도 10은 본 발명에 의한 진공척 위에 웨이퍼를 올려놓은 후 웨이퍼를 칩단위로 절단한 상태를 나타내는 단면도.10 is a cross-sectional view showing a state in which the wafer is cut into chips after placing the wafer on the vacuum chuck according to the present invention.

도 11은 본 발명에 의한 진공척에 고정된 웨이퍼를 뒤집어 칩캐리어 위로 로 가져간 상태를 나타내는 단면도.Fig. 11 is a sectional view showing a state in which a wafer fixed to a vacuum chuck according to the present invention is turned over and taken over a chip carrier.

도 12는 본 발명에 의한 칩캐리어에 절단한 웨이퍼의 칩단위를 올려놓은 상태를 나타내는 단면도.12 is a cross-sectional view showing a state where a chip unit of a cut wafer is placed on a chip carrier according to the present invention.

(도면의 주요부분에 대한 부호의 설명)(Explanation of symbols for the main parts of the drawing)

20 ; 웨이퍼21 ; 개별 칩20; Wafer 21; Individual chips

22 ; 와이어 핀23 ; 절단홈22; Wire pins 23; Cutting groove

24 ; 진공척26 ; 진공라인24; Vacuum chuck 26; Vacuum line

30 ; 톱날31 ; 칩캐리어30; Saw blade 31; Chip Carrier

이러한, 본 발명의 목적은 다수개의 진공라인을 구비하고, 상기 진공라인 사이에 절단홈을 형성한 진공척 위에 웨이퍼를 올려놓는 단계와; 상기 진공라인을 통해 웨이퍼를 고정한 후 상기 절단홈위를 톱날이 지나가도록 하여 개별칩으로 웨이퍼를 절단하는 단계와; 상기 개별칩으로 절단된 웨이퍼를 고정한 진공척을 뒤집은 후, 진공공급을 중단하여 칩캐리어 위에 올려놓는 단계로 진행함에 의해 달성된다.Such an object of the present invention includes the steps of placing a wafer on a vacuum chuck having a plurality of vacuum lines and forming a cutting groove between the vacuum lines; Fixing the wafer through the vacuum line and cutting the wafer with individual chips by passing saw blades through the cutting groove; It is achieved by inverting the vacuum chuck holding the wafer cut by the individual chips, and then stopping the vacuum supply and placing it on the chip carrier.

이하, 본 발명에 의한 반도체 웨이퍼의 절단방법을 첨부도면에 도시한 실시예에 따라서 설명한다.Hereinafter, the cutting method of the semiconductor wafer by this invention is demonstrated according to the Example shown in an accompanying drawing.

도 7은 본 발명에 의한 웨이퍼를 나타내는 평면도 및 부분 확대 사시도이고, 도 8은 본 발명에 의한 진공척 위에 웨이퍼를 올려놓은 상태를 나타내는 단면도이며, 도 9는 본 발명에 의한 진공척 위에 웨이퍼를 올려놓은 후 웨이퍼를 칩단위로 절단하는 상태를 나타내는 단면도이고, 도 10은 본 발명에 의한 진공척 위에 웨이퍼를 올려놓은 후 웨이퍼를 칩단위로 절단한 상태를 나타내는 단면도이며, 도 11은 본 발명에 의한 진공척에 고정된 웨이퍼를 뒤집어 칩캐리어 위로 로 가져간 상태를 나타내는 단면도이고, 도 12는 본 발명에 의한 칩캐리어에 절단한 웨이퍼의 칩단위를 올려놓은 상태를 나타내는 단면도를 각각 보인 것이다.Fig. 7 is a plan view and a partially enlarged perspective view showing a wafer according to the present invention, Fig. 8 is a sectional view showing a state where a wafer is placed on a vacuum chuck according to the present invention, and Fig. 9 is a wafer placed on a vacuum chuck according to the present invention. Fig. 10 is a cross sectional view showing a state in which a wafer is cut in chips after being placed, and Fig. 10 is a cross sectional view showing a state in which a wafer is cut in chips after placing a wafer on a vacuum chuck according to the present invention. It is sectional drawing which shows the state which flipped the wafer fixed to the vacuum chuck, and took it to the chip carrier, and FIG. 12 shows sectional drawing which shows the state which mounted the chip unit of the cut | disconnected wafer on the chip carrier by this invention, respectively.

이에 도시한 바와 같이, 본 발명에 의한 반도체 웨이퍼의 절단방법은 다수개의 진공라인(26)을 구비하고, 상기 진공라인 사이에 절단홈(23)을 형성한 진공척(24) 위에 웨이퍼(20)를 올려놓는 단계와; 상기 진공라인(26)을 통해 웨이퍼(20)를 고정한 후 상기 절단홈(23)위를 톱날(30)이 지나가도록 하여 개별칩(21)으로 웨이퍼를 절단하는 단계와; 상기 개별칩(21)으로 절단된 웨이퍼를 고정한 진공척(24)을 뒤집은 후, 진공공급을 중단하여 칩캐리어(31) 위에 올려놓는 단계로 구성된다.As shown in the drawing, the semiconductor wafer cutting method according to the present invention includes a plurality of vacuum lines 26 and a wafer 20 on a vacuum chuck 24 having cutting grooves 23 formed between the vacuum lines. Placing the step; Fixing the wafer 20 through the vacuum line 26 and cutting the wafer into individual chips 21 so that the saw blade 30 passes through the cutting groove 23; After turning over the vacuum chuck 24 fixing the wafer cut by the individual chips 21, the vacuum supply is stopped and placed on the chip carrier 31.

도면중 미설명 부호 22는 와어어 핀을 나타낸다.In the figure, reference numeral 22 denotes a wire pin.

종래에는 웨이퍼에 범프(bump)나 와이어 핀이 형성되어 있는 경우에는 웨이퍼의 절단공정이 용이하지 않았으나 본 발명에 의한 방법으로는 간단하게 웨이퍼를 절단할 수 있다.Conventionally, in the case where bumps or wire pins are formed on the wafer, the wafer cutting process is not easy, but the wafer according to the present invention can be easily cut.

즉 범프 또는 와이어 핀(22)이 형성되어 있는 웨이퍼(20)를 진공라인(26) 및 웨이퍼 칩 패턴과 동일한 형태의 절단홈(23)이 형성되어 있는 진공척(24)에 올려 놓는다. 그런 다음 상기 진공라인(26)으로 진공을 동작시켜 웨이퍼(20)를 고정시키고, 톱날(30)을 사용하여 개별칩(21) 단위로 웨이퍼를 절단한다. 그런 다음 칩 캐리어(31) 위에 진공척(24)을 뒤집은 후 진공 공급을 중단시키면 절단된 칩(21)이 칩 캐리어(24)에 놓이게 된다.That is, the wafer 20 in which the bumps or the wire pins 22 are formed is placed on the vacuum chuck 24 in which the cutting grooves 23 having the same shape as the vacuum line 26 and the wafer chip pattern are formed. Then, the vacuum line 26 is operated to fix the wafer 20, and the saw blade 30 is used to cut the wafer in units of individual chips 21. Then, the vacuum chuck 24 is turned over on the chip carrier 31 and the vacuum supply is interrupted so that the cut chip 21 is placed on the chip carrier 24.

이상에서 설명한 바와 같이, 본 발명에 의한 반도체 웨이퍼의 절단방법은 다수개의 진공라인을 구비하고, 상기 진공라인 사이에 절단홈을 형성한 진공척 위에 웨이퍼를 올려놓는 단계와; 상기 진공라인을 통해 웨이퍼를 고정한 후 상기 절단홈위를 톱날이 지나가도록 하여 개별칩으로 웨이퍼를 절단하는 단계와; 상기 개별칩으로 절단된 웨이퍼를 고정한 진공척을 뒤집은 후, 진공공급을 중단하여 칩캐리어 위에 올려놓는 단계의 순으로 진행하여, 웨이퍼 절단공정시 포일 마운트 공정을 삭제시킴으로써, 반도체 패키지 공정을 단순화 시키고, 웨이퍼에 범프 및 와이어핀이 형성되어 있는 경우 이를 간단하게 절단할 수 있도록 한 효과가 있다.As described above, the method of cutting a semiconductor wafer according to the present invention comprises the steps of placing a wafer on a vacuum chuck having a plurality of vacuum lines, and forming a cutting groove between the vacuum lines; Fixing the wafer through the vacuum line and cutting the wafer with individual chips by passing saw blades through the cutting groove; After inverting the vacuum chuck fixing the wafers cut by the individual chips, the vacuum supply is stopped and placed on the chip carrier, thereby eliminating the foil mounting process in the wafer cutting process, thereby simplifying the semiconductor package process. If bumps and wire pins are formed on the wafer, there is an effect that can be easily cut.

Claims (1)

다수개의 진공라인을 구비하고, 상기 진공라인 사이에 절단홈을 형성한 진공척 위에 웨이퍼를 올려놓는 단계와; 상기 진공라인을 통해 웨이퍼를 고정한 후 상기 절단홈위를 톱날이 지나가도록 하여 개별칩으로 웨이퍼를 절단하는 단계와; 상기 개별칩으로 절단된 웨이퍼를 고정한 진공척을 뒤집은 후, 진공공급을 중단하여 칩캐리어 위에 올려놓는 단계의 순으로 진행함을 특징으로 하는 반도체 웨이퍼의 절단방법.Placing a wafer on a vacuum chuck having a plurality of vacuum lines and forming cutting grooves between the vacuum lines; Fixing the wafer through the vacuum line and cutting the wafer with individual chips by passing saw blades through the cutting groove; And inverting the vacuum chuck fixing the wafers cut by the individual chips, and stopping the vacuum supply and placing them on the chip carriers.
KR1019970021932A 1997-05-30 1997-05-30 Method for sawing semiconductor wafer KR100234726B1 (en)

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KR100476591B1 (en) * 2002-08-26 2005-03-18 삼성전자주식회사 Wafer table, apparatus for sawing wafer and attaching semiconductor device and apparaus for sawing wafer and sorting semiconductor device using the same
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