KR100228379B1 - Apparatus for providing a clock in dual system - Google Patents

Abstract

1. TECHNICAL FIELD OF THE INVENTION

Clock supply in a redundant system.

2. Technical problem to be solved by the invention

In a redundant system, if the board containing the clock supply in operating mode fails, the clock is synchronized.

3. Summary of Solution to Invention

The clock supply device includes a phase locked loop and a voltage controlled oscillator to receive the clock supplied to the clock supply device of the operation board, and the clock supply device of the backup board receives the clock supplied from the clock supply device of the operation board and the spare board. In case of failure of the operation board, transfer to the spare board so that the clock with the same phase and frequency as the clock provided from the operation board is continuously supplied.

4. Important uses of the invention

Used for redundant systems.

Description

Clock supply in a redundant system {APPARATUS FOR PROVIDING A CLOCK IN DUAL SYSTEM}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clock supply apparatus in a redundant system. In particular, in a redundant transmission system, phase fixation is performed to prevent a temporary malfunction of the system due to a mismatch of the system clock when switching between the operation board and the spare board due to a system failure. The present invention relates to a clock supply device that supplies an identical clock to an operation board and a spare board using a phase locked loop (PLL).

In general, in a system that requires stable operation such as a broadcasting transmission system, a redundant structure is used in which the same functional blocks are doubled and connected to each other by a cross point switch. Therefore, even if any function block of the operation board occurs during system operation, it can not only maintain normal operation by switching to the same function block that is configured in parallel by operating the cross point switch, but also normal system operation. It enables maintenance functions even during operation.

FIG. 1 is a structural diagram of a general redundancy system, and shows only processors A1 and A2 (15 and 16) and processors B1 and B2 (11 and 12) which are a part of a whole system having many functional blocks.

Processor A1 15 and processor A2 16 have the same function, and processor B1 11 and processor B2 12 also have the same function. Processors having these same functions are connected to a cross point switch, and a cross point switch selects one function block appropriately according to a fault condition and basic conditions among the same function blocks.

2 is a block diagram of a clock supply apparatus using an oscillator in a conventional redundant system.

A cross-point switch is located between the multiplexers A and B (25, 26) and modulators A and B (21, 22), and the modulators (21, 22) are synchronized with the multiplexers (25, 26). The clock is generated through an oscillator (OSC) and provided to the multiplexers 25 and 26. The multiplexers 25 and 26 use this clock to generate data and frame synchronization signals to the modulators 21 and 22, and output these clocks to the modulators 21 and 22 again.

The modulators 21 and 22 use this synchronization signal to align the FEC frames in the data packet, and also use this clock to process all the data.

If the switches SW1 and SW2 (23, 24) are set to operate the multiplexer A (MUX-A) 25 and the modulator A (MOD-A) 21 during the initial operation in the redundant system, the modulator A The modulator A 21, the modulator B 22, the multiplexer A 25, and the multiplexer B 26 operate in accordance with the clock generated by the oscillator A (OSC-A) of (21).

If a failure occurs in the multiplexer A (25) during this operation, the switch SW2 switches to the multiplexer B (22) to operate normally, but a failure occurs in the modulator A (21) including an oscillator that generates a system clock. When this occurs, switch SW1 24 switches to modulator B 22, so that the buffered data of modulators A and B (21, 22) and multiplexers A and B (25, 26) are refreshed according to the switching operation. The synchronization with the set system clock OSC-B may occur.

As a result of this inconsistency in system clock synchronization, the clock synchronization does not coincide between the modulator and the multiplexer until the buffered data is completely removed. In this case, the frame synchronization signal delays or reads a few bits. There was a problem in that the data packets could not be separated correctly, resulting in an incorrect result, and as a final result, the receiver could not decode them correctly.

Accordingly, the present invention has been made to solve the above problems, phase fixation to prevent the temporary malfunction of the system due to the mismatch of the system clock when switching between the operation board and the spare board due to the failure of the system in a redundant system The purpose of the present invention is to provide a clock supply device capable of synchronizing the redundant boards by supplying the same clock to the operation board and the spare board using a phase locked loop (PLL).

1 is a structural diagram of a general redundancy system;

2 is a block diagram of a clock supply apparatus using an oscillator in a conventional redundant system;

3 is a configuration diagram of an embodiment of a clock supply apparatus using a PLL in a redundant system according to the present invention.

* Explanation of symbols for main parts of the drawings

31, 32: modulator 33, 34: switch

35, 36: multiplexer 37: phase locked loop (PLL)

38: voltage controlled oscillator (VCO)

In order to achieve the above object, the present invention provides a clock supply device for supplying a clock required for each of the redundant functional units in a system that is duplexed in an operation mode and a reserve mode, the phase fixing loop for matching the phase of the clock; A voltage controlled oscillator for generating a clock in response to the signal of the phase locked loop, wherein each redundant function unit is synchronized by a clock generated from the voltage controlled oscillator located in an operation board at an initial stage, and the phase fixed positioned in a spare board The loop receives the output of the voltage controlled oscillator located in the operating board and matches the phase supplied from the voltage controlled oscillator located in the operating board to control the voltage controlled oscillator located in the spare board to control the voltage of the operating board. Same frequency and same clock supplied from oscillator By generating a clock having a phase is characterized in that configured to supply the clock by the voltage controlled oscillator located in the spare board by switching to a spare board when the board operating in the operating mode including the voltage controlled oscillator.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying FIG. 3.

3 is a block diagram of an embodiment of a clock supply apparatus using a PLL in a redundancy system according to the present invention, and includes modulators 31 and 32, switches 33 and 34, and multiplexers 35 and 36. And a phase locked loop (PLL) 37 and a voltage controlled oscillator (VCO) 38.

In the present invention having such a configuration, the multiplexer A 35 and the modulator 31, the multiplexer A 35 and the modulator 32, the multiplexer B 36 and the modulator 31, as in the conventional redundancy system, are provided. Cross-point switches 33 and 34 are disposed between the multiplexer B 36 and the modulator 32.

Further, in the present invention, the modulators 31 and 32 provide a clock to the multiplexers 35 and 36 for synchronization with the multiplexers 35 and 36, and the multiplexers 35 and 36 use this clock to provide data. The frame synchronization signal is generated and provided to the modulators 31 and 32, and the transferred clock is transmitted to the modulators 31 and 32.

The conventional modulators 21 and 22 shown in Fig. 1 use this synchronization signal to align the FEC frames in the data packets and use this clock to process all the data.

However, in the present invention, the phase locked loop (PLL) is used to provide the same clock having the same phase to the operation board and the spare board of the redundant system.

In the initial operation, if the switch SW1 33 and the switch SW2 34 are set so that the multiplexer A 35 and the modulator 31 operate, the self-oscillating voltage controlled oscillator (VCO−) in the modulator 31 is operated. Modulator A 39, modulator B 40, multiplexer A 35, and multiplexer B 36 operate in accordance with the clock generated in A) 38, and the phase locked loop PLL in modulator 32 ( 41) phases the clock above.

Therefore, it can be said that the clock output from the voltage controlled oscillators 38 and 42 in the steady state modulators 31 and 32 are in frequency and in phase.

As described above, during operation, a failure occurs in the modulator 31 including the voltage controlled oscillator 38 so that the voltage controlled oscillator 38 of the modulators 31 and 32 may be changed even when the switch SW1 34 is switched. , Since the output clocks of the power generators 42 are in frequency and in phase, no problem occurs, and as a result of the switching operation, the voltage controlled oscillator (VCO-B) 42 in the modulator 32 operates in a self-oscillating state. The modulators 31 and 32, the multiplexer A 35 and the multiplexer B 36 operate according to the clock generated by the clock, and the phase locked loop (PLL) 38 in the modulator 31 is controlled by the modulator ( The clock generated from the voltage controlled oscillator 42 of 32 is matched in phase.

The present invention described above is capable of various substitutions, modifications, and changes within the scope without departing from the technical spirit of the present invention for those skilled in the art to which the present invention pertains, and thus is limited to the above-described embodiments and drawings. It is not.

The present invention made as described above, by using the phase locked loop (PLL) when switching between the operation board and the spare board due to the failure of the system in a redundant system, by matching the clock synchronization, The temporary malfunction can be prevented, and there is an excellent effect that can significantly increase the reliability of the redundant system.

Claims (1)

In the clock supply device for supplying the clock required for each redundant functional unit in a system that is duplexed in the operation mode and the reserve mode, A phase locked loop for matching the phase of the clock and a voltage controlled oscillator for generating a clock in response to the signal of the phase locked loop, Initially, each redundant function unit is synchronized by a clock generated from the voltage controlled oscillator located in the operating board, and the phase lock loop located in the spare board receives the output of the voltage controlled oscillator located in the operating board. By matching the phase supplied with the clock supplied from the voltage-controlled oscillator located, and controlling the voltage-controlled oscillator located in the spare board to generate a clock having the same phase and the same frequency as the clock supplied from the voltage-controlled oscillator of the operation board And switching to a spare board when a board operating in an operation mode including the voltage controlled oscillator is switched to supply a clock to a voltage controlled oscillator located in the spare board.