KR100227624B1 - Bonding pad manufacturing method of semiconductor device - Google Patents
Bonding pad manufacturing method of semiconductor device Download PDFInfo
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- KR100227624B1 KR100227624B1 KR1019960057356A KR19960057356A KR100227624B1 KR 100227624 B1 KR100227624 B1 KR 100227624B1 KR 1019960057356 A KR1019960057356 A KR 1019960057356A KR 19960057356 A KR19960057356 A KR 19960057356A KR 100227624 B1 KR100227624 B1 KR 100227624B1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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Abstract
본 발명은 반도체 소자의 본딩 패드 형성 방법에 관한 것으로, 본딩 패드와 본딩 와이어간의 접속을 양호하게 이루기 위하여 SiON막을 이용하여 반사 방지막을 형성하므로써 잔유물의 생성을 방지하여 사진 공정의 효율을 향상시켜 소자의 전기적 특성 및 수율이 증대될 수 있도록 한 반도체 소자의 본딩 패드 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a bonding pad of a semiconductor device. In order to achieve good connection between a bonding pad and a bonding wire, an anti-reflection film is formed by using a SiON film to prevent the formation of residues, thereby improving the efficiency of the photolithography process. The present invention relates to a method for forming a bonding pad of a semiconductor device to increase electrical characteristics and yield.
Description
본 발명은 반도체 소자의 본딩 패드 형성 방법에 관한 것으로, 특히 잔유불의 생성을 방지하며 사진 공정의 효율을 향상시킬 수 있도록 한 반도체 소자의 본딩 패드 형성 방법에 관한 것이다.The present invention relates to a method of forming a bonding pad of a semiconductor device, and more particularly, to a method of forming a bonding pad of a semiconductor device to prevent the generation of residual light and to improve the efficiency of a photographic process.
일반적으로 반도체 소자의 제조 공정에서 소자 형성 공정이 완료되면 각 소자에 전원을 공급하며 소자간의 전기적인 연결을 위한 배선 역할을 하는 금속층을 형성한다. 그리고 외부의 영향으로부터 소자를 보호하기 위하여 상기 금속층상에 보호막을 형성한 후 상기 보호막을 패터닝하여 상기 금속층의 소정 부분을 노출시킨다. 이를 본딩 패드(Bonding Pad)라 하는데, 본딩 패드에는 리드 프레임(Lead Frame)과의 연결을 위한 본딩 와이어(Bonding Wire)가 접속된다. 그러면 종래 반도체 소자의 본딩 패드 형성 방법을 제1(a)도 및 제1(b)도를 통해 설명하면 다음과 같다.In general, when the device forming process is completed in the manufacturing process of the semiconductor device to supply power to each device to form a metal layer that serves as a wiring for the electrical connection between the devices. In order to protect the device from external influences, a protective film is formed on the metal layer, and then the protective film is patterned to expose a predetermined portion of the metal layer. This is called a bonding pad, and a bonding wire for connecting to a lead frame is connected to the bonding pad. Next, a method of forming a bonding pad of a conventional semiconductor device will be described with reference to FIGS. 1A and 1B as follows.
종래에는 제1(a)도에 도시된 바와 같이 소자 제조 공정이 완료되어 절연막(2)이 형성된 실리콘 기판(1)상에 금속층(3)을 형성한 후 스퍼터링(Sputtering) 방식으로 상기 금속층(3)상에 TiN막(4)을 증착하여 반사 방지막을 형성한다. 그리고 상기 TiN막(4)상에 보호막(5)을 형성한 후 상기 금속층(3)의 소정 부분이 노출되도록 상기 보호막(5) 및 TiN막(4)을 순차적으로 패터닝하여 제1(b)도에 도시된 바와 같이 본딩 패드(6)를 형성한다. 그런데 상기 보호막(5) 및 TiN막(4)을 패터닝하는 과정에서 상기 본딩 패드(6)상에 상기 TiN막(4)이 완전히 제거되지 않고 잔유물(7)로 남게 되어 상기 본딩 패드(6)와 본딩 와이어(도시않됨)간의 접속을 불량하게 만든다. 그러므로 상기 본딩 패드(6)와 본딩 와이어간의 접촉 저항이 증가되어 소자의 전기적 특성이 저하된다. 또한 상기 반사 방지막으로 사용되는 TiN막(4)은 금속층 패터닝시 스트레스(Stress)에 의해 갈라지는 단점을 가진다.Conventionally, as shown in FIG. 1 (a), the device fabrication process is completed to form the metal layer 3 on the silicon substrate 1 on which the insulating film 2 is formed, and then the metal layer 3 is formed by sputtering. The TiN film 4 is deposited on the N-) to form an anti-reflection film. After the protective film 5 is formed on the TiN film 4, the protective film 5 and the TiN film 4 are sequentially patterned to expose a predetermined portion of the metal layer 3. Bond pads 6 are formed as shown in FIG. However, in the process of patterning the passivation layer 5 and the TiN layer 4, the TiN layer 4 is not completely removed but remains as a residue 7 on the bonding pad 6. Bad connection between bonding wires (not shown). Therefore, the contact resistance between the bonding pad 6 and the bonding wire is increased, thereby deteriorating the electrical characteristics of the device. In addition, the TiN film 4 used as the anti-reflection film has a disadvantage of being split by stress when patterning a metal layer.
따라서 본 발명은 SiON막을 이용하여 반사 방지막을 형성하므로써 상기한 단점을 해소할 수 있는 반도체 소자의 본딩 패드 형성 방법을 제공하는 데 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for forming a bonding pad of a semiconductor device which can solve the above disadvantages by forming an antireflection film using a SiON film.
상기한 목적을 달성하기 위한 본 발명은 절연막이 형성된 실리콘 기판상에 금속층을 형성한 후 상기 금속층상에 SiON막을 증착하여 반사 방지막을 형성하는 단계와, 상기 단계로부터 상기 반사 방지막상에 보호막을 형성한 후 상기 금속층의 소정 부분이 노출되도록 상기 보호막 및 반사 방지막을 순차적으로 패터닝하는 단계로 이루어지는 것을 특징으로 하며, 상기 SiON막을 플라즈마 화학기상증착 방법으로 증착되는 것을 특징으로 한다.According to an aspect of the present invention, a metal layer is formed on a silicon substrate on which an insulating film is formed, and then a SiON film is deposited on the metal layer to form an anti-reflection film. From the step, a protective film is formed on the anti-reflection film. Afterwards, the protective film and the anti-reflection film are patterned sequentially so that a predetermined portion of the metal layer is exposed, and the SiON film is deposited by a plasma chemical vapor deposition method.
제1(a)도 및 제1(b)도는 종래 반도체 소자의 본딩 패드 형성 방법을 설명하기 위한 소자의 단면도.1 (a) and 1 (b) are cross-sectional views of a device for explaining a method of forming a bonding pad of a conventional semiconductor device.
제2(a)도 및 제2(b)도는 본 발명에 따른 반도체 소자의 본딩 패드 형성 방법을 설명하기 위한 소자의 단면도.2 (a) and 2 (b) are cross-sectional views of a device for explaining a method of forming a bonding pad of a semiconductor device according to the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1, 11 : 실리콘 기판 2, 12 : 절연막1, 11: silicon substrate 2, 12: insulating film
3, 13 : 금속층 4 : TiN막3, 13: metal layer 4: TiN film
5, 15 : 보호막 6, 16 : 본딩 패드5, 15: protective film 6, 16: bonding pad
7 : 잔유물 14 : SiON막7: residue 14: SiON film
이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.
제2(a)도 및 제2(b)도는 본 발명에 따른 반도체 소자의 본딩 패드 형성 방법을 설명하기 위한 소자의 단면도로서,2 (a) and 2 (b) are cross-sectional views of a device for explaining a method of forming a bonding pad of a semiconductor device according to the present invention.
제2(a)도는 소자 제조 공정이 완료되엉 절연막(12)이 형성된 실리콘 기판(11)상에 금속층(13)을 형성한 후 플라즈마 화학기상증착(PECVD) 방법으로 상기 금속층(13)상에 SiON막(14)을 증착하여 반사 방지막을 형성한 상태의 단면도이다.FIG. 2 (a) shows that the device fabrication process is completed, and the metal layer 13 is formed on the silicon substrate 11 on which the insulating film 12 is formed, and then SiON is formed on the metal layer 13 by plasma chemical vapor deposition (PECVD). It is sectional drawing of the state which deposited the film | membrane 14 and formed the anti-reflective film.
제2(b)도는 상기 SiON막(14)상에 보호막(15)을 형성한 후 상기 금속층(13)의 소정 부분이 노출되도록 상기 보호막(15) 및 SiON막(14)을 순차적으로 패터닝하여 본딩 패드(16)을 형성한 상태의 단면도로서, 상기 반사 방지막으로 사용되는 SiON막(14)은 산화막 및/또는 질화막으로 형성된 상기 보호막(15)과 동일한 성질의 물질로 이루어지기 때문에 상기 SiON막(14) 패터닝시 상기 본딩 패드(16)상에 잔유물이 존재하지 않게 된다. 그러므로 상기 본딩 패드(16)에 본딩 와이어가 양호하게 접속되도록하여 본딩 공정의 효율이 향상되도록 한다. 또한 상기 SiON막(14)은 금속층 패터닝시 금속층 표면의 반사율로 인해 발생되는 난반사를 효과적으로 방지할 수 있는 물질이므로 양호한 형태의 금속배선을 형성할 수 있도록 한다.FIG. 2 (b) shows that after forming the passivation layer 15 on the SiON layer 14, the passivation layer 15 and the SiON layer 14 are sequentially patterned and bonded so that a predetermined portion of the metal layer 13 is exposed. The SiON film 14 used as the anti-reflection film is made of a material having the same properties as the protective film 15 formed of an oxide film and / or a nitride film. In the patterning, no residue remains on the bonding pad 16. Therefore, the bonding wires are well connected to the bonding pads 16 so that the efficiency of the bonding process is improved. In addition, since the SiON film 14 is a material that can effectively prevent the diffuse reflection caused by the reflectance of the surface of the metal layer when the metal layer patterning, it is possible to form a metal wiring of a good shape.
상술한 바와 같이 본 발명에 의하면 SiON막을 이용하여 반사 방지막을 형성하므로써 본딩 패드를 형성하기 위한 패터닝 공정시 잔유물의 생성이 방지된다. 그러므로 후속 본딩 공정시 본딩 와이어가 본딩 패드에 양호하게 접속되며 본딩 패드와 본딩 와이어간의 접촉 저항이 감소되어 소자의 전기적 특성이 향상될 수 있는 탁월한 효과가 있다.As described above, according to the present invention, by forming the anti-reflection film using the SiON film, the formation of residues is prevented during the patterning process for forming the bonding pads. Therefore, in the subsequent bonding process, the bonding wire is well connected to the bonding pad, and the contact resistance between the bonding pad and the bonding wire is reduced, thereby improving the electrical characteristics of the device.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960057356A KR100227624B1 (en) | 1996-11-26 | 1996-11-26 | Bonding pad manufacturing method of semiconductor device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019960057356A KR100227624B1 (en) | 1996-11-26 | 1996-11-26 | Bonding pad manufacturing method of semiconductor device |
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| Publication Number | Publication Date |
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| KR19980038452A KR19980038452A (en) | 1998-08-05 |
| KR100227624B1 true KR100227624B1 (en) | 1999-11-01 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR1019960057356A KR100227624B1 (en) | 1996-11-26 | 1996-11-26 | Bonding pad manufacturing method of semiconductor device |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62194629A (en) * | 1986-02-20 | 1987-08-27 | Mitsubishi Electric Corp | Semiconductor device and its manufacture |
| KR940016636A (en) * | 1992-12-16 | 1994-07-23 | 김주용 | Method of manufacturing bonding pads for multilayer metal wiring |
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1996
- 1996-11-26 KR KR1019960057356A patent/KR100227624B1/en not_active IP Right Cessation
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62194629A (en) * | 1986-02-20 | 1987-08-27 | Mitsubishi Electric Corp | Semiconductor device and its manufacture |
| KR940016636A (en) * | 1992-12-16 | 1994-07-23 | 김주용 | Method of manufacturing bonding pads for multilayer metal wiring |
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| Publication number | Publication date |
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| KR19980038452A (en) | 1998-08-05 |
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