KR100218153B1 - Block interleave/deinterleave method of data communication - Google Patents

Abstract

SUMMARY OF THE INVENTION An object of the present invention is to provide a block interleave / deinterleave method having a low transmission time delay and easy to implement in hardware, and outputs the maximum horizontal address value in order from the minimum value to the maximum value of the horizontal address value of the memory map. After output, it is outputted in order from the minimum address value to the maximum address value in turn, and the initial value of the vertical address is the same as the horizontal address value, and the values in the following order are output from the maximum value of the vertical address to the minimum value in order. After outputting the minimum vertical address value, the output is repeated again from the maximum address value to the minimum address value. However, whenever the horizontal address value starts from the minimum value after the maximum value, the vertical address value is the vertical address of the previous step. Block interleave step of repeatedly outputting the value, and horizontal address value of the memory map In order from the minimum value to the maximum value, and after outputting the maximum horizontal address value, it is outputted in order from the minimum address value to the maximum address value in turn, and the initial value of the vertical address is from the horizontal address value plus 1 The maximum vertical address value is output in turn, and then the maximum vertical address value is output again, and then repeatedly outputted from the minimum address value to the maximum address value. However, whenever the horizontal address value starts from the minimum value again after the maximum value, the initial vertical address value is 1; And a block deinterleave step of repeatedly outputting the vertical address value plus each other.

Description

Block Interleave / Deinterleave Method of Data Communication

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission system, and more particularly, to a block interleaving / deinterleaving method using a memory to prevent burst errors occurring during a transmission process of a digital data signal.

In general, in a data transmission system, an interleaving method of sequentially selecting and transmitting data to be transmitted according to a predetermined law in order to prevent a collection error occurring during digital data transmission, and the data received by the interleaving method A deinterleave method is used in which the data in the original state is recovered and arranged again in the reverse order according to the law.

The data transmitted / received by the interleave / deinterleave method writes data to be transmitted from the transmitting side to the memory of another area in a normal order, and writes the data to the memory of the other area according to a specific order. In this method, data is read from the memory of the other area and transmitted.

The receiving side writes the received data into the memory in the same order as the reading order for the above transfer, reads from the memory according to the normal reading method and order, and writes to the memory of the other area of the receiving side. There is a block interleaving / deinterleaving method of restoring a data array.

Alternatively, a shift register having a specific delay time is used to transmit a delay time for each data bit transmitted during transmission, and the receiving side shifts the received data. By passing through a shift register with a delay time characteristic opposite to that of the register, a convolution interleaving / deinterleaving is made by compensating the time delay difference generated for each bit of data generated during transmission and restoring the arrangement of the original data. There is a way.

In one embodiment, the memory structure according to the present invention is assumed to have N addresses horizontally and M vertically, and a position where data is stored is represented by a combination of horizontal addresses and vertical addresses (N, M).

Hereinafter, a block interleave / deinterleave method according to the related art will be described with reference to the accompanying drawings.

1 is a conceptual diagram of a general interleaving / deinterleaving, in which FIG. 1 (a) is a diagram of data to be transmitted, and FIG. 1 (b) is a diagram of transmission data structure according to a general interleaving method, and FIG. FIG. 2 is a block diagram of a block interleave / deinterleave method according to the prior art, and FIG. 2 (a) shows how to write to memory in a normal order. FIG. 2B is a diagram showing a write order of digital data that has been written. FIG. 2 (b) shows a procedure of reading or writing data into a memory when interleaving or deinterleaving.

Referring to FIG. 1, a general interleave and deinterleave method and the concept thereof will be described. When the normal data to be transmitted is transmitted as shown in FIG. 1 (a), an error burst occurs. Therefore, if some data is lost or destroyed, data C is lost or destroyed on the receiving side, and thus data becomes irrecoverable, and data B is recovered to normal data using various error correction methods already published. This is possible.

Therefore, conceptually, as shown in FIG. 1 (b), when data having a series of orders is transmitted in a specific order by applying a specific method, an error burst occurs in the data transmission process. Even if it is possible to receive and recover as shown in FIG. 1 (c), the transmission data is evenly distributed without being lost or destroyed at a certain portion, and thus, various error correction methods already disclosed, that is, as an embodiment, The parity check or the Hamming code error correction method can be applied to recover lost data.

Referring to the block interleaving method according to the related art as an embodiment, referring also to the second (a), the digital data from the data to be transmitted is written to a memory of a specific area. (1,1) (1,2) (1, M), (2,1) (2,2) (2, M), , (N, 1) (N, 2) Write in the order by the Memory Address of (N, M), and as shown in FIG. 2 (b), (1,1) (2,1) (N, 1), (1,2) (2,2) (N, 2), , (1, M) (2, M) It reads in the order of (N, M) memory addresses and stores them in the memory of another specific area.

The reading and storing in the memory of another specific area as described above is called an interleave method. The reading and the data stored in the memory of the other area are transmitted through the transmission line.

Referring to the block deinterleave method of the data with reference to the drawings, the data transmitted by the interleaving method in the same order as the second (b) from the transmitting side by the interleaving method is a memory having the same size as the transmitting memory. The original data is restored by writing in the same order as in FIG. 2 (b), reading in the same order as in FIG. 2 (a), and recording and storing in another memory.

As described above, according to the block interleave / deinterleave method of data transmission according to the related art, an area of memory is additionally required for interleaving and transmitting data, and the received data is stored and then decrypted through deinterleaving. Additional memory is needed to do this.

In addition, there was a problem that the data can not be read and read at the same time. When the write and the read are performed simultaneously, the data of 5, 9, 13, 10, 14, and 15 cannot be read in the second (b) in the case of restoration of the data by the deinterleave. Operation and lead operation should be done separately. Therefore, there is a problem that the delay time of digital data transmission and reception is large.

In the convolutional interleave / deinterleave method using shift registers not shown in the drawings, it is practical to implement a shift register necessary for convolutional interleave / deinterleave when a large amount of data is used, that is, when the size of the memory is large. There was a problem that was not.

According to the present invention, by applying the convolutional interleave / deinterleave algorithm to the block interleave / deinterleave method, when transmitting digital data, the memory area due to the transmission and recovery is not required twice, and thus the transmission and reception delay time is low. It is an object of the present invention to provide a block interleaving / deinterleaving method that can be easily implemented in hardware.

1 is a conceptual diagram of a general interleaved / deinterleaved,

1 (a) is a block diagram of data to be transmitted,

1 (b) is a transmission data structure diagram according to a general interleaving method,

1 (c) is a structural diagram of recovered data by a general deinterleaving method,

2 is a diagram illustrating a block interleave / deinterleave method according to the prior art.

2 (a) is a diagram showing a writing order of digital data written to the memory in a normal order method;

Second (b) is a diagram showing a procedure of reading or writing data into a memory when interleaving or deinterleaving;

3 illustrates a block interleave / deinterleave method according to an embodiment of the present invention.

Third (a) is a diagram showing the order of data normally recorded in the memory;

FIG. 3 (b) is a diagram showing a procedure of reading data from a memory when interleaving.

FIG. 3 (c) is a diagram showing a procedure of reading data from the memory when deinterleaving.

In order to achieve the above object, the block interleave / deinterleave method of the present invention provides a method of reading and writing digital data recorded in a memory map having horizontal and vertical addresses, wherein the horizontal address value of the memory map is determined. After outputting the minimum value to the maximum value in order from the minimum value to the maximum value, and then outputting it again and again from the minimum address value to the maximum address value, and the initial value of the vertical address is the same as the horizontal address value, The value is output from the maximum value of the vertical address to the minimum value in turn, and after outputting the minimum vertical address value, the value is repeatedly output from the maximum address value to the minimum address value, but the horizontal address value starts again from the minimum value after the maximum value. Each time the vertical address value is half the vertical address value of the previous step. A block interleaving step of outputting and outputting a horizontal address value of the memory map in order from a minimum value to a maximum value, and outputting a maximum horizontal address value and then repeatedly outputting the minimum address value to a maximum address value in turn, The initial value of the vertical address is output from the horizontal address value plus 1 to the maximum value in turn, and after the maximum vertical address value is output, the output is repeatedly output from the minimum address value to the maximum address value, but the horizontal address is repeated. Each time the value starts from the minimum value again after the maximum value, the block deinterleave step of repeatedly outputting the initial address value plus one by one is added.

Hereinafter, a block interleave / deinterleave method of data communication according to the present invention will be described with reference to the accompanying drawings.

3 is a block interleave / deinterleave method according to an embodiment of the present invention. FIG. 3 (a) is a diagram showing the order of data normally written to a memory. FIG. 3 (b) is an interleaved block. Fig. 3 (c) is a diagram showing the order of reading data from the memory when deinterleaving.

Referring to the drawings, the operation of the present invention will be described. As shown in FIG. 3 (a), an address for writing data to a memory map in the block interleave method is shown in FIG. Address) order is (1,1) (1,2) for (1, M), (2,1) (2,2) (2, M) , (N, 1) (N, 2) (N, M), and the read order of the block interleave method is the same as the above (horizontal element: longitudinal element), as shown in FIG. 3 (b). (1,1) (2, N) (3, N-1) from the address of the written Memory Map (M, N- (M-2) 2), (1, N- (M-2) 2) (2,1) (3, N) (M, N- (M-3) 3), (1,3) (2,2) (3,1) (M, N- (M-4)), , (1, N) (2, N-1) (3, N-2) (M, (N-M + 1)) in order and transmitted.

To further explain it, the horizontal address values of the memory map including the transmitted digital data are output in order from the minimum value to the maximum value, and after outputting up to the maximum horizontal address value of the memory map, the minimum address is again displayed. The initial value of the vertical address value of the memory map, which is outputted repeatedly from the value to the maximum address value in sequence, is the same as the horizontal address value, and the next address value is the vertical address. In order from the maximum value to the minimum value in order to output the minimum vertical address value of the memory map, and then again from the maximum address value to the minimum address value is repeated.

At this time, whenever the horizontal address value starts again from the minimum value after the maximum value, the vertical address value is repeatedly outputted from the memory map including the digital data to be transmitted by repeatedly outputting the vertical address value of the previous step. A block interleaving step of transmitting the same) is performed.

In the block deinterleave method, the memory map is transmitted through the above steps, thereby writing the received data to the memory map as shown in FIG. 3 (b). The order of reading the data received in the same way and written to the memory map by the block deinterleave method is as described above (horizontal direction address M: vertical address N). (1,2) (2,3) (3, N) as shown in the figure (M, 1), (1, N-1) (2, N) (3,1) (M, 2), (1, N) (2,1) (3,2) (M, N-1) , (1,1) (2,2) (3,3) Same as (M, N).

When the read order of the data by the block deinterleave method is further solved and described again, the horizontal address values of the memory map including the received data are output in order from the minimum value to the maximum value, and the maximum horizontal value. After the address value is output, it is output again in order from the minimum address value to the maximum address value in turn, and the initial value of the vertical address is output from the initial value of the horizontal address plus 1 to the maximum value, in turn, and the maximum value. After outputting the vertical address value, the output is repeated again from the minimum address value to the maximum address value.

In this case, each time the horizontal address value starts again from the minimum value after the maximum value, a block d for repeatedly reading out the vertical address value plus 1 of the initial vertical address value and receiving the data stored in the memory map is read. An interleave step is performed.

In this case, if the data read from the last row of the memory map is replaced to be at the position of the first row of the memory map during reconstruction, and the data of the subsequent lines are placed downward by one line, the third row of FIG. You will create data with the same configuration as the batch.

In order to implement the block interleave / deinterleave method according to the present invention, a memory of a transmitting side and a receiving side uses a dual port ram capable of simultaneously writing and reading data.

Therefore, in the case of interleaving or deinterleaving, data may be partially written to and read from the memory map, thereby reducing delay time due to transmission. At this time, the same address is not applied to each address to be written and read at the same time.

In order to output the horizontal address and the vertical address of the memory map including the dual port RAM in the order according to the present invention, a horizontal address counter and a vertical address counter are required.

Conventional block interleave / deinterleave can also read and write the memory at the same time using dual port memory, but because of the read and write method, the original signal cannot be found. Therefore, even when the dual port memory is used, read and write cannot be performed at the same time. In the present invention, the method of reading from the memory can be found differently from the conventional method, and the original signal sequence can be found even if the read and write are performed simultaneously.

Therefore, in the interleave step of the data as in the prior art, since both the transmitting and receiving sides do not need a memory for reading and writing data, the amount of memory can be reduced in half, and the data transmission delay time can be reduced.

As described above, when the block interleave / deinterleave method according to the present invention is used for data transmission, by using the dual port RAM, data write and read operations can be simultaneously performed, and transmission delay can be reduced. The amount of memory required is reduced by 1/2

Claims (1)

A method of transmitting digital data recorded in a memory map having horizontal and vertical addresses, the method comprising: outputting the minimum and maximum values of the horizontal address values of the memory map in order, and outputting the maximum horizontal address values, and then again Repeatedly addressing from the address value up to the maximum address value, the initial value of the vertical address is the same as the horizontal address value, the next value is output from the maximum value of the vertical address to the minimum value in order to output the minimum vertical address value After the output, the maximum address value is repeatedly outputted from the minimum address value, but whenever the horizontal address value starts from the minimum value again after the maximum value, the vertical address value is repeatedly outputted from the previous vertical address value. A block interleaving step of reading and Outputs the value from the maximum value to the maximum value in order, and then outputs the maximum horizontal address value and repeats it again from the minimum address value to the maximum address value, and the initial value of the vertical address is obtained by adding 1 to the horizontal address value. After outputting the maximum vertical address value in order from the maximum to the maximum value, and then again outputting from the minimum address value to the maximum address value again, but whenever the horizontal address value starts from the minimum value again after the maximum value, the initial vertical address A block interleave / deinterleave method for data communication, characterized by a block deinterleave step of repeatedly outputting and reading from a vertical address value plus one of the values.