KR100212853B1 - A horizontal deflection circuit using fet in monitor - Google Patents

Abstract

The present invention relates to a horizontal deflection circuit of a monitor using a field effect transistor, the apparatus of the present invention comprises a horizontal oscillation IC (10); Horizontal drive unit 20; And a horizontal output section 30 comprising a horizontal transistor section 31, a retrace condenser section 32, a damper diode DD, and a horizontal deflection coil HD.Y. The drive unit 20 is composed of push-pull amplifiers Q 1,2. The horizontal output transistor section 31 is composed of a plurality of field effect transistors FETs 1,2 and 3 connected in series, so that each gate terminal is connected to the horizontal driving section 20 through a diode D 1,2. The amplified horizontal drive signal (H.drive) is inputted from each other, and the gate and source terminals are connected through the resistors R 1,2 and 3; The retrace condenser 32 is composed of a plurality of retrace capacitors RE, C 1,2 and 3 connected in series, so that between {N retrace condenser and N + 1 retrace condenser} is the {N It is connected between the source terminal of the field effect transistor and the drain terminal of the N + 1th field effect transistor, so that a plurality of field effect transistors (FETs 1,2,3) with low breakdown voltage are connected in series, and a plurality of retrace capacitors ( The RE, C 1,2,3) is connected in series to protect the horizontal output stage from high withstand voltage and high current.

Description

A horizon-deflection curcuit using FET in a monitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a horizontal deflection circuit of a monitor. In particular, a horizontal deflection circuit of a monitor using a field effect transistor configured to connect a plurality of field effect transistors having a low withstand voltage in series to a horizontal output stage in order to protect the horizontal output stage from high withstand voltage and high current. It is about a circuit.

In general, a multi-mode monitor reproduces a video image in accordance with a signal received from a video card in a computer, which requires adjustment of each part of the circuit according to a timing parameter of the received signal.

Here, look at the classification of the monitor according to the video mode through Table 1.

Classification by video mode Video mode Horizontal frequency (KHz) Vertical frequency (Hz) Resolution (H * V) CGA 15.75 60 640 * 200 EGA 21.8 60 640 * 350 VGA 31.5 60/70 720 * 350 640 * 480 SVGA 35 to 37 INTERLACE 1024 * 768 High resolution mode 64 to 75 60 to 70 1024 * 768 1280 * 1024

As shown in Table 1, horizontal and vertical frequencies differ according to the modes supported by the video card, and in particular, a video card supporting various modes, for example, a video card supporting VGA and SVGA and high resolution only modes, is mounted on the monitor. If so, the range of the horizontal frequency of each mode is about 30 to 75 KHz.

That is, when the mode is changed in the multi-mode monitor, there are parts that need to be changed in the internal circuits of the monitor. For example, image size and position change, horizontal and vertical synchronization and deflection optimization, and various deflection correction circuits. Readjustment should be done.

First, referring to the principle of deflection of a general monitor, electrons emitted from the cathode of the monitor are accelerated through the grid and move the light spot of the fluorescent surface by changing the path by electromagnetic action of the magnetic field of the deflection coil.

At this time, the deflection distance is proportional to the strength of the magnetic field, and the magnetic field is proportional to the current of the deflection coil, so that the monitor scans at a constant speed from left to right and returns very quickly from right to left. For this purpose, a horizontal deflection coil for moving the light spot in the horizontal direction (left and right) and a vertical deflection coil for moving the light spot in the vertical direction (up and down) are used.

When a current flows through the deflection coil, an electromagnetic force acts to bend the path of the straight electron beam, which depends on the direction and magnitude of the current flowing through the deflection coil.

That is, when a sawtooth wave current as shown in FIG. 1 flows through the horizontal deflection coil, a force that deflects the electron beam to the leftmost direction at point a acts, and at point b, the electron beam moves straight because no current flows. From point b to point c, the current which causes the electron beam to bend to the right gradually increases, and at point c, the electron beam is deflected to the right, and then the current decreases sharply and repeats from point a.

Next, the horizontal deflection circuit operation of the general monitor will be briefly described with reference to the horizontal deflection circuit of FIG.

As shown in Fig. 2, the horizontal deflection circuit includes: a horizontal oscillation IC 1 which outputs a horizontal drive signal H. drive of a square wave by a horizontal synchronization signal input from a microcomputer (not shown); A horizontal drive unit (2) for amplifying the horizontal drive signal (H.drive) to a predetermined level; And a horizontal output unit 3 for generating a sawtooth wave current by the amplified horizontal drive signal H.drive and supplying it to the horizontal deflection coil HD.Y.

That is, the horizontal synchronization signal H.sync output from the microcomputer (not shown) is appropriately signal-modulated from the horizontal oscillation IC 1 to the horizontal drive signal H.drive and supplied to the horizontal driver 2.

The horizontal driving signal H.drive is first supplied to the base terminal of the horizontal driving transistor TR1 through the push-pull amplifiers Q1 and Q2.

Accordingly, the horizontal driving signal H.drive is output through the collector terminal of the horizontal driving transistor TR1, and amplified again through the horizontal driving transformer HDT, and then, to the base terminal of the horizontal output transistor TR2. Is approved.

When the horizontal output transistor TR2 is turned on by receiving sufficient base current, the B ⁺ power supply current of the flyback transformer FBT flows to the horizontal output transistor TR2 through the horizontal deflection coil HD.Y.

Thus, while the transistor TR2 is turned on, it corresponds to the second half of the effective scanning period of the horizontal sawtooth wave, and then the horizontal output transistor TR2 is rapidly turned off in response to the horizontal drive signal H. drive. The current accumulated in Y) charges the retrace capacitor RE.C.

When the retrace capacitor RE.C is fully charged, it is discharged back to the horizontal deflection coil HD.Y, and accordingly, current is accumulated in the deflection coil HD.Y.

In this way, the period between the charging and discharging of the retrace capacitor RE.C determines the retrace period.

When energy is accumulated in the deflection coil HD.Y and the deflection coil voltage reaches a degree of applying a forward bias to the damper diode DD, the damper diode DD is conducted and a current flowing through the deflection coil HD.Y. Will fall to zero.

At this time, the current flowing through the damper diode D.D corresponds to the first half of the effective scanning period of the horizontal sawtooth wave.

As described above, when the current becomes zero, the horizontal output transistor TR2 is turned on again by the horizontal drive signal H.drive, and the sawtooth current flows through the horizontal deflection coil HD.Y while repeating the above process. A horizontal deflection is made and a horizontal scan is made.

However, in the conventional horizontal deflection circuit, since the B + voltage increases as the horizontal frequency increases, a large current flows in the horizontal output transistor TR2, and thus a horizontal output transistor TR2 capable of withstanding high breakdown voltage and large current is required. In general, bipolar transistors (BJTs) are used, which are expensive and expensive. The bipolar transistors exhibit strong characteristics at high breakdown voltages and large currents, but are not only expensive and expensive to manufacture, but also require a large current to drive the bipolar transistors. ) Is amplified by current through an expensive horizontal drive transformer (HDT), and then supplied to the base of the bipolar transistor, which is a major cause of the increase in manufacturing cost.

Accordingly, the present invention has been made to solve the above problems, by connecting a plurality of field effect transistors (FET) having a low withstand voltage in series to the horizontal output stage, to protect the horizontal output stage from high withstand voltage and high current It is an object of the present invention to provide a horizontal deflection circuit of a monitor using a field effect transistor.

A horizontal deflection circuit of a monitor using a field effect transistor according to the present invention for achieving the above object includes a horizontal oscillation IC for outputting a horizontal drive signal of a square wave by a horizontal synchronizing signal input from a microcomputer; A horizontal driver for amplifying the horizontal drive signal to a predetermined level; And the gate terminal of the horizontal output transistor unit receives the amplified horizontal driving signal, the drain terminal of the horizontal output transistor unit receives the B + voltage, and the source terminal is grounded. A horizontal deflection circuit of a monitor having a horizontal output section connected in parallel to the other end and connected in parallel to a source end of the horizontal output transistor section and generating a sawtooth current and supplying it to a horizontal deflection coil. Consists of a push-pull amplifier; The horizontal output transistor is composed of a plurality of field effect transistors connected in series, each gate terminal receives a horizontal drive signal amplified from the horizontal driver through a diode, each gate terminal and the source terminal is connected through a resistor Is; The retrace condenser is composed of a plurality of retrace capacitors connected in series, so that {between the Nth retrace capacitor and the N + 1 retrace capacitor} is the drain of the source terminal of the Nth field effect transistor and the N + 1 field effect transistor. It is characterized in that the connection between}.

That is, the device of the present invention is to connect a plurality of field effect transistors with low breakdown voltage in series and to connect a plurality of retrace capacitors in series to protect the horizontal output stage from high breakdown voltage and high current.

1 is a graph for sawtooth current,

2 is a circuit diagram showing a horizontal deflection circuit of a general monitor;

3 is a circuit diagram illustrating a horizontal deflection circuit of a monitor using a field effect transistor according to the present invention.

* Explanation of symbols for main parts of the drawings

10: horizontal oscillation IC 20: horizontal drive unit

30: horizontal output section 31: horizontal output transistor section

32: retrace condenser Q1, Q2: push-pull amplifier

FET 1,2,3: first, second, third field effect transistor

RE.C 1,2,3: 1st 1,2,3 retrace capacitor

D.D: Damper Diode HD.Y: Horizontal Deflection Coil

Hereinafter, an embodiment of an apparatus according to the present invention will be described with reference to the accompanying drawings.

3 is a circuit diagram illustrating a horizontal deflection circuit of a monitor using a field effect transistor according to the present invention.

As shown in FIG. 3, the apparatus of the present invention is composed of a horizontal oscillation IC 10, a horizontal driver 20, and a horizontal output unit 30. As shown in FIG.

Here, the horizontal driver 20 is composed of push-pull amplifiers Q 1, 2, and the horizontal output part 30 includes a horizontal output transistor part 31, a retrace condenser part 32, and a damper diode DD. ) And a horizontal deflection coil (HD.Y).

In this case, the horizontal output transistor unit 31 has a gate terminal receiving a horizontal drive signal H.drive amplified from the horizontal driver 20 and grounded through a third resistor R3. A third field effect transistor (FET3) grounded; The gate terminal receives the horizontal drive signal H.drive amplified from the horizontal driver 20 through the second diode D2, the source terminal is connected to the drain terminal of the third transistor, and the gate terminal and the source are connected. A second field effect transistor (FET2) whose stage is connected via a second resistor; And a gate terminal receives a horizontal drive signal H.drive amplified from the horizontal driver 20 through a first diode D1, a source terminal is connected to a drain terminal of the second transistor, and The source terminal is connected via a first resistor, and the drain terminal is configured of a first field effect transistor FET1 receiving a B + voltage.

In the retrace condenser 32, the first, second, and third retrace capacitors RE.C3 are connected in series, and the {second retrace capacitor RE.C2 and the third retrace capacitor RE.C3 ) Is connected between the {source terminal of the second field effect transistor FET2 and the drain terminal of the third field effect transistor FET3}, and the {first retrace capacitor RE.C1 and the second retrace capacitor. Between (RE.C2) is connected to {between the source terminal of the first field effect transistor FET1 and the drain terminal of the second field effect transistor FET2}.

Subsequently, the operation and effects of the apparatus according to the present invention configured as described above will be divided into a case where the horizontal drive signal H. drive is at a high level and a case at a low level.

1. When the horizontal drive signal (H.drive) is a high level

The horizontal drive signal H.drive output from the horizontal oscillation IC 10 is first buffered through the push-pull amplifiers Q1 and Q2 of the horizontal drive unit 20, and then supplied to the horizontal output unit 30. The first, second, and third field effect transistors FETs 1, 2 and 3 are supplied to the base ends of the first and second diodes D 1 and 2.

At this time, when the horizontal driving signal H.drive is at a high level, the third field effect transistor FET3 is turned on, and the voltage charged in the third retrace capacitor RE.C3 is the third field effect transistor. It is applied to the drain terminal of (FET3) and discharged through the source terminal. At this time, the drain-source voltage of the third field effect transistor FET3 ( ) Is almost 0V.

Therefore, since the source terminal of the second field effect transistor FET2 is at a potential close to the ground (0V), the second field effect transistor FET2 is turned on and is charged in the second retrace capacitor RE.C2. A voltage is applied to the drain terminal of the second field effect transistor FET2 and discharged through the source terminal. At this time, the drain-source voltage of the second field effect transistor FET2 ( ) Is almost 0V.

Similarly, since the source terminal of the first field effect transistor FET1 is at a potential close to ground (0V), the first field effect transistor FET1 is turned on to charge the first retrace capacitor RE.C1. A voltage is applied to the drain terminal of the first field effect transistor FET1 and discharged through the source terminal. At this time, the drain-source voltage of the first field effect transistor FET1 ( ) Is almost 0V.

As a result, the first, second, and third field effect transistors FETs 1,2 and 3 are turned on, and the first, second, and third retrace capacitors REC1, 2 and 3 are all discharged. The voltage applied to the drain terminal of the one field effect transistor FET1, that is, the a point voltage, is almost close to 0V.

2. When the horizontal drive signal (H.drive) is at a low level

On the other hand, when the horizontal drive signal H.drive is transitioned to the low level, the voltage remaining at the gate terminal of the third field effect transistor FET3 is discharged through the third resistor R3, so that the third Gate-to-source voltage of field effect transistor FET3 ) Disappears, the third field effect transistor FET3 is turned off.

In addition, the anode voltage of the first and second diodes D1 and 2 is lowered, and the first and second diodes D1 and 2 are turned off.

As the second diode D2 is turned off, the voltage remaining at the gate terminal of the second field effect transistor FET2 is discharged through the second resistor R2, so that the second field effect transistor FET2 is discharged. Gate-to-source voltage of ) Disappears, so the second field effect transistor FET2 is turned off.

Similarly, as the first diode D1 is turned off, the voltage remaining at the gate terminal of the first field effect transistor FET1 is discharged through the first resistor R1, so that the first field effect transistor ( Gate-to-source voltage of FET1 ( ) Disappears, so the first field effect transistor FET1 is turned off.

As a result, as the first, second, and third field effect transistors FETs 1,2 and 3 are turned off, voltages are charged in the first, second, and third retrace capacitors RE, C 1,2 and 3. The voltage applied to the drain terminal of the first field effect transistor FET1, that is, the point a voltage increases to about 1000V.

At this time, if the capacitances of the first, second and third retrace capacitors REC1, 2 and 3 are the same, a voltage of about 670 V is applied to the drain terminal of the second field effect transistor FET2, that is, at the point b. A voltage of about 330 V is applied to the drain terminal of the first field effect transistor FET1, that is, the c point.

Here, the first and second diodes D1 and 2 supply current to the gate terminals of the first and second field effect transistors FETs 1 and 2 when the horizontal driving signal H. drive is at a high level. When the horizontal driving signal H.drive is at a low level, the third driving element FET3 and the push-pull amplifiers Q1 and 2 may be protected by acting as a reverse current prevention diode.

That is, when the horizontal drive signal H.drive is at a low level, as described above, a voltage of about 670 V is applied to the b point, so that the gate terminal of the first electrode transistor FET1, that is, the first diode ( A voltage of about 670 V is applied directly to the cathode of D1). In addition, since a voltage of about 330 V is applied to the point c, a voltage of about 330 V is applied directly to the gate terminal of the second electric field effect transistor FET2, that is, the cathode terminal of the second diode D2. Accordingly, the first and second diodes D 1 and 2 serve as a reverse current prevention diode to protect the third field effect transistor FET 3 and the push pull amplifiers Q 1 and 2.

As described above, the apparatus of the present invention connects a plurality of field effect transistors (FETs 1,2,3) with low breakdown voltage in series, and connects a plurality of retrace capacitors (RE.C 1,2,3) in series. By connecting, the effect is to protect the horizontal output stage from high withstand voltage and high current.

Claims (4)

A horizontal oscillation IC 10 that outputs a horizontal drive signal H. drive of a square wave by a horizontal synchronization signal input from a microcomputer (not shown); A horizontal driver 20 amplifying the horizontal drive signal H. drive to a predetermined level; And a gate terminal of the horizontal output transistor unit 31 receives the amplified horizontal drive signal H.drive, a drain terminal receives a B + voltage, and a source terminal is grounded, and the retrace condenser unit 32 and the damper diode are grounded. One end of the DD is connected in parallel to the drain end of the horizontal output transistor unit 31 and the other end is connected in parallel to the source terminal of the horizontal output transistor unit 31 to generate a sawtooth current. In the horizontal deflection circuit of the monitor provided with a horizontal output unit 30 for supplying the horizontal deflection coil (HD.Y), The horizontal drive unit 20, Consisting of push-pull amplifiers Q 1,2; The horizontal output transistor section 31, It is composed of a plurality of field effect transistors (FET 1, 2, 3) connected in series, each gate end of the horizontal drive signal (H. A) amplified from the horizontal driver 20 through the diode (D 1,2). drive), each gate terminal and source terminal are connected via resistors R 1,2 and 3; The retrace condenser 32 It is composed of a plurality of retrace capacitors (RE.C 1,2,3) connected in series, so that {between the N-th retrace capacitor and the N + 1 retrace capacitor} is {the source terminal of the N-field effect transistor and the N + A horizontal deflection circuit of a monitor using a field effect transistor, characterized in that it is connected between the drain terminals of the field effect transistor. The method of claim 1 wherein the horizontal drive unit 20, It consists of push-pull amplifiers (Q 1,2), The horizontal output unit 30, A horizontal deflection circuit of a monitor using a field effect transistor, comprising a horizontal output transistor section 31, a retrace condenser section, a damper diode (D.D), and a horizontal deflection coil (HD.Y). The horizontal output transistor unit 31 according to claim 1, A third field effect transistor FET3 whose gate end is inputted with the horizontal drive signal H.drive amplified from the horizontal driver 20 and grounded through the third resistor R3 and whose source end is grounded. Wow ; The gate terminal receives the horizontal drive signal H.drive amplified from the horizontal driver 20 through the second diode D2, the source terminal is connected to the drain terminal of the third transistor, and the gate terminal and the source are connected. A second field effect transistor (FET2) whose stage is connected via a second resistor; And The gate terminal receives the horizontal drive signal H.drive amplified from the horizontal driver 20 through the first diode D1, the source terminal is connected to the drain terminal of the second transistor, and the gate terminal and the source are connected. A horizontal deflection circuit of a monitor using a field effect transistor, characterized in that the stage is connected via a first resistor and the drain stage is comprised of a first field effect transistor (FET1) receiving a B + voltage. The retrace condenser 32 of claim 3, Since the first, second, and third retrace capacitors RE.C3 are connected in series, the {between the second retrace capacitor RE.C2 and the third retrace capacitor RE.C3} is the {second field effect. Is connected between the source terminal of the transistor FET2 and the drain terminal of the third field effect transistor FET3, and the {between the first retrace capacitor RE.C1 and the second retrace capacitor RE.C2} is the { A horizontal deflection circuit for a monitor using a field effect transistor, characterized in that it is connected between the source terminal of the first field effect transistor (FET1) and the drain terminal of the second field effect transistor (FET2).