KR100212849B1 - Data display method in a monitor - Google Patents

Abstract

The present invention relates to a method of displaying data on a PDP monitor, and more particularly, to a PDP monitor for processing a horizontal / vertical synchronizing signal and a computer signal input from a computer according to a resolution mode using a memory function, (S1) of differentiating the horizontal and vertical sync signals so that the phases of the various horizontal and vertical sync signals have the same phase; (S2) of displaying, when a computer signal of a resolution mode that can not be processed by the PDP monitor is input, displaying that the computer signal can not be displayed and then terminating the present invention; Setting an interval in which image information is included among the computer signals according to the discriminated resolution mode, and setting vertical and horizontal positions in the set image information interval according to a progressive scanning method; Generating a memory control signal according to the set vertical and horizontal positions, and accessing data in the memory according to the control signal (S4); Arranging the accessed data in six subfields (S5); And a step S6 of forming and displaying a screen with six subfields in which the data are arranged. According to the present invention, the horizontal and vertical synchronizing signals and the computer signals, which are input in various ways according to the resolution mode, Display on the PDP.

Description

A method of displaying data on a PDP monitor using a plasma display panel (PDP)

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data display method of a plasma display panel (PDP) monitor, and more particularly, To a method of displaying data.

In general, a PDP is a flat panel display device that uses a penning gas mixture for the discharge phenomenon. That is, gases based on neon (Ne) or helium (He) gas of relatively high atmospheric pressure (100 Torr or more) Refers to a display device using a light emission phenomenon due to discharge between narrow electrodes, and has a performance suitable for a computer terminal and an educational system, and has been partially put to practical use as a computer display.

The penning gas is mainly Ne + Xe, Ne + He + Xe, and the reason why such a mixed gas is used is that the firing voltage can be lowered when the gas mixture is one gas component. The discharge start voltage depends on the kind of gas, penning gas pressure and the structure and form of the panel.

The PDP has the following advantages over other display devices.

Since PDP does not discharge if it is below a certain voltage (firing voltage), there is no restriction on the number of plasma display lines due to such nonlinearity, so a large-scale fabrication is possible and a multiplexing technique for reducing the number of driving circuits can be used.

The large matrix display has a memory function, which is required to eliminate high brightness and blinking, while the CRT has a lifetime of 20,000 hours, while the PDP has a lifetime of 50,000 hours.

In addition, PDPs are suitable for mass production because they have no easily broken parts except for glass, and because of its simple structure, it is possible to manufacture large panels and have a resolution of more than 100 lines / inch due to strong nonlinearity.

Since the discharge material is gas, the refractive index is 1, which means that the light does not disappear due to internal reflection and that external light is not reflected or scattered by the display material.

Unlike other flat panels, the PDP is sealed with glass at a temperature of 400 ° C or higher. This means that the plasma display can operate even in the presence of a high-humidity condition or a reactive gas. In most cases, It only changes by the circuit.

The computer system will be briefly described as follows.

The peripherals of the personal computer system include a printer that prints various kinds of information contained in a main personal computer (PC) on paper, a display monitor that displays various information on the screen, a floppy disk drive (FDD) , An auxiliary storage device such as a hard disk drive (HDD), and a modem used to connect various kinds of information to another computer with a telephone line. Among them, the display monitor refers to a device that displays the information of the main device in the easiest and quickest manner as an image. In the present invention, the display monitor is implemented as a PDP.

Subsequently, the display monitor displays MDA (Monoch.

Display Adapter, and Color Graphics Array (CGA), Enhanced Graphics Array (EGA), Video Graphics Array (VGA), Super Video Graphics Array (S-VGA), Extended Graphics Array (XGA), and Computer Aided Design do. In the present invention, among the display resolution modes, a display monitor using the most widely used VGA mode is implemented as a PDP.

Here, the VGA mode is classified into 640 * 400 mode and 640 * 480 mode. Table 1 below compares the characteristics of the 640 * 400 mode and the 640 * 480 mode.

Feature comparison table for 640 * 400 mode and 640 * 480 mode Item Nautical mode Horizontal Frequency (KHz) Vertical Frequency (Hz) Resolution (H * V) color Input Video signal Usage 640 * 400 mode 31.5 70 640 * 400 256 Analog Glass in text mode 640 * 480 mode 31.5 60 640 * 480 256 Analog Glass in graphics mode

Subsequently, the scanning method can be divided into interlaced scanning and noninterlaced scanning.

The interlaced scanning is a method of scanning an image and outputting it as an electric signal or displaying the image on the screen by skipping one or more scanning lines from the top to the bottom of the screen. When one frame is composed of a field composed of odd- And then the odd field is scanned first and then the even field is scanned.

On the other hand, the progressive scan refers to a method of scanning an image and outputting it as an electric signal or displaying the image on the screen without skipping the scan line sequentially from the top to the bottom of the screen, and the progressive scan is denser than the interlace scan.

Generally, since a computer scans according to a progressive scanning method, the present invention for a computer signal will be described based on progressive scanning.

A method of displaying various horizontal / vertical synchronous signals and computer signals input from a computer in a 640 * 400 mode and a 640 * 480 mode on a display panel in a progressive scanning manner when the display portion of the computer monitor is implemented as a PDP It became necessary.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and it is an object of the present invention to provide a data display method for sequentially displaying a horizontal / vertical synchronizing signal and a computer signal, It has its purpose.

According to an aspect of the present invention, there is provided a data display method of a PDP monitor for processing a horizontal / vertical synchronizing signal and a computer signal input from a computer according to a display resolution mode using a memory function,

A sync signal discrimination and shaping step of discriminating the display resolution mode by the various horizontal and vertical sync signals and shaping the various horizontal and vertical sync signals so as to have the same phase;

When the display resolution mode is discriminated in the synchronizing signal distinguishing and shaping step, when the computer signal of the display resolution mode that can not be processed by the PDP monitor is inputted, it is displayed on the screen that the computer signal can not be displayed A display disabled display step of ending the data display process of the present invention; A section for setting image information among the computer signals in accordance with the display resolution mode distinguished in the synchronizing signal distinguishing and shaping step and for setting the vertical and horizontal positions in the set image information section according to the progressive scanning method, Setting step;

A data accessing step of generating a memory control signal in accordance with the set vertical and horizontal positions and then reading data from or writing data to the memory in accordance with the control signal;

A data arrangement step of arranging data read from the memory into six subfields in a predetermined order; And

And a display step of forming and displaying a single screen with six subfields in which the data are arranged.

According to the present invention, various horizontal and vertical sync signals and computer signals input from a computer according to the display resolution mode can be input and displayed on a PDP in a progressive scanning manner.

1 is a block diagram schematically showing a configuration of a PDP (Plasma Display Panel) monitor to which the present invention is applied;

2 (a) is a waveform diagram showing the sync signal discrimination and input / output signals of the shaping unit shown in FIG. 1 in the 640 * 400 mode,

(B) is a waveform diagram showing the sync signal discrimination and input / output signals of the shaping section shown in FIG. 1 in the 640 * 480 mode,

3 is a flow chart showing a step of displaying data in a PDP monitor according to the present invention,

4A is a diagram showing a format for a subfield,

(B) shows a state in which data having a predetermined memory map is arranged in six subfields (constituting one screen)

5 (a) to 5 (g) show waveforms of signals generated in each step of the present invention in the 640 * 400 mode,

6 (a) to 6 (g) are waveform diagrams of signals generated in each step of the present invention in the 640 * 480 mode.

Description of the Related Art [0002]

10: Sync signal distinguishing and shaping unit 12: Horizontal and vertical position selecting unit

14: amplification unit 16: A / D conversion unit

18: storage unit 20: buffer unit

22: address voltage generator 24: scan and sustain voltage generator

26: sustain voltage generator 28: control timing generator

30: Microcomputer

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

First, the monitors applied to the present invention can be classified according to the display resolution mode as shown in the following Table 2.

Display classification table according to display resolution mode Monitor item type Display naval mode MDA CGA EGA VGA S-VGA XGA CAD Terms Monoch.DisplayAdapter ColorGraphics Array EnhancedGraphics Array VideoGraphics Array Super VideoGraphics Array ExtendedGraphics Array ComputerAidedDesign Horizontal Frequency (KHz) 18.432 15.75 15.75 / 21.85 31.5 35.2 / 35.52 48/64 64/76 Vertical Frequency (Hz) 50 50/60 50/60 50/60/70 50 to 70 (Non-interlaced) 80 to 90 (Interlaced) 60-90 60-90 Resolution (H * V) 720 * 350 320 * 200 640 * 200640 * 350 640 * 480720 * 400 800 * 6001024 * 768 1280 * 9601280 * 1024 1640 * 1280 color - 16 16/24 256 256 256 256 Input Video signal TTL TTL TTL Analog Analog Analog TTL / Analog

In the present invention, among the display resolution modes, a display monitor using the most widely used VGA mode is implemented as a PDP. The overall configuration of the PDP monitor will be described below.

FIG. 1 is a block diagram of a general PDP monitor to which the present invention is applied. A typical PDP monitor includes a synchronizing signal discriminating and shaping unit 10, a horizontal and vertical position (H / V position) selecting unit 12, An A / D converter 16, a storage 18, a buffer 20, an address voltage generator 22, a scan / sustain voltage generator 24, A sustain voltage generating unit 26, a control timing generating unit 28, a panel unit 30 and a microcomputer 32.

First, a monitor using a PDP receives a R.G. B video signal, a horizontal synchronizing signal (H.Sync), and a vertical synchronizing signal

ronizing signal: V.Sync).

The configuration and operation of the synchronizing signal discriminating and shaping unit 10 will be described with reference to a synchronizing signal discrimination and shaping apparatus of a PDP monitor filed by the same inventor.

2 (a) is a waveform diagram of an input / output signal of the synchronizing signal discriminating and shaping unit 10 in a 640 * 400 mode, wherein (a) shows a horizontal synchronizing signal (B) is a waveform diagram of a vertical synchronizing signal (V.sync1) which is input to the synchronizing signal discriminating and shaping section 10 in a computer, (c) is a waveform diagram of a synchronizing signal And a shaping vertical synchronization signal (V.sync1) output from the shaping and shaping unit (10). 2 (b) is an input / output signal waveform diagram of the synchronizing signal discriminating and shaping unit 10 in the 640 * 480 mode, wherein (a) shows a horizontal synchronizing signal (B) is a waveform diagram of a vertical synchronizing signal (V.sync2) which is input to the synchronizing signal discrimination and shaping unit 10 in a computer, (c) is a waveform diagram of a synchronizing signal discrimination And a shaped vertical synchronous signal (V.sync2) output from the shaping unit 10. As shown in FIG.

As shown in FIG. 2, in the case of the 640 * 400 mode, the vertical synchronization signal is the rising edge operation pulse. In the case of the 640 * 480 mode, the vertical synchronization signal is the falling edge operation pulse. It is necessary to match two vertical synchronizing signals with one edge operation pulse (rising edge operation pulse or falling edge operation pulse). In this case, the vertical synchronous signal phase of the 640 * 400 mode may be set to the vertical synchronous signal phase of the 640 * 480 mode, or the vertical synchronous signal phase of the 640 * 480 mode may be set to the vertical synchronous signal phase of the 640 * 400 mode. In the present invention, electrons are selected.

As a result, the synchronizing signal discriminating and shaping unit 10 discriminates horizontal and vertical synchronizing signals inputted in various ways according to the display resolution mode, and then performs phase correction so as to have the same phase.

The construction and operation of the horizontal and vertical position selection unit 12 will be described with reference to a monitor employing an inventive plasma display panel, which was filed as a patent application No. 1996, 19091.

The horizontal and vertical position selector 12 receives the signal synchronized with the horizontal synchronous signal and outputs the horizontal synchronous signal in a horizontal position (for example, 640 * 480 mode in which 640 clocks are counted and 640 clock periods are set to a high level Outputs 480 lines per frame in the case of the 640 * 480 mode, and outputs the position selection signal to the vertical position (H.Sync) and the vertical synchronization signal (V.Sync) Selection) and outputs a position selection signal.

Herein, the horizontal position (H. Position) refers to an appropriate section having image information in one line when it is necessary to set only a section having image information in one line, and the vertical position (V.Position) When there is a case where only a line having video information needs to be set in a frame, it is an appropriate section of the frame in which video information exists.

The amplification unit 14 receives the video signal (RB signal) from the computer and performs amplification and level shifting.

The A / D converter 16 receives the amplified analog video signal RG B signal from the amplifying unit 14 and outputs the digital video signal RG B signal in accordance with a position selection signal from the horizontal and vertical position selector 12. [ To data (R '. G'. B 'data).

In the storage unit 18, a horizontal / vertical synchronizing signal (H / V Sync) from a computer (not shown) and a first control signal (horizontal and vertical position signals from the A / And the digital computer data is written or read according to the generated signal.

The buffer unit 20 receives image data from the storage unit 18 according to a second control signal (a signal generated by using horizontal and vertical position signals) from the A / D conversion unit 16, Rearranges the order of the data so that the computer data is output in parallel.

The address voltage generator 22 receives scan data and parallel data from the buffer unit 20 to generate an address voltage to generate wall charges.

The scan and sustain voltage generating unit 24 scans and generates a sustain voltage, the sustain voltage generating unit 26 generates a sustain voltage,

The control timing generator 28 generates a time for addressing data to the buffer 20 and the address voltage generator 22 and generates a holding time for the holding voltage generator 26, And causes the scan and sustain voltage generating unit 24 to generate scan and sustain times.

In the panel unit 30, the sustain voltage from the sustain voltage generating unit 24 and the sustain voltage generating unit 26 are applied to all of the cells, An address voltage is applied to display necessary information, and the microcomputer 32 controls the series of processes.

3 is a flowchart illustrating a data display method in the PDP monitor constructed as described above.

Referring to FIGS. 2 and 3, the data display method in the PDP monitor according to the present invention is divided into the following six steps.

(1) Synchronization signal discrimination and shaping step (S1)

In the first step S1, the display resolution mode is discriminated by various horizontal / vertical synchronizing signals inputted from the computer, and the phase correction is performed so that the various horizontal and vertical synchronizing signals have the same phase.

In other words, it is determined whether the display resolution mode of the computer signal input in the first-step S1-1 is the VGA mode.

If it is determined in step S1-2 that the display resolution mode of the input computer signal is the VGA mode, the display resolution mode of the input computer signal Is in the 640 * 480 mode of the VGA mode.

If the display resolution mode of the input computer signal is not the 640 * 480 mode of the VGA mode as a result of the determination in step 1-2 (S1-2) in step 1-3, 640 * 400 mode), the phase of the vertical synchronization signal included in the input computer signal is corrected to coincide with the vertical synchronization signal phase of the 640 * 480 mode.

(2) display disable step (S2)

If it is determined in step S1-1 that the display resolution mode of the input computer signal is not the VGA mode in the second step S2, After displaying, the data display process of the present invention is terminated.

(3) Actual image information section setting step S3

If the display resolution mode of the input computer signal is the 640 * 480 mode of the VGA mode as a result of the determination in the step 1-2 (S1-2) in the third step S3, S140), the phase of the vertical synchronous signal included in the input computer signal is corrected so as to coincide with the vertical synchronous signal phase of the 640 * 480 mode, and then, in accordance with the 640 * 480 mode or the 640 * 480 mode, The actual image information section to be displayed is set according to the scanning method.

Here, one frame of the video signal in the 640 * 400 mode is made up of 449 H, and the vertical sync signal (V.Sync) corresponding to 2 H and the video information corresponding to 42 H are included A vertical blanking period, a period in which image information corresponding to 400 H is included, and a period in which image information corresponding to 5 H is not included. In addition, the 1 frame of the video signal in the 640 * 480 mode has a total of 525 H, and the vertical synchronization signal (V. Sync) corresponding to 2 H and the vertical blanking (Vertical Blanking) section, a section including image information corresponding to 480 H, and a section including no image information (RG B) corresponding to 1 H.

If the display resolution mode of the input computer signal is the 640 * 480 mode of the VGA mode as a result of the determination in step 1-2 (S1-2) in step 3-1 (S3-1) 524 H to 480 H, and when the resolution mode is 640 * 400 mode, set the range from 45 H to 444 H to 400 H as the image information section.

In step 3-2 (S3-2), a vertical position is set in the set video information interval according to the 640 * 400 mode and the 640 * 480 mode, which are distinguished, and the progressive scanning method. The vertical position (V Position) refers to an appropriate section of the frame when there is a need to set only a line having video information in one frame. The vertical position setting in the case of 640 * 480 mode is to set 480 lines per frame, and the vertical position setting in case of 640 * 400 mode is to set 400 lines every frame.

In step S3-3, a horizontal position is set according to the 640 * 400 mode and the 640 * 480 mode, which are distinguished from each other, and the progressive scanning method, in the set video information section. Here, the horizontal position (H Position) refers to an appropriate section of the line when image information is to be set in a line. In the case of 640 * 480 mode, the vertical position setting is to count 640 clocks per line and output 640 clocks at a high level. In the case of 640 * 480 mode, vertical position setting counts 640 clocks per line And outputs the 640 clock periods as a high level.

(4) Data access step (S4)

In the fourth step S4, a frame division signal (also referred to as a memory control signal) for controlling the storage unit 18 (see FIG. 1) is generated according to the set vertical and horizontal positions, And then reads data from the storage unit 18 (see FIG. 1) or writes the data to the storage unit 18 (see FIG. 1).

In step 4-1 (S4-1), a frame separation signal is generated using the horizontal synchronization signal and the vertical synchronization signal input to the storage unit 18 shown in FIG.

If the frame discrimination signal is high in step 4-2 (S4-2), the data stored in the RAM (not shown) is read and the data inputted to the RAM (not shown) is stored. If the frame discrimination signal is low Stores data input to an A RAM (not shown) and reads data stored in a B RAM (not shown). Here, the RAM and the B RAM are memories existing inside the storage unit 18 shown in FIG. 1 and each have three RAMs and three RAMs, that is, a total of six RAMs. This is because a memory must be provided for each of the R ', G' and B 'signals. At this time, the memory map for the order of storing data in the RAM or B RAM is shown in Table 3 below.

A memory map of RAM or B RAM MSB .... A ₅ B ₅ C ₅ D ₅ E ₅ F ₅ MSB-1 .... A ₄ B ₄ C ₄ D ₄ E ₄ F ₄ MSB-2 .... A ₃ B ₃ C ₃ D ₃ E ₃ F ₃ MSB-3 .... A ₂ B ₂ C ₂ D ₂ E ₂ F ₂ MSB-4 .... A ₁ B ₁ C ₁ D ₁ E ₁ F ₁ LSB .... A ₀ B ₀ C ₀ D ₀ E ₀ F ₀ MSB .... G ₅ H ₅ I ₅ J ₅ K ₅ L ₅ :

MSB-1, MSB-2, MSB-3, MSB-4, and LSB denote 6-bit data.

(5) Data arrangement step (S5)

In the fifth step S5, the data read from the storage unit 18 (see FIG. 1) are arranged in six sub-fields to display the data.

Here, the sub-field is formed by dividing one screen into several fields when displaying a computer signal, and the several fields are called sub-fields. If data is processed by 6 bits in the present invention, one screen should be composed of six subfields, and if it is processed into 8 bits, one screen must be composed of eight subfields.

If the screen is composed of six subfields, the order of the data (from the storage unit 18) input to the six subfields may be MSB data, MSB-2 data, MSB-4 data, LSB data, MSB-3 data, and MSB-1 data. The arrangement order of this data can be variable.

FIG. 4A shows a format for a sub-field. One sub-field consists of a WRITE section, a SCAN section, and a SUSTAIN section. The data stored in the memory map shown in Table 3 is rearranged to six subfields.

Referring to FIG. 4 (B), six bits of data (A _n B _n C _n D _n E _n ... F _n : where n is 0 to 5) for forming one screen are divided into six subfields in a predetermined order The process of rearranging according to the following is as follows.

A ₅ B ₅ C ₅ D ₅ E ₅ F ₅ , which is the most significant bit (MSB) out of the 6-bit data (A _n B _n C _n D _n E _n ... k _n ) (SCAN) of the first sub-field, and A ₃ B ₃ C ₃ D ₃ E ₃ F ₃ which is the MSB-2 bit are arranged in the scan period of the second sub-field SCAN), and arranges the MSB-4th bit A ₁ B ₁ C ₁ D ₁ E ₁ F ₁ in the scan period (SCAN) of the third sub-field (the third least significant bit (LSB) ) A ₀ B ₀ C ₀ D ₀ E ₀ F ₀ is arranged in the scan interval (SCAN) of the fourth sub-field and the MSB-3 bit A ₂ B ₂ C ₂ D ₂ E ₂ F ₂ are arranged in the scan interval (SCAN) of the fifth sub-field, and the MSB - 1 bit A ₄ B ₄ C ₄ D ₄ E ₄ F ₄ is arranged in the sixth sub-field (SCAN) of the 6th sub-field.

(6) Display step (S6)

In the sixth step S6, six sub-fields rearranged in the order determined in the fifth step S5 are displayed to complete a single screen.

The data display process of the present invention will be briefly described as follows, in which the display resolution of the input computer signal is divided into a 640 * 400 mode and a 640 * 400 mode.

5 is a waveform diagram of a signal generated in each step of the present invention in a 640x400 mode, in which (a) is a waveform of a phase-corrected vertical synchronization signal (V.sync1), (b) (C) is a waveform of a vertical position signal (V.position) set according to a progressive scanning method, (d) is a waveform of a horizontal position signal (H. position) set according to a progressive scanning method, (E) is a waveform of a frame division signal for controlling the data access of the storage unit 18 shown in Fig. 1, (b) is a diagram for explaining the access of data accessed according to the frame division signal to six sub- And FIG. 6B is a view showing the subfield in more detail.

As shown in FIG. 5, in the 600 * 400 mode, the phase of the vertical synchronizing signal input from the computer coincides with the phase of the 600 * 400 mode (A) And sets the vertical position of the video information section 400 H to display data of the set video information section 400 H according to the progressive scan method after setting the section 400 H of the set video information section 400 H, Is set to be displayed in accordance with the progressive scan method.

Then, the data of the video information section in which the vertical and horizontal positions are set is written in the storage unit 18 (see FIG. 1) or a data access control signal (E) for reading the stored data.

According to the data access control signal (e), the data of the storage unit is arranged in six sub-fields according to a predetermined order, and then the six sub-fields are configured as one screen and displayed .

5A is a waveform diagram of a signal generated in each step of the present invention in the 640 * 480 mode. FIG. 5A is a waveform of the phase-corrected vertical synchronization signal V.sync2, (C) is a waveform of a video signal input from a computer, (c) is a waveform of a vertical position signal V.position set according to a progressive scan method, (d) is a horizontal position signal (E) is a waveform of the frame division signal for controlling the data access of the storage unit 18 shown in Fig. 1, (f) is a waveform of Fields, and FIG. 7B is a view showing the subfields in more detail.

5, in the 600 * 480 mode, a section 480 H in which image information is present among the image signals (b) input from the computer is set, and then the data of the set image information section 400 H is sequentially The vertical position (c) is set to display according to the scanning method, and the horizontal position (d) is set so that the data of the set video information section 480 H is displayed according to the progressive scan method.

Then, the data of the video information section in which the vertical and horizontal positions are set is written in the storage unit 18 (see FIG. 1) or a data access control signal (E) for reading the stored data.

According to the data access control signal (e), the data of the storage unit is arranged in six sub-fields according to a predetermined order, and then the six sub-fields are configured as one screen and displayed .

The embodiments described above are merely illustrative in all respects and should not be construed as limiting, but all modifications that fall within the true spirit and scope of the present invention belong to the scope of the present invention.

As described above, according to the present invention, it is possible to flexibly display the horizontal / vertical synchronizing signals and the computer signals inputted from the computer according to the display resolution mode, to receive the computer signals according to the progressive scan method, There is an effect that display can be performed.

Claims (2)

A PDP monitor for processing a synchronous signal and a computer signal input from a computer using a memory function according to a 640 * 400 mode and a 640 * 480 mode in a VGA mode, Determining whether a resolution mode of the computer signal is a VGA mode using the synchronization signal; Determining whether the mode is a 640 * 400 mode or a 640 * 480 mode when the resolution of the computer signal is the VGA mode; If the resolution of the computer signal is 640x400 mode, correcting the phase of the vertical synchronizing signal of the synchronizing signal to match the vertical synchronizing signal phase of the 640x480 mode; Setting an interval in which image information is included in the computer signal according to a resolution mode of the computer signal, setting vertical and horizontal positions in the set image information interval, and accessing data according to the set vertical and horizontal positions And displaying the data on the PDP monitor. The method according to claim 1, Further comprising the step of displaying on the screen that the computer signal can not be displayed when the resolution mode of the computer signal is not the VGA mode as a result of determining that the resolution mode of the computer signal is the VGA mode, / RTI > If the display resolution mode of the input computer signal is the VGA mode as a result of the determination in the VGA mode determination step (S1-1), it is determined that the display resolution mode of the input computer signal is the 640 * 480 mode of the VGA mode * 480 mode determination step (S1-2); And If it is determined that the display resolution mode of the input computer signal is not the 640 * 480 mode of the VGA mode, that is, in the 640 * 400 mode as a result of the 640 * 480 mode determination step S1-2, And a synchronous phase correcting step (S1-3) of correcting the phase of the included vertical synchronous signal to match the vertical synchronous signal phase of the 640 * 480 mode.