KR100201401B1 - 샘플/홀드 회로 - Google Patents
샘플/홀드 회로 Download PDFInfo
- Publication number
- KR100201401B1 KR100201401B1 KR1019960057292A KR19960057292A KR100201401B1 KR 100201401 B1 KR100201401 B1 KR 100201401B1 KR 1019960057292 A KR1019960057292 A KR 1019960057292A KR 19960057292 A KR19960057292 A KR 19960057292A KR 100201401 B1 KR100201401 B1 KR 100201401B1
- Authority
- KR
- South Korea
- Prior art keywords
- clock
- sample
- data
- data storage
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000013500 data storage Methods 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 3
- 238000005070 sampling Methods 0.000 abstract description 16
- 239000003990 capacitor Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
Description
Claims (2)
- 클럭(CLK)()에 따라 입력 데이타(Vin)를 교대로 셈플링하는 제1,제2 전송 게이트와, 이 제1,제2 전송 게이트의 전송 데이타를 각기 저장하는 제1,제2 데이타 저장부와, 이 제1,제2 데이타 저장부의 출력 데이타를 각기 홀딩하는 제1,제2 전압 폴로워와, 모드에 따라 상기 제1,제2 전압 폴로워의 출력 신호중 하나를 선택, 출력하는 스위치로 구성한 것을 특징으로 하는 샘플/홀드 회로.
- 제1항에 있어서, 클럭(CLK)()은 제공 클럭에 대하여 50% 이하 듀티비를 갖는 것을 특징으로 하는 샘플/홀드 회로.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960057292A KR100201401B1 (ko) | 1996-11-26 | 1996-11-26 | 샘플/홀드 회로 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960057292A KR100201401B1 (ko) | 1996-11-26 | 1996-11-26 | 샘플/홀드 회로 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR19980038395A KR19980038395A (ko) | 1998-08-05 |
KR100201401B1 true KR100201401B1 (ko) | 1999-06-15 |
Family
ID=19483521
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960057292A Expired - Fee Related KR100201401B1 (ko) | 1996-11-26 | 1996-11-26 | 샘플/홀드 회로 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100201401B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100747200B1 (ko) | 2005-08-25 | 2007-08-07 | 엘지전자 주식회사 | 파이프라인 아날로그-디지털 컨버터 |
-
1996
- 1996-11-26 KR KR1019960057292A patent/KR100201401B1/ko not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100747200B1 (ko) | 2005-08-25 | 2007-08-07 | 엘지전자 주식회사 | 파이프라인 아날로그-디지털 컨버터 |
Also Published As
Publication number | Publication date |
---|---|
KR19980038395A (ko) | 1998-08-05 |
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Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19961126 |
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Patent event code: PA02012R01D Patent event date: 19961126 Comment text: Request for Examination of Application |
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Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 19981221 |
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Comment text: Registration of Establishment Patent event date: 19990313 Patent event code: PR07011E01D |
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