KR100192949B1 - Non-interlace scanning conversion apparatus for projector - Google Patents

Abstract

The present invention relates to a projection type image display system that reproduces an image using an AMA element, converts an interlaced scanning image signal into a progressive scanning signal format and reproduces an image, thereby reducing attenuation of flicker generated in the projected image, A progressive scan conversion apparatus of a projection-type image display system capable of preventing deterioration of a projection-type image display system.

According to the present invention, there is provided a video signal processing apparatus comprising: a data conversion means (10) for synchronously sampling and digitally converting an interlaced video signal to a sampling rate based on a first clock signal (CLK1) First memory means (12) for storing the digitally converted image data synchronously with the recording speed, reading the image data synchronously stored at the reading speed by the second clock signal (CLK2) into the double speed conversion state, A second memory means (14) for delaying and storing the video signal in the double speed conversion state from the first memory means (12) by one field, a first clock signal (CLK1) synchronized with the synchronizing signal separated from the video signal, A second clock generating means (16) for generating a second clock signal (CLK2) having a clock rate faster than the first clock signal (CLK1) so that the video signal can be converted in a double speed manner 18), the first memo Converted image data of one field read from the memory means 12 and the other side field of the other side field delayed by one field from the second memory means 14 are switched and selected by the select control signal SEL A data inversion means (22) for converting the image data converted into a progressive scanning form into an analog signal in the form of an analog signal through the multiplexer means (20) And a control means (26) for generating a select control signal (SEL) to the multiplexer means (20) based on a result of counting a period during which the synchronizing signal (H SYNC) is generated.

Description

Progressive scan conversion device of projection type image display system

[0001] The present invention relates to a progressive scan conversion apparatus of a projection-type image display system, and more particularly to a progressive scan conversion apparatus of a projection-type image display system in which, in a projection-type image display system for reproducing an image by driving a pixel through an AMA element, To a progressive scan conversion apparatus of a projection-type image display system capable of converting high-quality images into non-interlace format images.

As is well known, the image display system is roughly divided into a direct view type image display system employing a CRT device and a projection image display system employing an LCD device. Among them, the direct view type image display system has RGB fluorescent points Since the color image is formed in the form of a brown tube by condensing the electron beam at the RGB fluorescence point, there is a disadvantage in that a high image quality is ensured, however, the size of the screen is limited and the manufacturing process is complicated .

Further, in the case of an LCD device employed in a projection type image display system, a voltage corresponding to an image signal is applied as a liquid crystal driving voltage from a uniform arrangement of liquid crystals so that an image to be reproduced is displayed by adjusting the arrangement direction of liquid crystals by a polarizing plate It is possible to achieve a relatively lightweight and thinner structure, but the light loss due to the polarizing plate for adjusting the light transmittance to the entire incident light is disadvantageously increased.

In consideration of this point, in recent years, a projection type image display system using an AMA (Actuated Mirror Array) has been proposed and adopted to reproduce a color image. In the projection type image display system using the AMA, Dimensional structure in which M × 1 light fluxes are linearly scanned by using a scanning mirror or a two-dimensional structure in which an M × N pixel array is formed by projecting M × N light fluxes.

In this projection type image display system, a video signal reproduced from an image recording medium such as a television broadcasting signal having a broadcasting system such as an NTSC system from the outside or a video tape or a video disk is taken in to drive an AMA member in which a plurality of AMAs are arranged So that the image is formed on the screen.

The video signal from the outside is composed of two fields per one screen (one frame), and is composed of a video signal on which a scanning line constituting each field is interlaced on a CRT (Cathode Ray Tube) screen. A scanning line of the 263 scanning period H is scanned on the CRT screen as an odd field, and a part of the scanning line of the 263 scanning period is deleted by the 1/2 scanning period (1 / 2H) by the vertical blanking period A scanning line of 283 to 525 scanning periods (H) excluding a vertical blanking period including a vertical synchronizing signal of about 21 scanning periods (H) is deleted from the even field (Even Field) is interlaced on the CRT screen in which the odd field is scanned, but a part of the scanning line in the 283 scanning period is deleted and received by the 1/2 scanning period (1 / 2H) by the vertical blanking period, It is deleted by scanning.

Therefore, in the projection type image display system, the image signal composed of two fields of the interlaced scanning method is introduced and converted to double speed so as to normally reproduce the image on the projection screen. Fig. 1 shows a conventional projection type image display system FIG. 2 is a block diagram showing a double speed conversion apparatus for performing double speed conversion of a video signal. FIG.

According to the configuration of the conventional double speed conversion apparatus shown in FIG. 1, a first clock signal CLK1 generated in synchronism with a synchronizing signal separated from a video signal is supplied as a sampling clock, and is interlaced with a sampling rate synchronized with the sampling clock An analog-to-digital converter (ADC) 2 for sampling and digitally converting a video signal having a scanning scheme, and an analog-to-digital converter (ADC) 2 for receiving the first clock signal CLK1 as a recording clock and synchronizing the digitally- A second clock signal CLK2 having a clock rate that is faster than the clock rate of the first clock signal CLK1 is applied as a read clock and the stored video data is read at a reading speed And a DAC 6 (Digital) for synchronously converting the video data read out from the line memory 4 to the second clock signal CLK2 in the form of an analog signal, -Analog Converter).

In the double speed conversion apparatus in the projection type image display system made up of these components, the clock pulse width of the first clock signal CLK1, which is supplied to the ADC 2 as a sampling clock and supplied as a recording clock to the line memory 4, For example, a half clock pulse width (i.e., twice the number of clock pulses) so that the second clock signal CLK2 generated to have a faster clock speed is supplied to the line memory 4 as a read clock N + 2, n + 4, ..., n + 524 and the odd field consisting of n + 1, n + 2, n + 2,..., when the odd field has an even field composed of n + 3, n + 5, , N + 1, n + 1, n + 3, n + 3,.

Accordingly, when the double-speed converted video signal is implemented as one screen composed of one frame, as shown in FIG. 3, n / n + 1, n / n + 1, n + 2 / n + 3, n + 2 / n + 3, ....

However, when a double-speed-converted image signal is superimposed on an image signal of the interlaced scanning method by the double speed conversion apparatus of the projection type image display system, the image field of the odd field and the field of the superior field are superimposed on each other, As the resolution is lowered, the overall image quality is deteriorated.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a projection type image display system which reproduces an image by using an AMA element and which converts an interlaced video signal into a progressive scanning signal format, It is an object of the present invention to provide a progressive scan conversion apparatus of a projection type image display system capable of preventing flicker attenuation and a vertical resolution from being deteriorated in an image.

In order to achieve the above object, according to the progressive scan conversion apparatus of the projection type image display system according to the present invention, data conversion means for synchronously sampling and digitally converting an interlaced video signal to a sampling rate by a first clock signal, And a second clock signal generating circuit for generating a second clock signal based on the first clock signal and the first clock signal, wherein the first clock signal is synchronously stored with the digitally converted image data, A second memory means for delaying and storing a video signal in a double speed conversion state from the first memory means by one field and a second clock means for generating a first clock signal synchronized with the synchronizing signal separated from the video signal, Generating means for generating a second clock signal having a clock rate that is faster than the first clock signal so that the video signal can be converted at a double speed; Second switching means for switching the double-speed converted video data of one field read from the first memory means and double-speed-converted video data of another side field delayed by one field from the second memory means by a select control signal A data inverse conversion means for converting the image data converted into the progressive scan type into an analog signal by the multiplexer means and a period of time during which the horizontal synchronizing signal is generated in the video signal, And control means for generating a select control signal to the multiplexer means on the basis of a result of the comparison.

According to the present invention configured as described above, in the projection type image display system that reproduces the projection image on the screen through the driving of the pixels of the AMA panel composed of a plurality of AMA elements, The data is delayed in units of fields for one field so that the video scanning lines of the other side field of the video data and the video scanning line of the field delayed one field are switched to be changed to the progressive scanning method do.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a double speed conversion apparatus for double speed conversion of an interlaced scanning video signal in a conventional projection type image display system;

FIG. 2 is a timing chart showing a state in which a video signal of the interlaced scanning method is subjected to double-speed conversion according to the double speed conversion function of the double speed conversion apparatus shown in FIG. 1,

FIG. 3 is a diagram illustrating an example in which an image signal is scanned at a double speed on a screen according to the double-speed conversion state of the image signal shown in FIG. 2;

4 is a block diagram showing a progressive scan conversion apparatus of a projection type image display system according to the present invention,

FIG. 5 is a timing chart showing a state in which an interlaced scanning video signal is converted into a progressive scanning method according to a preferred embodiment of the present invention,

FIG. 6 is a diagram illustrating a state in which the format of a video signal converted by the progressive scan method is implemented in two fields according to a preferred embodiment of the present invention.

Description of the Related Art [0002]

10: ADC, 12: line memory,

14: field memory, 16: first PLL circuit section,

18: second PLL circuit section, 20: multiplexer,

22: DAC, 24: counter,

26: Microcomputer.

Hereinafter, the present invention configured as described above will be described in detail with reference to the accompanying drawings.

That is, FIG. 4 is a block diagram showing a progressive scanning conversion apparatus of the projection type image display system according to the present invention. In the apparatus of the present invention, reference numeral 10 denotes an interlaced scanning video signal composed of two fields per frame, And 12 denotes an ADC for sampling and digitally converting the sampled data at a sampling rate synchronized with the first clock signal CLK1 from the first PLL circuit unit 16. The first write enable signal WENA1 from the microcomputer 26 ) To record the digitally-converted image data in units of image scanning lines with a recording speed synchronized with the first clock signal (CLK1) and to store the digitally-converted image data from the microcomputer 26 The read operation is enabled by the first read enable signal R ENA1 and the image data stored at the read speed synchronized with the second clock signal CLK2 from the second PLL circuit portion 18 It represents a line memory which takes a dock in the conversion state.

Reference numeral 14 designates a second write enable signal W ENA2 from the microcomputer 26 to be described later and a write operation is enabled so that the second clock signal CLK2 from the second PLL circuit portion 18, And the second read enable signal RENA2 from the microcomputer 26, which will be described later, as well as storing the video data through the line memory 12 at a recording speed synchronized with the video data, And the read operation is enabled and the image data of the predetermined field stored in the field memory is read at a reading speed synchronized with the second clock signal CLK2.

Reference numeral 16 denotes a PLL that operates by a enable signal ENA from a microcomputer 26 to be described later and performs a PLL operation on a sync signal separated from the video signal by a predetermined division ratio, And 18 denotes a first PLL circuit unit that is enabled by an enable signal ENA from a microcomputer 26 to be described later and outputs a synchronizing signal separated from the video signal to the first clock signal CLK1, And a second PLL circuit portion that PLL-operates with a division ratio having a 1/2 clock pulse period with respect to the clock signal CLK1 to generate the second clock signal CLK2.

Reference numeral 20 denotes a first input terminal A which is supplied with video data read from the line memory 12 in the double speed conversion state and is supplied with a first input terminal B from the field memory 14, The first input terminal A or the second input terminal B is switched and selected so as to be converted into the progressive scan method by the select control signal SEL from the microcomputer 26 to be described later And numeral 22 denotes a DAC for converting the image data converted by the progressive scanning method through the multiplexer 20 into the analog signal in the form of an analog signal synchronously with the second clock signal CLK2.

Reference numeral 24 denotes a counter which counts a predetermined clock signal (that is, a clock signal having 640 clock pulses) and is reset by the horizontal synchronizing signal (H SYNC) of the video signal.

Reference numeral 26 denotes an enable signal generating circuit for generating an enable signal ENA for enabling the first and second PLL circuit units 16 and 18 and for generating a write enable signal ENA of the line memory 12 and the field memory 14, And generates first and second write enable signals W ENA1 and W ENA2 and first and second read enable signals R ENA1 and R ENA2 for enabling operation, And generates a select control signal SEL for converting the video signal, which is double-speed-converted, to the multiplexer 20 in a progressive scanning manner based on the counting signal.

Here, the first write enable signal W ENA1 and the first read enable signal R ENA1 generated by the microcomputer 26 are synchronized with the horizontal scanning period of each image scanning line of the interlaced scanning video signal And the second write enable signal W ENA2 and the second read enable signal R ENA2 are generated with a period synchronized with the vertical scanning period by each field of the video signal.

The microcomputer 26 generates a select control signal SEL for inverting the signal level every 1/2 period by half the scan period of one video scan line of the video signal by the counting signal from the counter 24 , The multiplexer 20 is switched to the second input terminal B side in the preceding half period and is switched in the other side field The multiplexer 20 is switched to the first input terminal A side in a half period of the following period to select one side of the line from the line memory 12, Field (i.e., an even field) is selected.

The operation of the present invention as described above will now be described in detail with reference to the accompanying drawings.

First, when an interlaced video signal such as the NTSC system is reproduced through a projection-type image display system employing an AMA element, the ADC 10 outputs the interlaced video signal from the first PLL circuit unit 16 And the line memory 12 performs a digital conversion by the first write enable signal W ENA1 from the microcomputer 26 so that the write operation is enabled by the first write enable signal W ENA1 from the microcomputer 26. [ And records the digitally converted image data at a recording speed synchronized with the first clock signal CLK1 from the first PLL circuit unit 16 in units of image scanning lines and stores the image data in units of image scanning lines, By the read operation being enabled by one read enable signal R ENA1 and being read at a read speed synchronous to the second clock signal CLK2 from the second PLL circuit portion 18, Similarly, if the original video signal is n, n + 2, n N, n, and so on in the case of a radix field such as n + 1, n + 3, n + n + 2, n + 2, n + 4, n + 4, n + 6, n + 6, , n + 5, n + 5, n + 7, n + 7, ....

Then, in the field memory 14, the write operation is enabled by the second write enable signal W ENA2 from the microcomputer 26, and the image data subjected to double speed conversion by the line memory 12 The data is delayed by one field by recording and storing at a recording speed synchronized with the second clock signal CLK2 from the second PLL circuit unit 18 and the second read enable signal R from the microcomputer 26 The read operation is enabled by the second clock signal ENA2 and the image data stored at the read speed synchronized with the second clock signal CLK2 is read.

At this time, the microcomputer 26 repeatedly resets the counting operation by the horizontal synchronization signal (H SYNC) by the counter 24 and counts the clock signal (CLK) The multiplexer 20 supplies the multiplex control signal SEL to the multiplexer 20 in such a manner that the multiplexer 20 supplies the select control signal SEL to the multiplexer 20 so that the signal level of the signal is inverted by one- (B) is selected so that the field scan line of the odd field delayed by one field is passed by the field memory (14), and the first input terminal (A) is switched and selected in the following 1/2 period, So that the image scanning line corresponding to the even field of the image data subjected to double speed conversion from the line memory 12 is passed.

As a result, the image data that is analog-converted by the DAC 22 is converted into n, n + 1, n + 2, n + 3, n + +7, ..., and the video signal converted by the progressive scanning method is converted into the progressive scanning method in the same manner as the odd field and the even field as shown in FIG. 6, n + 1 / n + 1, n + 2 / n + 2, n + 3 / n + 3, n + 4 / n + 4, n + 5 / n + 5.

The present invention having the above-described embodiments can be modified in various ways within the scope not deviating from the gist of the present invention. For example, the present invention can be applied to a method of converting an interlaced video signal according to the present invention into a progressive scanning method The description has been given only to the projection type image display system employing the AMA element, but it goes without saying that the present invention is also applicable to a direct image display system such as a television.

According to the present invention as described above, since the image signal of the interlaced scanning method can be converted into the progressive scanning method in the projection type image display system to reproduce an image, flicker can be reduced compared with the conventional double speed conversion method, And the resolution can be improved.

Claims (2)

A data converting means 10 for synchronously sampling and digitally converting an interlaced video signal to a sampling rate based on the first clock signal CLK1, Converted image data synchronously with the recording speed of the first clock signal CLK1 and stores the image data synchronously stored at the reading speed by the second clock signal CLK2 in a double speed conversion state A first memory means (12) for reading, A second memory means (14) for delaying and storing the video signal in the double speed conversion state from the first memory means (12) by one field, A first clock generating means (16) for generating a first clock signal (CLK1) synchronized with a synchronizing signal separated from the video signal, A second clock generating means (18) for generating a second clock signal (CLK2) having a clock speed faster than the first clock signal (CLK1) so that the video signal can be converted in a double speed, Converted image data of one field read from the first memory means (12) and double-speed-converted image data of another side field delayed by one field from the second memory means (14) to a select control signal (SEL) A multiplexer means (20) for selecting and switching to a progressive scan form, A data inversion means 22 for converting the image data converted into the progressive scan form through the multiplexer means 20 into an analog signal, And a control means (26) for generating a select control signal (SEL) to the multiplexer means (20) on the basis of a result of counting a period during which the horizontal synchronizing signal (H SYNC) is generated in the video signal Wherein said projection-type image display system further comprises: 2. The image processing apparatus according to claim 1, wherein the control means (26) controls the multiplexer means (20) so that the multiplexer means (20) The image scanning line of the other side field of the video data delayed by one field from the memory means 14 is switched and selected, And generates a select control signal (SEL) for controlling the selection and switching of the image scanning lines.