KR100221478B1 - Video signal double scan converting apparatus for projector - Google Patents

Abstract

The present invention provides a double speed conversion apparatus for a projection type image display system that increases the correlation between scanning lines during double conversion of an image signal that can be interlaced in a projection type image display system to reduce a distortion phenomenon between scanning lines.

Accordingly, the present invention is a projection type image display system in which an image is formed on a screen through an oblique deformation operation of an AMA panel 26 in which a plurality of AMAs are arranged by image driving of the AMA driving unit 24, A data conversion means 2 for converting a video signal into a form of digital data, a memory for receiving the digital-converted image data FH supplied with the recording clock CLK1, Image memory means 4 for reading out the image data FH in the double-speed-converted state as double-speed image data 2FH, a recording clock (synchronizing means) 4 for synchronizing with the synchronizing signal in the video signal extracted by the synchronizing separation circuit 6 CLK1 to supply the image data to the image memory means 4 and a read clock CLK2 having a double speed with respect to the recording clock CLK1, The second clock generating means 10, 12, A data inversion means 14 for converting the double-speed video data 2FH from the video memory means 4 into an analog signal in the form of an analog signal, , The 1H delay means 16 for switching to the 1H delay means 16 and the field selection signal ODD / EVEN SC for switching to the 2x-speed video signal 2FH or the 1H delay means 16 for each video field of the 2x speed video signal 2FH Speed image signal 2FH delayed for one scanning period and outputs the double-speed image signal 2FH to the AMA driving unit 24; and a multiplexing unit 18 for multiplexing the 2x-speed video signal 2FH delayed for one scanning period by the 2x- And control means (22) for determining the video field of the signal (2FH) and outputting the field selection signal (ODD / EVEN SC) to the multiplexing means (18).

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a double-

[0001] The present invention relates to a double speed conversion apparatus in a projection type image display system, and more particularly, to a double speed conversion apparatus in a projection type image display system in which, when a video signal capable of being interlaced in a projection type image display system is projected onto a screen, Speed conversion processing in the projection type image display system.

As is well known, the image display system is roughly divided into a direct view type image display system employing a CRT device and a projection image display system employing an LCD device. Among them, the direct view type image display system has RGB fluorescent points Since the color image is formed in the form of a brown tube by condensing the electron beam at the RGB fluorescence point, there is a disadvantage in that a high image quality is ensured, however, the size of the screen is limited and the manufacturing process is complicated .

Further, in the case of an LCD device employed in a projection type image display system, a voltage corresponding to an image signal is applied as a liquid crystal driving voltage from a uniform arrangement of liquid crystals so that an image to be reproduced is displayed by adjusting the arrangement direction of liquid crystals by a polarizing plate It is possible to achieve a relatively lightweight and thinner structure, but the light loss due to the polarizing plate for adjusting the light transmittance to the entire incident light is disadvantageously increased.

In consideration of this point, in recent years, a projection type image display system using an AMA (Actuated Mirror Array) has been proposed and adopted to reproduce a color image. In the projection type image display system using the AMA, Dimensional structure in which M × 1 light fluxes are linearly scanned by using a scanning mirror or a two-dimensional structure in which an M × N pixel array is formed by projecting M × N light fluxes.

In this projection type image display system, a video signal reproduced from an image recording medium such as a television broadcasting signal having a broadcasting system such as an NTSC system from the outside or a video tape or a video disk is taken in to drive an AMA member in which a plurality of AMAs are arranged So that the image is formed on the screen.

The video signal from the outside is composed of two fields per one frame (one frame), and is composed of a video signal on which a scanning line constituting each field is interlaced on a CRT (Cathode Ray Tube) A scanning line of 1 to 263 scanning periods (H) is scanned on the CRT screen as an odd field, and a part of the scanning lines of the 263 scanning period is scanned in the half scanning period ( 1 / 2H), and is deleted by oblique scanning at the lowermost end of the CRT screen, and the horizontal blanking period including the vertical synchronizing signal of about 21 scanning periods (H) The scanning line is interlaced on the CRT screen in which the odd field is scanned as the even field, but a part of the scanning line between the 283 syringes is deleted by 1/2 the scanning period (1 / 2H) by the vertical blanking period, At the top of the CRT screen, It is.

On the other hand, in the projection type image display system, the interlaced video signal is received and signal processed to drive the pixel data of the odd / even field constituting the video signal in correspondence with the plurality of AMAs as shown in Fig. The image signal formed on the screen is scanned in the 263 scanning period in the odd field in which part of the image signal is erased by the oblique scanning on the CRT screen and the scanning line in the odd field in the odd field The scan lines in the 283 scan period are erased and displayed on the screen.

In this case, in the projection-type image display system, a clearer image is formed by subjecting the video signal capable of interlaced scanning to double-speed conversion processing and performing screen scanning. According to the double speed conversion function for the interla- As shown in the figure, the odd field constituting one screen (one frame) has 1 to 262 scan lines composed of, for example, "A-1, A-2, A-3, A-1, A-2, B-3, ..., Bn "by performing double conversion on the odd field in the case of having 284 to 525 scanning lines made up of B- B-1, B-2, B-1, B-2, A-3, 2, ..., Bn, Bn "are superimposed and scanned on the screen in which the radix field is doubly scanned.

However, according to such a projection type image display system, in a state in which each image field of an interlaced video signal is double-speed-converted and superimposed and scanned on the screen, as shown in Fig. 3, Quot; a-b-c-d "over the odd field of the odd field of " 1, A- The pixel signals of " c "and" a "are formed by overlapping scanning lines corresponding to the odd field of" B-1 "Quot; d "and " b" are overlapped by scanning the scanning lines along the odd field of " -2 " Image distortion such as occurrence of distortion occurs.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a projection type image display apparatus capable of reducing a distortion phenomenon between scanning lines by increasing the correlation between scanning lines during double speed conversion of an image signal that can be interlaced in the projection type image display system, Speed conversion apparatus of the system.

In order to achieve the above object, according to the double speed conversion apparatus of the projection type image display system according to the present invention, an image is formed on the screen through the warp deformation operation of the AMA panel in which a plurality of AMAs are arranged by the image driving of the AMA driving unit 1. A projection type image display system comprising: A data conversion means for converting an interlaced video signal into digital data, a memory for storing the digital-converted video data supplied with the recording clock, A first clock generating means for generating a recording clock synchronized with a synchronizing signal in a video signal extracted by the synchronizing and dividing circuit and supplying the recording clock to the video memory means, A second clock generating means for generating a read clock having a predetermined number of bits, and supplying the read clock to the video memory means, a data inversion means for converting the double speed video data from the video memory means into an analog signal, A 1H delay means for delaying one field period by one field period, Multiplexing means for multiplexing a 2x-speed video signal for each video field of the video signal or a 2x-speed video signal delayed for one scanning period by the 1H delay means, and outputting the multiplexed video signal to the AMA driving portion; And a control means for determining a video field of the double-speed video signal and outputting a field selection signal to the multiplexing means.

According to the present invention configured as described above, in the projection-type image display system employing the AMA, when the image signal capable of interlaced scanning is introduced and subjected to double speed conversion and image scanning is performed on the screen, The signal is delayed by one scanning period (1H) with respect to the double-speed video signal of the odd field so that the image distortion between the scanning lines due to the superimposed video signal of the odd field and the odd field being doubly converted is reduced as much as possible .

1 is a diagram showing a state in which a video signal interlaced on a CRT is interlaced on a screen of a projection type image display system,

2 is a diagram showing a state in which a video signal capable of interlaced scanning in a conventional general projection type image display system is subjected to double speed conversion,

FIG. 3 is a diagram illustrating a distortion phenomenon occurring between scanning lines occurring when a video signal capable of interlaced scanning is subjected to double conversion as shown in FIG. 2;

4 is a view showing a double speed conversion apparatus of a projection type image display system according to the present invention,

5 is a timing chart for explaining an operation of double-speed-converting an interlaced video signal according to a preferred embodiment of the present invention,

6 is a diagram illustrating a state in which an interlaced video signal is subjected to double-speed conversion on a screen screen according to a preferred embodiment of the present invention.

DESCRIPTION OF THE REFERENCE NUMERALS

2: ADC, 4: line memory,

6: Sync separation circuit, 8: First PLL circuit,

10: clock generating unit, 12: second PLL circuit,

14: DAC, 16: 1H delay section,

18: multiplexer, 20: counter,

22: control unit, 24: AMA driving unit,

26: AMA panel.

Hereinafter, the present invention configured as described above will be described in detail with reference to the accompanying drawings.

4 is a diagram showing a double speed conversion apparatus of the projection type image display system according to the present invention. In the apparatus of the present invention, reference numeral 2 denotes a sampling clock which synchronously samples an externally input interlaced video signal to a sampling clock, 4 denotes an analog-to-digital converter (ADC) which receives the recording clock CLK1 generated in synchronism with the synchronizing signal of the input interlaced video signal, and outputs the digitally-converted image data FH ) Is supplied in units of scan lines and a read clock signal CLK2 having a double speed with respect to the recording clock signal CLK1 is supplied and a memory video signal FH is read out per scan line to obtain a double speed video signal 2FH, Lt; / RTI > is read.

Reference numeral 6 denotes a synchronous separation circuit for separating the horizontal and vertical synchronous signals included in the video signal, 8 denotes a PLL operation of the separated horizontal and vertical synchronous signals, and supplies the separated horizontal and vertical synchronous signals to the ADC 2 as a sampling clock And supplies it to the line memory 4 as a recording clock CLK1 together with the first PLL circuit.

Reference numeral 10 denotes a clock generating unit for generating a clock pulse through an oscillation clock signal from an oscillation clock generating means such as a quartz crystal oscillator. Reference numeral 12 denotes a clock generating unit for performing PLL operation on the generated clock pulse at a predetermined division ratio, CLK1, and supplies the generated read clock CLK2 to the line memory 4. In the second PLL circuit,

Reference numeral 14 denotes a digital-analog converter (DAC) for converting the double speed video signal 2FH from the line memory 4 into an analog signal.

Reference numeral 16 denotes a 1H delay unit for delaying the double speed video signal 2FH through the DAC 14 by one scanning period (1H), 18 denotes a first input terminal (A) Speed image signal delayed by one scanning period (1H) by the 1H delay unit 16 through the second input terminal B and receives the 2x-speed image signal from the control unit 22 And multiplexes one side field of the 2x-speed video signal and multiplexes the other side field of the 2x-speed projection signal delayed by one scanning period (1H) by switching selected by the field selection signal Odd / Even SC .

Here, the multiplexer 18 is switched and selected by the field selection signal Odd / Even SC so that the image scanning line of the even field in the 2x-speed video signal 2FH is shifted to the 1H delay unit B-1, B-1, B-1, B-1 and B-2 located between the edges of the respective horizontal synchronizing signals constituting the even field, while being delayed for one scanning period (1H) B-2, B-3, ..., Bn "are multiplexed in the double-speed conversion state such as" B-1, B-1, B- While one scanning period (1H) is output with a delay.

Reference numeral 20 denotes a counter for generating a field discrimination signal by counting horizontal / vertical synchronizing signals from the synchronous separation circuit 6, numeral 22 denotes a field discrimination signal from the counter 20, And generates a field selection signal Odd / Even SC for controlling the field of the video signal to be delayed for one scanning period (1H) by determining the video field of the possible field.

Reference numeral 24 denotes an AMA panel 26 driven by the image signal voltage corresponding to the 2x-speed image signal 2FH through the multiplexer 18 to obliquely deform the AMA panel 26 in which a plurality of AMAs are arranged, And the AMA driving unit.

The operation of the present invention as described above will now be described in detail with reference to the accompanying drawings.

First, in a projection-type image display system that employs AMA to reproduce an image, an interlaced-scan video signal reproduced from an image recording medium such as a video signal capable of interlaced television broadcasting, The ADC 2 samples the video signal composed of two fields of one screen (one frame) capable of interlaced scanning and converts the sampled video signal into digital data. The first PLL circuit 8 is connected to the first PLL circuit 8 through a sync separation circuit 6 And supplies the horizontal and vertical sync signals from the video signal to the second PLL circuit 12 as a sampling clock for the ADC 2 while generating a clock CLK1 for a memory of the video data. PLL operation of the clock pulse from the clock generator 10 at a predetermined division ratio to generate the read clock CLK2 having the double speed with respect to the write clock CLK1.

The line memory 4 receives the recording clock CLK1 from the first PLL circuit 8 and stores the digitally converted image data FH on a scan line basis and the second PLL circuit 12 to receive the read-out clock signal CLK2 and read out the memorized image data FH in units of each scanning line so as to read the double-speed video signal 2FH.

Then, the double-speed video signal converted into the analog signal through the DAC 14 is input to the first input terminal A of the multiplexer 18 and is supplied to the first input terminal A of the multiplexer 18 by the 1H delay unit 16 for one scanning period (1H) And is input to the second input terminal B in a delayed manner.

At this time, the control unit 22 receives the field discrimination signal generated by the counting result of the synchronizing signal of the counter 20, determines the field for the video signal, (Odd / Even SC) for controlling the output of the field selection signal Odd / Even SC to be delayed by a scanning period. The multiplexer 18 outputs the field selection signal Odd / Even SC to the second input terminal B by the field selection signal Odd / And multiplexes and outputs the image scanning line signal for the even field of the 2x-speed video signal 2FH delayed by one scanning period (1H) through the 1H delay unit 16. [

As a result, the image reproduced on the screen as the plurality of AMA formed on the AMA panel 26 is tilted and deformed by the driving of the AMA driving section 24, for example, A-1, A-2, A-2, ... An, An "in addition to the image scanning lines of the odd field of" B-1, B-2, ..., Bn, Bn "of the odd field such as" B-1, B-2, So that the image scanning line of the even field is delayed by one scanning period (1H) in comparison with the image scanning line of the odd field.

As a result, in the original video signal having the odd field and the even field of the image scanning lines such as "A-1, B-1, A-2, B- 1 -> b point, A-2 -> c point, B-2 -> d point "is formed to express a slant line connecting the point" a - b - c - d " A-2 / B-1 -> c / b, A-2 / B-1 -> a / b, A- 2 -> c / d, ... ", it is possible to express a slant almost similar to the original video signal.

According to the present invention as described above, in the projection-type image display system, at the time of double-speed conversion of the interlaced video signal from the outside, the image scanning line of one field is delayed to reproduce the image, As a result, image distortion due to the distortion of the scanning line can be prevented beforehand, and it is possible to reproduce a more stable image.

Claims (1)

In a projection type image display system in which an image is formed on a screen through an oblique deformation operation of an AMA panel (26) in which a plurality of AMAs are arranged by image driving of the AMA driving section (24) A data conversion means (2) for converting an interlaced video signal into digital data, The memory 2 receives the read clock CLK2 and receives the write clock CLK1 and memorizes the digitally converted image data FH and stores the memory image data FH in the double speed converted double speed image data 2FH, An image memory means (4) The PLL operation of the synchronizing signal separated into the horizontal / vertical synchronizing signal by the synchronous separation circuit 6 is supplied to the data conversion means 2 as a sampling clock, and the synchronizing signal is supplied to the image memory means 4 as the recording clock CLK1 A first PLL circuit (8) for supplying the first clock signal, A PLL operation of a clock pulse generated from an oscillation clock signal from an oscillation clock generating means 10 such as a crystal oscillator at a predetermined division ratio generates a read clock CLK2 having a double speed with respect to the recording clock CLK1, Second clock generating means comprising a second PLL circuit (12) for supplying to the video memory means (4) Data inversion means (14) for converting the double speed video data (2FH) from the video memory means (4) into an analog signal, A 1H delay means (16) for delaying the analog-converted double speed video signal (2FH) for one scanning period (1H) Speed video signal 2FH input to the first input terminal A and receives the 2x speed video signal 2FH delayed by the 1H delay means 16 through the second input terminal B (1H) input through the second input terminal B for every even field of the 2x-speed video signal 2FH by the field selection signal (ODD / EVEN SC) And a multiplexer 18 for switching and selecting the delayed 2x-speed video signal 2FH and outputting the multiplexed video signal 2FH to the AMA driver 24, Speed video signal (2FH) in accordance with the field determination signal by the counting operation of the counter (20) and outputting the field selection signal (ODD / EVEN SC) to the multiplexing means (18) 22. A projection display device according to claim 19,