KR100191233B1 - Manufacturing method of semiconductor reference sample - Google Patents

Manufacturing method of semiconductor reference sample Download PDF

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KR100191233B1
KR100191233B1 KR1019960034496A KR19960034496A KR100191233B1 KR 100191233 B1 KR100191233 B1 KR 100191233B1 KR 1019960034496 A KR1019960034496 A KR 1019960034496A KR 19960034496 A KR19960034496 A KR 19960034496A KR 100191233 B1 KR100191233 B1 KR 100191233B1
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sample
ion implantation
semiconductor
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reference sample
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KR19980015246A (en
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정헌택
김정욱
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윤종용
삼성전자주식회사
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N1/00Sampling; Preparing specimens for investigation
    • G01N1/28Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
    • G01N1/44Sample treatment involving radiation, e.g. heat
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N1/00Sampling; Preparing specimens for investigation
    • G01N1/28Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
    • G01N1/2813Producing thin layers of samples on a substrate, e.g. smearing, spinning-on
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02312Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
    • H01L21/02315Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking

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Abstract

상온에서 물성요소의 변화가 없이 일정한 시그널(Signal)을 유지하는 시료로서 열파동(Thermal Wave)을 이용하여 이온주입의 정도를 평가하는 검사장치의 검,교정이 정확하게 이루어지도록 개선시킨 반도체 기준시료의 제조방법에 관한 것이다.It is a sample that maintains a constant signal without changing physical properties at room temperature. It is a semiconductor standard sample that has been improved so that inspection and calibration of inspection equipment that evaluates the degree of ion implantation using thermal wave can be performed accurately. It relates to a manufacturing method.

본 발명은, 열파동(Thermal Wave)을 이용하여 이온주입에 따른 손상정도를 평가하는 검사장치를 검,교정하기 위한 반도체 기준시료의 제조방법에 있어서, 소정의 에너지로 이온이 주입된 반도체 시료를 베이킹(Baking)하는 단계 및 상기 베이킹이 수행된 반도체 시료를 플라즈마(Plasma)를 이용하여 표면을 처리하는 단계를 포함하여 이루어짐을 특징으로 한다.The present invention relates to a method for manufacturing a semiconductor reference sample for inspecting and calibrating an inspection apparatus for evaluating damage caused by ion implantation using thermal waves. And baking the semiconductor sample on which the baking is performed, using a plasma.

따라서, 본 발명에 의하면 열파동을 이용하여 이온주입을 평가하는 검사장치의 정확한 검,교정이 이루어져서 이온주입을 평가하는 데이터에 대한 신뢰도를 높이는 효과가 있다.Therefore, according to the present invention, accurate inspection and calibration of the inspection apparatus for evaluating ion implantation using heat waves are performed, thereby increasing the reliability of data for evaluating ion implantation.

Description

반도체 기준시료의 제조방법Method of manufacturing semiconductor reference sample

본 발명은 반도체 기준시료의 제조방법에 관한 것으로서, 보다 상세하게는 상온에서 물성요소의 변화가 없이 일정한 시그널(Signal)을 유지하는 시료로서 열파동(Thermal Wave)을 이용하여 이온주입의 정도를 평가하는 검사장치의 검,교정이 정확하게 이루어지도록 개선시킨 반도체 기준시료의 제조방법에 관한 것이다.The present invention relates to a method for manufacturing a semiconductor reference sample, and more particularly, to evaluate a degree of ion implantation using a thermal wave as a sample that maintains a constant signal without changing physical properties at room temperature. The present invention relates to a method for manufacturing a semiconductor reference sample which is improved to accurately perform calibration and calibration of an inspection apparatus.

일반적으로, 이온주입(Ion Implant)은 반도체 제조 공정 중 확산(Diffusion) 기술과 더불어 기판속으로 불순물을 넣어 전기적 특성을 갖도록 하는 기술로서, 이온주입이 도입되기 전의 불순물 주입은 대부분 확산 기술에 의해 이루어졌으나, 소자가 고집적화, 고밀도화 되어가는 최근의 반도체 제조에서는 이온주입 기술이 새로이 대두되었고, 그 중요성을 더해가며 더욱 더 다양하게 발전되고 있다.In general, ion implantation is a technique for putting impurities into a substrate in order to have electrical characteristics along with diffusion technology in the semiconductor manufacturing process, and impurity implantation before ion implantation is mostly performed by diffusion technology. However, in recent years in semiconductor manufacturing, in which devices are becoming highly integrated and densified, ion implantation technologies have emerged, and they are becoming more and more variously developed.

즉, 이온주입 기술은 불순물의 양을 정확히 제어할 수 있고, 에너지(Energy)의 조절에 의해 주입 깊이를 정확하게 조절할 수 있어서 균일성 및 재현성이 뛰어나고, 양산의 측면에서도 대단히 유용하다.In other words, the ion implantation technology can accurately control the amount of impurities, and the implantation depth can be precisely controlled by controlling the energy, which is excellent in uniformity and reproducibility, and is very useful in terms of mass production.

또한 원하는 불순물을 순도 높게 추출하여 주입할 수 있고, 상온에서 공정이 이루어질 수 있는 등의 여러 가지 이점들이 있다.In addition, the desired impurities can be extracted and injected with high purity, and the process can be performed at room temperature.

그러나 이온주입을 수행하는 설비는 고전압, 고전류, 진공계 등을 포함하는 중장비로 이루어지고, 또한 주입에너지의 한계가 있는 등의 단점 등을 가지고 있으며, 이러한 단점 중 이온주입 시 기판의 결정격자에 미치는 충격으로 인한 손상(Damage)이 가장 큰 문제점으로 지적되고 있다.However, the ion implantation equipment is composed of heavy equipment including high voltage, high current, vacuum system, etc., and also has disadvantages such as limitation of implantation energy. Damage caused by this problem is pointed out as the biggest problem.

그래서 이에 따른 대책을 마련하기 위하여 여러 가지 검사장치 등을 이용하여 이온주입이 기판의 결정격자에 미치는 손상정도를 평가하여야 한다.Therefore, in order to prepare a countermeasure, the damage degree of ion implantation on the crystal lattice of the substrate should be evaluated by using various inspection devices.

이러한 검사장치들로 기판의 결정격자에 미치는 손상정도를 평가하기 위해서는 시료들이 필요하고, 이 시료 중 검사장치들을 검,교정하는 시료를 기준시료로 제조하여 활용하고 있다.In order to evaluate the degree of damage to the crystal lattice of the substrate with these inspection devices, samples are required, and a sample for inspecting and calibrating inspection devices among these samples is manufactured and used as a reference sample.

그러나 에너지대역에서의 변화로서 손상정도의 양을 나타낼 수 있는 열파동의 변화를 이용하는 검사장치에서는 그 기준시료의 문제점으로 인해 정확한 검,교정이 이루지지 않았다.However, in the inspection apparatus using the change of the thermal wave that can indicate the amount of damage as the change in the energy band, due to the problem of the reference sample, the accurate calibration and calibration were not performed.

즉, 기판의 결정격자에 미치는 손상정도를 평가하기 위하여 시료에 이온주입을 수행한 후 그대로 방치하면 이온주입에 의한 손상정도가 보상되기 때문이다.In other words, in order to evaluate the degree of damage on the crystal lattice of the substrate, if the sample is left as it is after the ion implantation, the degree of damage caused by the ion implantation is compensated.

다시 말해 손상정도의 양을 나타내는 열파동의 값이 일정하게 유지되지 않고 시간에 따라 하강하기 때문이고, 그 보상은 약 육개월동안이나 진행된다.In other words, because the value of the thermal wave, which represents the amount of damage, does not remain constant but decreases with time, the compensation lasts about six months.

따라서, 종래에는 열파동을 이용하여 이온주입을 평가하는 검사장치를 검,교정하는 기준시료는 열파동의 값의 변화로 인해 정확한 검,교정이 이루어지지 않아 이온주입을 평가하는 데이터(Data)의 신뢰도를 저하시키는 문제점이 있었다.Therefore, in the related art, a standard sample for testing and calibrating an ion implantation using thermal waves is not accurately calibrated and calibrated due to a change in the value of the thermal wave. There was a problem of lowering the reliability.

본 발명의 목적은, 열파동을 이용하여 이온주입을 평가하는 검사장치의 검,교정을 정확하게 수행하여 이온주입을 평가하는 데이터의 신뢰도를 확보하기 위한 반도체 기준시료의 제조방법을 제공하는 데 있다.SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor reference sample for ensuring the reliability of data for evaluating ion implantation by accurately performing the inspection and calibration of an inspection apparatus for evaluating ion implantation using heat waves.

도1은 본 발명에 따른 반도체 기준시료의 제조방법의 실시예를 나타내는 공정도이다.1 is a process chart showing an embodiment of a method for manufacturing a semiconductor reference sample according to the present invention.

도2는 시간에 따른 열파동의 값의 변화로 표현되는 붕괴인수의 값을 나타내는 그래프이다.2 is a graph showing the value of the collapse factor expressed as a change in the value of the heat wave with time.

※도면의 주요부분에 대한 부호의 설명※ Explanation of symbols for main parts of drawing

10 : A 직선 12 : B 직선10: A straight line 12: B straight line

상기 목적을 달성하기 위한 본 발명에 따른 반도체 기준시료의 제조방법은, 열파동(Thermal Wave)을 이용하여 이온주입에 따른 손상정도를 평가하는 검사장치를 검,교정하기 위한 반도체 기준시료의 제조방법에 있어서, 소정의 에너지로 이온이 주입된 반도체 시료를 베이킹(Baking)하는 단계 및 상기 베이킹이 수행된 반도체 시료를 플라즈마(Plasma)를 이용하여 표면을 처리하는 단계를 포함하여 이루어짐을 특징으로 한다.The method of manufacturing a semiconductor reference sample according to the present invention for achieving the above object, the method of manufacturing a semiconductor reference sample for testing and calibrating an inspection apparatus for evaluating the damage caused by ion implantation using thermal waves The method may include: baking a semiconductor sample into which ions are implanted at a predetermined energy, and treating the surface of the semiconductor sample on which the baking is performed by using a plasma.

그리고 상기 표면처리가 이루어진 시료 중 시간에 따른 상기 열파동의 값으로 표현되는 붕괴인수(Decay Factor)가 0.99 내지 1.002 범위의 상기 시료를 선별하는 단계를 더 포함하여 이루어지는 것이 바람직하다.And it is preferable to further comprise the step of selecting the sample of the decay factor (Decay Factor) expressed in the value of the heat wave with time of the sample subjected to the surface treatment ranges from 0.99 to 1.002.

또한 상기 베이킹은 180℃ 내지 220℃의 온도에서 18분 내지 22분 동안 수행하는 것이 더욱 효과적이다.In addition, the baking is more effective to perform 18 to 22 minutes at a temperature of 180 ℃ to 220 ℃.

이하, 본 발명의 구체적인 실시예를 첨부한 도면을 참조하여 상세히 설명한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

도1은 본 발명에 따른 반도체 기준시료의 제조방법의 실시예를 나타내는 공정도이고, 도2는 시간에 따른 열파동의 값의 변화로 표현되는 붕괴인수의 값을 나타내는 그래프이다.1 is a process chart showing an embodiment of a method for manufacturing a semiconductor reference sample according to the present invention, Figure 2 is a graph showing the value of the collapse factor expressed as a change in the value of the thermal wave with time.

먼저, 도1은 단계 S2에서 시료에 소정의 에너지로 이온을 주입하고, 단계 S4에서 베이킹(Baking)을 수행한 후 단계 S6에서 플라즈마(Plasma)를 이용하여 표면을 처리하고, 단계 S8에서 붕괴인수가 1인 시료를 선별하는 구성으로 이루어진다.First, Figure 1 implants ions into a sample at a predetermined energy in step S2, performs baking in step S4, then processes the surface using a plasma in step S6, and collapses in step S8. It consists of a configuration for selecting a sample of 1 is.

그리고 도2는 x축은 시간(초)으로 y축은 열파동의 값으로 하여 시간에 따른 열파동의 값의 변화로 표현되는 붕괴인수의 값을 나타내는 그래프이다.2 is a graph showing the value of the decay factor expressed as a change in the value of the thermal wave with time, with the x-axis being the time (seconds) and the y-axis being the value of the thermal wave.

전술한 바와 같은 본 발명에 따른 구체적인 실시예에 대해서 보다 상세하게 설명한다.Specific embodiments of the present invention as described above will be described in more detail.

먼저, 단계 S2에서 시료에 소정의 에너지로 이온을 주입한다. 여기서 주입에너지는 측정하고자하는 범위 내에서 적절하게 조절할 수 있고, 주입되는 이온 즉, 불순물 또한 임의로 선택할 수 있다.First, in step S2, ions are implanted into the sample at a predetermined energy. In this case, the implantation energy may be appropriately controlled within the range to be measured, and the implanted ions, that is, impurities may be arbitrarily selected.

그리고 단계 S4에서 이온주입에 따른 결정격자의 손상정도를 강제로 보상하기 위해서 이온이 주입된 시료를 180℃ 내지 220℃의 온도로 18분 내지 22분 정도의 시간동안 베이킹을 수행하고, 실시예는 200℃의 온도로 20분간 베이킹을 수행한다.In order to forcibly compensate for the damage of the crystal lattice due to the ion implantation in step S4, the sample into which the ion is implanted is baked at a temperature of 180 ° C. to 220 ° C. for about 18 minutes to 22 minutes, and the embodiment is Baking is carried out at a temperature of 200 ° C. for 20 minutes.

이어서 단계 S6에서 베이킹이 수행된 시료를 좀 더 안정된 상태로 만들기 위하여 플라즈마(Plasma)를 이용하여 시료의 표면을 처리한다.Subsequently, the surface of the sample is treated by using plasma to make the sample subjected to baking in step S6 to be more stable.

그리고 단계 S8에서 붕괴인수가 1인 시료를 선별하여 기준시료로 활용하면 열파동을 이용하여 이온주입을 평가하는 검사장치의 검,교정을 정확하게 수행할 수 있다.In addition, if a sample having a decay factor of 1 is selected and used as a reference sample in step S8, the inspection and calibration of the inspection apparatus for evaluating ion implantation using heat waves can be accurately performed.

실시예의 방법으로 제조되는 기준시료는 열파동을 이용하는 검사장치 중에서 열탐침장치(Thermal Probe Machine)를 활용하여 검,교정을 수행하면 보다 정확한 검,교정을 할 수 있다.The reference sample prepared by the method of the embodiment can be more accurate inspection and calibration by performing the calibration, calibration using a thermal probe (Thermal Probe Machine) of the inspection apparatus using the thermal wave.

여기서 붕괴인수는 시간에 따른 열파동의 값의 변화를 나타내는 것으로서, 에너지대역 즉, 전도대역(Conduction Band)과 가전자대역(Valence Band)사이의 간극(Gap)에서 에너지상태 변화를 나타낼 수 있는 지표인 열파동의 값의 변화를 이용하는 것으로, 시료의 결정격자의 손상정도를 시간에 따른 변화인, 초기시간에서의 열파동의 값을 나중시간의 열파동의 값으로 나눈 값으로 그 값이 0.99 내지 1.002의 범위를 만족하면 기준시료로서 활용할 수 있다.Here, the decay factor represents a change in the value of the thermal wave with time, and is an index that can represent the change of energy state in the energy band, that is, the gap between the conduction band and the valence band. By using the change of the value of the phosphorus thermal wave, the value of the thermal wave at the initial time divided by the change of the crystal lattice damage of the sample over time divided by the value of the thermal wave at the later time, the value is 0.99 to If the range of 1.002 is satisfied, it can be used as a reference sample.

다시 말해 도3의 초기시간 0초에서의 열파동의 값 TW0를 나중시간인 10초 후의 열파동의 값 TW10으로 나눈 값이 붕괴인수이고, 이 붕괴인수는 직선의 기울기로 표현되고, 실시예의 A 직선(10)과 같이 기울기=0가 되면 그 값이 1이기 때문에 기준시료로서 활용할 수 있는 것이다.In other words, the value obtained by dividing the value of the thermal wave TW 0 at the initial time 0 second in FIG. 3 by the value TW 10 of the thermal wave 10 seconds later is the decay factor, which is expressed by the slope of the straight line. As in the example A straight line 10, when the slope is 0, the value is 1, so that it can be used as a reference sample.

그리고 B 직선(12)은 시간에 따라 손상정도의 보상이 이루어지는 종래의 시료의 붕괴인수의 값을 나타내는 것으로서, 초기시간 0초에서의 열파동의 값 TW0를 나중시간 10초에서의 열파동의 값인 TW10′으로 나눈 값인 붕괴인수 즉, 직선의 기울기가 0.9로 나타나기 때문에 본 발명에 따른 기준시료 내의 범위의 값을 만족하지 못하는 것이다.The B straight line 12 represents the value of the collapse factor of the conventional sample in which the degree of damage is compensated with time, and the value TW 0 of the thermal wave at the initial time of 0 seconds is used for the thermal wave at the later time of 10 seconds. The collapse factor, i.e., the straight line slope, is 0.9, which is divided by the value TW 10 ′, so that the value of the range within the reference sample according to the present invention is not satisfied.

여기서 본 발명의 방법으로 제조되는 기준시료는 상온에서의 보상요소를 베이킹, 플라즈마를 이용한 표면처리 등을 수행하여 강제로 제거하는 것으로 시료의 보상정도를 나타내는 붕괴인수의 값이 1인 시료로 만들기 위한 것이다.Here, the reference sample prepared by the method of the present invention is to forcibly remove the compensating element at room temperature by performing a surface treatment using baking, plasma, etc. will be.

즉, 열파동의 값의 변화정도가 일정한 시그널을 유지하는 시료로 만드는 것이다.In other words, the change in the value of the thermal wave is made into a sample that maintains a constant signal.

그러면 상온에서의 온도영향 등을 받지않고, 일정한 물성상태를 유지하기 때문에 기준시료로서의 그 역할을 수행할 수 있어 열파동을 이용하여 이온주입을 평가하는 검사장치의 검,교정을 정확하게 수행할 수 있다.Then, since it maintains a constant physical property state without being affected by temperature at room temperature, it can serve as a reference sample, and can accurately perform inspection and calibration of an inspection apparatus that evaluates ion implantation using heat waves. .

따라서, 본 발명에 의하면 열파동을 이용하여 이온주입을 평가하는 검사장치의 정확한 검,교정이 이루어져서 이온주입을 평가하는 데이터에 대한 신뢰도를 높이는 효과가 있다.Therefore, according to the present invention, accurate inspection and calibration of the inspection apparatus for evaluating ion implantation using heat waves are performed, thereby increasing the reliability of data for evaluating ion implantation.

이상에서 본 발명은 기재된 구체예에 대해서만 상세히 설명되었지만 본 발명의 기술사상 범위 내에서 다양한 변형 및 수정이 가능함은 당업자에게 있어서 명백한 것이며, 이러한 변형 및 수정이 첨부된 특허청구범위에 속함은 당연한 것이다.Although the present invention has been described in detail only with respect to the described embodiments, it will be apparent to those skilled in the art that various modifications and variations are possible within the technical scope of the present invention, and such modifications and modifications are within the scope of the appended claims.

Claims (4)

열파동(Thermal Wave)을 이용하여 이온주입에 따른 손상정도를 평가하는 검사장치를 검,교정하기 위한 반도체 기준시료의 제조방법에 있어서,In the manufacturing method of a semiconductor reference sample for inspecting and calibrating an inspection device for evaluating the damage caused by ion implantation using thermal waves, 소정의 에너지로 이온이 주입된 반도체 시료를 베이킹(Baking)하는 단계; 및Baking a semiconductor sample into which ions are implanted at a predetermined energy; And 상기 베이킹이 수행된 반도체 시료를 플라즈마(Plasma)를 이용하여 표면을 처리하는 단계;Treating the surface of the semiconductor sample on which the baking is performed by using plasma; 를 포함하여 이루어짐을 특징으로 하는 반도체 기준시료의 제조방법.Method of manufacturing a semiconductor reference sample comprising a. 제 1 항에 있어서, 상기 표면처리가 이루어진 시료 중 시간에 따른 상기 열파동의 값으로 표현되는 붕괴인수(Decay Factor)가 0.99 내지 1.002 범위의 상기 시료를 선별하는 단계;The method of claim 1, further comprising: selecting a sample having a decay factor expressed as a value of the thermal wave with time in the sample subjected to the surface treatment in a range of 0.99 to 1.002; 를 더 포함하여 이루어짐을 특징으로 하는 상기 반도체 기준시료의 제조방법.The method of manufacturing the semiconductor reference sample, characterized in that further comprises. 제 1 항에 있어서, 상기 베이킹은 180℃ 내지 220℃의 온도로 수행함을 특징으로 하는 상기 반도체 기준시료의 제조방법.The method of claim 1, wherein the baking is performed at a temperature of 180 ° C. to 220 ° C. 6. 제 3 항에 있어서, 상기 베이킹은 18분 내지 22분 동안 수행함을 특징으로 하는 상기 반도체 기준시료의 제조방법.The method of claim 3, wherein the baking is performed for 18 to 22 minutes.
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