KR100188082B1 - Interpolating circuit having a little interpolating error of compact disc player - Google Patents

Abstract

The present invention relates to an interpolation circuit for a compact disc player with a low interpolation error. The present invention stores data and correction signals of the data from an external source, and outputs data and correction signals when the data input signal is input high. An input means, an upper data interpolation means for receiving upper data and its correction signal from the data input means when the upper data start signal is input, and outputting the upper data by interpolation or average value interpolation according to whether the correction signal is present; When the lower data start signal is input, the lower data interpolation means receives lower data and its correction signal from the data input means and outputs the lower data by interpolation or average value interpolation according to the correction signal. Read from compact disc player When an error occurs in the data, the interpolation of the upper and lower parts of the data is performed by constructing a plurality of interpolation blocks in order to interpolate the uncorrected error items even though the error correction block is corrected. The present invention relates to a storage circuit for a compact disc player with a low interpolation error which reduces an error during interpolation.

Description

Interpolation circuit for compact disc players with low interpolation error

1 is a block diagram applying a data error correction method in a general compact disc player,

2 is a block diagram applying a storage circuit for a compact disc player of the prior art,

3 is an exemplary diagram showing data input of FIG.

4 is a block diagram to which an interpolation circuit for a compact disc player with low interpolation error according to an embodiment of the present invention is applied.

5 is an exemplary diagram showing the data input of FIG.

The present invention relates to a storage circuit for a compact disk player with low interpolation error. More specifically, when an error occurs among data read from the compact disk player, an error correction block ( In the interpolation of the uncorrected errors even though corrected in the block), the interpolation error is reduced by constructing a plurality of interpolation blocks to perform interpolation of the upper and lower portions of the data separately to reduce the error in interpolation. An interpolation circuit for a compact disc player.

Conventional audio media have mostly performed analog signal processing, while analog audio is linear and easy to read because it carries or expands the signal by recording changes. There are many problems to improve, such as recording is easily altered, and the inherent noise of the media remains intact.

The above-mentioned problems have been solved by the digital technology. The audio is digitally encoded, and once the signal is encoded, the digital signal is recorded and transported, and there is a countermeasure against errors. Distortion, interference and signal damage have been solved.

Among the digital audio media, the most prominent thing in recent years is the compact disc, which is an optical recording method and can be used permanently because it is non-contact to restore the recorded data by using a laser.

The compact disc player which restores the signal from the compact disc and transmits the sound is used for the optical unit which picks up the reflected light by illuminating the laser at a predetermined position of the disc, and the rotation of the disc and the picked-up signal. An electric motor driving unit for driving an electric motor, a signal unit for amplifying a signal read by the optical pickup, converting a signal, and correcting an error, and outputting an acoustic signal that can be heard by a human; It consists of an operation and display unit that allows to operate and display the process.

By the way, the error correction portion of the signal portion, the advantage of the digital method compared to the analog signal processing method described above as shown in Figure 1 showing the general concept.

FIG. 1 is a block diagram applying a data error correction method in a general compact disc player, and FIG. 3 is an exemplary diagram showing data input of FIG.

When the signal detected by the optical detection method is input, the signal conversion unit 1 is converted into a signal capable of error correction and output to the data storage unit 2, the data storage unit 2 is the signal The signal output from the converter 1 is stored, and the signal is output to the error correction unit 3.

If the input data contains an error that has occurred on the disc, the error correction unit 3 corrects the error, and outputs a corrected signal and a correction signal that the error has been corrected.

However, if the error contained in the input data cannot be corrected by the error correction unit 3, an error correction signal and data indicating that error correction has not been performed are output.

The signal interpolator 4 receives the signal output from the error correction unit 3, and if the error is corrected, outputs the signal as it is, and if the error is not corrected, interpolates the signal accordingly and generates an error. Before we do that, we have to access the original sound similar to the original sound and print it out.

A detailed method of interpolating a signal by correcting an error to be close to the original sound as described above is as follows.

Hereinafter, an interpolation circuit for a compact disc player of the related art will be described with reference to the accompanying drawings.

2 is a block diagram to which an interpolation circuit for a compact disc player of the prior art is applied.

As shown in FIG. 2, the structure of the interpolation circuit for a compact disc player of the prior art receives and stores data and a correction signal of the data from the outside, and when the data input signal is inputted high, A data input unit 10 for outputting a correction signal; After receiving and storing the correction signal of the data output from the data input unit 10, if the correction signal enable signal is input high, the stored correction signal is read and the signal according to whether or not the error of the data is corrected is outputted. A correction signal processor 20; A pre-interpolation unit 30 for storing data output from the data input unit 10 and outputting data or pre-interpolating the data depending on whether a signal is output from the correction signal processing unit 20; An average value interpolator 40 for receiving a signal output from the data input unit 10 and the pre-interpolator 30 and performing average interpolation to output the signal; It is composed of an output signal selector 50 which operates according to the signal output from the correction signal processor 20 and selects and outputs one signal from the signals input from the pre-interpolator 30 and the average value interpolator 40. have.

The correction signal processing unit 20 is configured to receive and store a correction signal of data output from the data input unit 10, and output a correction signal stored when the correction signal start signal is input high. A storage unit 21; The correction signal output from the correction signal storage unit 21 is input to determine whether or not the error of the data is corrected accordingly, whether to output the data as it is, or to output the interpolation, or output the average interpolation It consists of a correction signal check unit 22 for outputting a signal for controlling whether or not.

The pre-interpolation unit 30 may include a first inverting unit 31 that receives a signal output from the correction signal processing unit 20 and inverts and outputs the signal; It operates according to the signal output from the correction signal processing unit 20 and the signal output from the first inverting unit 31, and selects one of the data output from the data input unit 10 and the data input immediately before. A first data selector 32; The data storage unit 32 stores data output from the first data selection unit 32 and outputs the data when a data enable signal is input.

The average interpolation unit 40 includes: an adding unit 41 for adding and outputting data output from the data input unit 10 and data output from the pre-interpolation unit 30; It consists of a seat shifter 42 for shifting the position of the signal output from the adder 41 by one bit and dividing by 1/2.

The output signal selection unit 50 includes a second inverting unit 51 which receives a signal output from the correction signal processing unit 20 and inverts and outputs the signal; Operated according to the signal output from the correction signal processing unit 20 and the signal output from the second inverting unit 51, the data output from the pre-interpolation unit 30 and the average value interpolating unit 40 are output. The second data selection unit 52 selects one of the data and outputs the selected data.

The operation of the interpolation circuit for a compact disc player of the prior art, which is made as described above, is as follows.

Data read from disk consists of frame units, one frame consists of six channels, one channel is divided into upper and lower parts, and each upper and lower part. The part consists of eight bits.

In other words, one channel is composed of a 16-bit signal.

If an error occurs on the disk and the data contains an error, the error correction unit may correct the error by recovering the original sound, but nevertheless, the error may not be corrected. The data is corrected by interpolation to bring it closer to sound.

If the error correction unit fails to correct an error, the error correction unit outputs a correction signal and data indicating that the error data. The data input unit 10 stores the input data and the correction signal, and then inputs data from an external source. When the signal DATA-IN is high, the signal is output.

The signal output from the error correction unit is composed of a data upper portion, a lower portion, and a corresponding correction signal, and are sequentially output when the data input signal becomes high.

When the correction signal is output from the data input unit 10, the correction signal storage unit 21 stores the signal, and when the correction signal start signal FLAG-EN input from the outside is input high, The correction signal check unit 22 reads the correction signal and checks whether or not the error of the data DATA is corrected.

When an error is corrected when the correction signal is checked and the correction signal is low, the correction signal checker 22 outputs a high signal through the first output terminal CA, thereby providing the first data selector. 32 outputs data DATA input from the data input unit 10. < Desc / Clms Page number 10 >

The signal output from the first data selector 32 is input to the data storage 33, and when the data start signal DATA-EN is input, is output to the second data selector 52.

At this time, the upper correction signal checker 22 outputs a high signal through the second output terminal CB, so that the second data selector 52 outputs a signal input from the data storage 33. Do it.

Therefore, when data error is corrected and input, the input data DATA is output as it is.

On the other hand, when the correction signal is checked, when the error is not corrected and the correction signal is high, the correction signal checker 22 outputs a low signal through the first output terminal CA, thereby providing the first data selector. The data 32 _n outputs immediately before the data DATA _n-1 fed back from the data storage 33.

That is, without having to select the input data (DATA _n), so as to maintain the value of the data (DATA _n-1) that was input immediately before.

The data storage unit 33 outputs the value of the held data DATA _n-1 when the data start signal DATA-EN is input.

The adder 41 of the average value interpolator 40 is the data DATA _n-1 just input from the data storage unit 33 and the data DATA _{n + 1} input to the data input unit 10 next. ) Is input and the output is added.

The seat shifter 42 shifts the signal output from the adder 41 to the right by one bit to divide the value by two so as to satisfy Equation (1) below.

That is, the average value of the immediately preceding data DATA _n-1 and immediately after the data DATA _{n + 1} is calculated and output.

At this time, the correction signal checking unit 22 checks the correction signal of the data DATA _{n + 1} input immediately after and checks whether the error of the data DATA _{n + 1} immediately after is corrected.

In the above, when the error of immediately after the data DATA _{n + 1} is not corrected, the correction signal checking unit 22 outputs a high signal through the second output terminal CB so that the second data selecting unit 52 can receive the data. Selects the data DATA _n-1 which was input immediately before the data is output from the data storage 33, so that the operation of the entire circuit is pre-interpolated.

In the above, when the error of immediately after the data DATA _{n + 1} is corrected, the correction signal check unit 22 outputs a low signal so that the second data selector 52 is output from the average value interpolator 40. By selecting the average value according to the above formula (1), the overall circuit operation is to perform the average value interpolation.

Therefore, if there is no error or correction of the input data, it is output as it is. If there is an error of the input data and there is no error of the next input data, the interpolation is outputted, and there is an error of the input data. If there is an error in the next input data, the interpolation is performed.

However, such a circuit causes a problem in that the upper part and the lower part of the data are corrected together.

That is, in FIG. 3, when the signal is input as shown in (a), there is no problem by outputting the input signal as it is, but then when the signal is input as shown in (b), the upper part is corrected and Since the data is not corrected, a substantial error occurs because the data value maintains the value of the data DATA _{n-1 previously} inputted to the correct upper part.

In addition, if an error occurs in the value of the lower portion occupying a small value in the digital signal, the error value is small, but if an error occurs in the value of the upper portion occupying a large value, the error also becomes large.

In fact, if the value of the overall data is rising, and a signal such as (c) of FIG. 3 is input next, the value at that time also maintains the previous value, and the error becomes larger.

In using the interpolation circuit for a compact disc player of the prior art as described above, by treating the upper part and the lower part as to whether or not the error is corrected, the data value of the upper part where no error occurs or the error is corrected is also treated. There is a problem in that unnecessary errors occur as a result of newly corrected output such as pre-interpolation or average interpolation.

Accordingly, an object of the present invention is to solve the above-mentioned problems. When an error occurs among data read from a compact disc player, the signal interpolation is performed for the uncorrected error even though the error correction block is corrected. In order to provide an interpolation circuit for a compact disc player with a low interpolation error in which an error in interpolation is reduced by forming a plurality of interpolation blocks and performing interpolation of upper and lower portions of data separately.

A configuration of the present invention for achieving the above object comprises: data input means for receiving and storing data and a correction signal of the data from the outside, and outputting the data and the correction signal when the data input signal is input high; Upper data interpolation means for receiving upper data and a correction signal from the data input means when the upper data start signal is input, and outputting the upper data by pre-interpolation or average value interpolation according to whether the correction signal is present; The lower data interpolation means receives lower data and its correction signal from the data input means when the lower data is input, and outputs the lower data by interpolation or average value interpolation according to the correction signal.

Hereinafter, with reference to the accompanying drawings will be described the most preferred embodiment that can be easily carried out this invention.

4 is a block diagram applying an interpolation circuit for a compact disc player with low interpolation error according to an embodiment of the present invention, and FIG. 5 is an exemplary diagram showing data input of FIG.

As shown in FIG. 4, the structure of the storage circuit for a compact disc player with less interpolation error according to the embodiment of the present invention receives and stores data and correction signals thereof from the outside, and the data input signal is high. A data input unit 100 for outputting data and a correction signal when inputted as; When the upper data start signal is input, the upper data interpolation unit 200 receives upper data and its correction signal from the data input unit 100 and outputs the upper data by interpolation or average value interpolation according to whether the correction signal is present. Wow; When the lower data start signal is input, the lower data interpolation unit 300 receives lower data and its correction signal from the data input unit 100 and outputs the lower data by interpolation or average interpolation according to whether the correction signal is present. Consists of

The configuration of the upper data interpolation unit 200 receives and stores upper data and a correction signal of the data from the data input unit 100, and outputs data and a correction signal when the upper data input signal is input high. An upper data input unit 210; If the correction signal of the upper data output from the upper data input unit 210 is received and stored, and the correction signal start signal is input high, the stored correction signal is read to determine whether the error of the upper data is corrected. An upper correction signal processing unit 220 for outputting a signal; Upper pre-interpolation unit 230 for storing upper data output from the upper data input unit 210 and outputting data or performing pre-interpolation depending on whether a signal is output from the upper correction signal processing unit 220. Wow; An upper average interpolation unit 240 for receiving the signals output from the upper data input unit 210 and the upper pre-interpolator 230 and performing average interpolation to output the signals; An upper output signal selector which selects and outputs a signal from signals input from the upper pre-interpolator 230 and the upper average value interpolator 240 by operating according to the signal output from the upper correction signal processor 220 ( 250).

The upper correction signal processing unit 220 is configured to receive and store a correction signal of upper data output from the upper data input unit 210, and to store the upper correction signal stored when the correction signal start signal is input high. An upper correction signal storage unit 221 for outputting; The upper correction signal storage unit 221 receives an upper correction signal output from the upper determination signal to determine whether an error of the upper data is corrected, and accordingly outputs the data as it is, transpose interpolation, or outputs the average value interpolation. The upper correction signal check unit 222 for outputting a signal for controlling whether or not to output.

The upper pre-interpolator 230 may include: an upper first inverter 231 which receives a signal output from the upper correction signal processor 220 and inverts the output signal; In response to the signal output from the upper correction signal processing unit 220 and the signal output from the upper first inverting unit 231, one of the data output from the upper data input unit 210 and the data input immediately before An upper first data selector 232 for selecting and outputting the selected data; The upper data storage unit 233 stores data output from the upper first data selector 232 and outputs the data when a data start signal is input.

The upper mean interpolation unit 240 may include: an upper adding unit 241 for adding and outputting upper data output from the upper data input unit 210 and data output from the upper pre-interpolation unit 230; The upper digit shifter 242 is configured to shift the position of the signal output from the upper adder 241 by one bit and divide by 1/2 to output the digit.

The upper output signal selector 250 may include: an upper second inverter 251 that receives a signal output from the correction signal processor 220 and inverts the output signal; Operating according to the signal output from the upper correction signal processing unit 220 and the signal output from the upper second inverting unit 251, the data output from the pre-interpolation unit 230 and the upper average interpolation unit 240 The upper second data selector 252 selects one of the data output from the data and outputs the selected data.

The lower data interpolator 300 is configured to receive and store lower data and a correction signal of the data from the data input unit 100, and output data and correction signals when the lower data input signal is input high. A lower data input unit 310; After receiving and storing the correction signal of the lower data outputted from the lower data input unit 310, and when the correction signal start signal is input as high, the stored signal is read and the signal according to whether or not the error of the lower data is corrected. A lower correction signal processor 320 for outputting a; The lower pre-interpolation unit 330 for storing the lower data output from the lower data input unit 310 and outputting data or performing pre-interpolation depending on whether the signal is output from the lower correction signal processing unit 320. Wow; A lower average interpolation unit 340 for receiving the signals output from the lower data input unit 310 and the lower pre-interpolation unit 330 and performing average interpolation; A lower output signal selector which selects and outputs a signal from signals input from the lower pre-interpolator 330 and the lower average interpolator 340 by operating according to the signal output from the lower correction signal processor 320 ( 350).

The lower correction signal processor 320 is configured to receive and store a lower correction signal of lower data output from the lower data input unit 310, and output a stored correction signal when a correction signal start signal is input. A lower correction signal storage unit 321; The lower correction signal storage unit 321 receives the lower correction signal output from the lower determination whether the error of the lower data is corrected, and outputs the data accordingly, whether to output by interpolation, or average interpolation It consists of a lower correction signal check unit 322 for outputting a signal for controlling whether or not to output.

The pre-interpolator 330 may include a lower first inverting unit 331 which receives a signal output from the lower correction signal processing unit 320 and inverts and outputs the signal; In response to a signal output from the lower correction signal processor 320 and a signal output from the lower first inverting unit 331, one of the data output from the lower data input unit 310 and the data input immediately before A lower first data selector 332 for selecting and outputting the selected data; The lower data storage unit 333 stores data output from the lower first data selector 332 and outputs the data when a data start signal is input.

The lower average value interpolator 340 may include: a how-up adder 341 which adds and outputs lower data output from the lower data input unit 310 and data output from the lower pre-interpolator 330; The lower adder 342 includes a lower digit shifter 342 which shifts the position of the signal output from the lower adder 341 by one bit and divides the output by 1/2.

The lower output signal selector 350 may include a lower second inverter 351 which receives a signal output from the correction signal processor 320 and inverts and outputs the signal; Operating according to the signal output from the lower correction signal processing unit 320 and the signal output from the lower second inverting unit 351, the data output from the lower pre-interpolation unit 330 and the lower average interpolation unit 340 It consists of a lower second data selection unit 352 for selecting one of the data output from the output).

The operation of the present invention made as described above is as follows.

If an error occurs on the disc and the data contains an error, the error correction unit makes an error correction and recovers the original sound. However, if the error is not corrected, the error should be close to the original sound. Interpolation is used to correct the data.

If the error correcting unit outputs a correction signal and data indicating that the error data cannot be corrected, the data input unit 100 stores the input data and the correction signal, and then inputs an external data input signal DATA-. When IN) is high, the data upper part and data lower part and corresponding correction signals are sequentially output.

The upper data portion and the upper correction signal output from the data input unit 100 are input to the upper data input unit 210 of the upper data interpolator 200, and the lower data portion and the lower correction signal are lower data interpolator 300. The data input unit 310 is input to the lower data input unit 310 to interpolate the data according to the correction signal in separate steps.

When the upper data start signal MSB-EN is input high, the upper data input unit 210 outputs the upper correction signal to the upper correction signal storage unit 221 and outputs upper data to the upper first data selector 232. Will output

The upper correction signal storage unit 221 stores the input upper correction signal, and when the correction signal start signal FLAG-EN is input high, outputs the upper correction signal to the upper correction signal checker 222. The upper correction signal checking unit 222 reads the upper correction signal and checks whether an error of an upper portion of the data is corrected.

The upper correction signal checking unit 222 outputs a high signal through the first output terminal CA when an error is corrected when the upper correction signal is checked and the upper correction signal is low, thereby outputting the higher first data. The selector 232 outputs upper data (CATAUP) input from the upper data input unit 210.

The signal output from the upper first data selector 232 is input to the upper data storage 233, and is then output to the upper second data selector 252 when the data start signal DATA-EN is input.

In this case, the upper correction signal checker 222 outputs a high signal through the second output terminal CB, so that the upper second data selector 252 is input from the upper data storage 233. To output

Therefore, when the error of the upper data is corrected and inputted, the input upper data (CATAUP) is output as it is.

On the other hand, when the upper correction signal is checked, if the error is not corrected and the input upper correction signal is high, the upper correction signal checker 222 outputs a low signal through the first output terminal CA, The upper first data selector 232 outputs the upper data DATAUP _n-1 immediately before being fed back from the upper data storage 233.

That is, the upper data DATAUP _n inputted is not selected, and the value of the upper data DATAUP _n-1 inputted immediately before is maintained.

The upper data storage unit 233 outputs the value of the stored upper data DATAUP _n-1 when the data start signal DATAEN is input high.

The upper adder 241 of the upper average value interpolator 240 is the upper data DATAUP _n-1 immediately inputted from the upper data storage 233 and the upper data DATA _{n +} input next. ₁ ) Input and add and output.

The upper digit shifter 242 shifts the signal output from the upper adder 241 to the right by one bit to divide the value by 2 so as to satisfy Equation (2) below.

That is, the average value of the upper data DATAUP _n-1 input immediately before and the upper data DATAUP _{n + 1} input immediately after is calculated and output.

At this time, the upper correction signal checking unit 222 checks the correction signal of the upper data DATAUP _{n + 1} input immediately after, and confirms whether an error of the immediately upper data DATAUP _{n + 1} is corrected. do.

In the above, when the error of the immediate upper data DATAUP _{n + 1} is not corrected, the upper corrected signal checking unit 222 outputs a high signal through the second output terminal CB, thereby selecting the upper second data selecting unit. 252 selects the upper data DATAUP _{n-1 that} was input immediately before being output from the upper data storage 233, so that the operation of the upper data interpolation unit 200 circuit performs pre-interpolation.

When the error of the upper data DATAUP _{n + 1} after WLR is corrected, the upper corrected signal checking unit 222 outputs a low signal so that the upper second data selector 252 RK upper mean interpolator 240 The average value according to equation (2) outputted from the above) is selected so that the operation of the upper data interpolation unit 200 performs the average value interpolation.

Therefore, if there is no error in the upper data inputted or corrected, it is output as it is. If there is an error of the upper data inputted and there is no error of the next higher data inputted, the interpolated average value is outputted. If there is an error and there is an error of the next higher data input, it is transposed and outputted.

On the other hand, the lower data portion and the lower correction signal is input to the lower data input unit 310 of the lower data interpolator 300, the same method as the method of processing the upper data and upper correction signal in the upper data interpolator 200 The interpolation of the lower data according to the lower correction signal is performed.

When the lower data start signal MSB-EN is input high, the lower data input unit 310 outputs the lower correction signal to the lower correction signal storage unit 321 and outputs the lower data to the lower first data selector 332. Will output

The lower correction signal storage unit 321 stores the received lower correction signal and outputs the lower correction signal to the lower correction signal checker 322 when the correction signal start signal FLAG-EN is input high. The lower correction signal checking unit 322 reads the lower correction signal to check whether an error in the lower portion of the data is corrected.

The lower correction signal checker 322 outputs a high signal through the first output terminal CA when an error is corrected when the lower correction signal is checked and the lower correction signal is low, thereby outputting the lower first data. The selector 332 outputs the lower data CATADOWN input from the lower data input unit 310.

The signal output from the lower first data selector 332 is input to the lower data storage 333 and then output to the lower second data selector 352 when the data start signal DATA-EN is input.

In this case, the lower correction signal checker 322 outputs a high signal through the second output terminal CB, so that the lower second data selector 352 is input from the lower data storage 333. To output

Therefore, when the error of the lower data is corrected and input, the input lower data (CATADOWN) is output as it is.

On the other hand, when the lower correction signal is checked, if the error is not corrected and the input lower correction signal is high, the lower correction signal checker 322 outputs a low signal through the first output terminal CA, The lower first data selector 332 outputs the lower data DATADOWN _n-1 immediately before being fed back from the lower data storage 333.

That is, instead of selecting the input sub-data (DATADOWN _n), so as to maintain the value of the sub data (DATADOWN _n-1) that was input immediately before.

The lower data storage unit 333 outputs the value of the stored lower data DATADOWN _{n-1 when the} data enable signal DATA-EN is input high.

The lower adder 341 of the lower average value interpolator 340 includes the lower data DATADOWN _n-1 immediately input from the lower data storage 333 and the lower data DATA _{n +} input next. ₁ ) Input and add and output.

The lower digit shifter 342 shifts the signal output from the lower adder 341 to the right by one bit to divide the value by 2 so as to satisfy Equation (3) below.

That is, the average value of the immediately preceding lower data DATADOWN _n-1 and the immediately subsequent lower data DATADOWN _{n + 1} are calculated and output.

At this time, the lower correction signal checking unit 322 checks the correction signal of the lower data DATADOWN _{n + 1} input immediately after and checks whether an error of the lower data DATADOWN _{n + 1} immediately after the correction is corrected. do.

In the above, when the error of the immediately lower data DATADOWN _{n + 1} is not corrected, the lower correction signal checker 322 outputs a high signal through the second output terminal CB, thereby lowering the second data selector. 352 selects the lower data DATADOWN _n-1 which was input immediately before being output from the lower data storage 333, so that the operation of the lower data interpolation unit 300 performs pre-interpolation.

In the above, when the error of the immediately lower data DATADOWN _{n + 1} is corrected, the lower correction signal checker 322 outputs a low signal so that the lower second data selector 352 lowers the average interpolator 340. By selecting the average value according to equation (2) output from the above), the operation of the lower data interpolator 300 circuit performs the average value interpolation.

Therefore, if there is no error or correction of the inputted lower data, it is output as it is. If there is an error of inputted lower data and there is no error of the next lower data inputted, the interpolated value is outputted. If there is an error and there is an error of the next lower data to be input, the interpolation is output.

By forming a separate interpolation circuit and processing the upper data and the lower data as described above, when an error occurs in the upper data or the lower data part, only the corresponding data is interpolated so that the data that does not occur the error is interpolated. Can be prevented from occurring.

That is, in FIG. 5, when a signal is input as shown in (a), since there is no error of upper data and lower data, the input signal is output as it is without interpolation.

However, when a signal is input as shown in (b) next, the data interpolation unit 200 outputs the data as it is without interpolation because the upper data does not have an error or is corrected, but the lower data DATADOWN _n does not have an error. Since it exists, the lower data interpolator 300 maintains the value of the lower data DATADOWN _{n-1 that} has been input before, and then interpolates or averages interpolates depending on whether there is an error of the lower data DATADOWN _{n + 1} that is input later. do.

Here, pre-interpolation is performed because an error also occurs in the lower data DATADOWN _{n + 1} to be input later.

Then, when a signal as shown in (c) is input, the upper data interpolator 200 has an error in the upper data DATAUP _{n + 1} and an error in the higher data DATAUP _{n + 2} input next. Since there is no average interpolation, the lower data interpolation unit 300 performs interpolation because the lower data DATADOWN _{n + 1} and the lower data DATADOWN _{n + 2} input thereafter are errors.

Then, when a signal such as (d) is input, the upper data interpolator 200 outputs the error because the error of the upper data DATAUP _{n + 2} does not exist, and the lower data interpolator 300 outputs the lower data. Since there is an error in (DATADOWN _{n + 2} ) and no error exists in the next lower data (DATADOWN _{n + 3} ), average interpolation is performed.

In addition, when a signal such as (e) is input next, the upper data interpolation unit 200 and the lower data interpolation unit 300 output the signal as it is because no error exists in the input signal.

By processing the upper data and the lower data by forming a separate interpolation circuit as described above, when an error occurs in the upper data or a part of the lower data, only the corresponding data is interpolated and the data that does not cause the error is interpolated Can be prevented from occurring.

Therefore, the effect of the present invention operating as described above is that when an error occurs in the data read from the compact disc player, a plurality of signal interpolation is performed for the uncorrected error even though the error correction block is corrected. The interpolation block is constructed to interpolate the upper and lower portions of the data separately to provide an interpolation circuit for a compact disc player with less interpolation error, which reduces the error in interpolation.

Claims (10)

Data input means for receiving and storing data and a correction signal of the data from the outside, and outputting the data and the correction signal when the data input signal is input high; Upper data interpolation means for receiving upper data and its correction signal from the data input means when the upper data start signal is inputted, and outputting the upper data by pre-interpolation or average value interpolation according to whether the correction signal is present; When the lower data start signal is input, the lower data interpolation means receives lower data and its correction signal from the data input means and outputs the lower data by interpolation or average value interpolation or output according to the correction signal. The upper data interpolation means includes: upper data input means for receiving and storing upper data and a correction signal of the data from the data input means, and outputting data and a correction signal when the upper data input signal is input high; After receiving and storing the correction signal of the upper data outputted from the upper data input means, when the correction signal start signal is inputted as high, the stored correction signal is read and a signal according to whether or not an error of the upper data is corrected. Upper correction signal processing means for outputting; Upper pre-interpolation means for storing upper-order data outputted from the upper-order data input means, and outputting data or performing pre-interpolation depending on whether a signal is output from the upper correction signal processing means; An interpolation error comprising an upper output signal selecting means for operating in accordance with a signal output from the upper correcting signal processing means and selecting and outputting one signal from signals input from the upper pre-adding means and the upper mean interpolating means; Interpolation circuit for compact disc players. The upper correction signal processing means according to claim 1, wherein the higher correction signal processing means receives and stores a correction signal of the upper data output from the upper data input means, and when the correction signal start signal is high, the stored upper correction signal is stored. Upper correction signal storage means for outputting; It is determined whether the error of the upper data is corrected by receiving the upper correction signal outputted from the upper correction signal storage means, and accordingly outputting the data as it is, outputting by pre-interpolation or average interpolation. An interpolation circuit for a compact disc player with low interpolation error, characterized in that it comprises an upper correction signal checking means for outputting a signal for controlling whether to output. 2. The apparatus as claimed in claim 1, wherein the upper pre-interpolation means (230) includes: upper first inverting means (231) for receiving a signal output from the potential correction signal processing means (220) and inverting and outputting the signal; In response to the signal output from the upper correction signal processing means 220 and the signal output from the upper first inverting means 231, the data output from the upper data input means 210 and the data input immediately before Upper first data selecting means 232 for selecting and outputting one; Compact data having low interpolation error, characterized in that it comprises the upper data storage means 233 for storing data output from the upper first data selecting means 232 and outputting the data when a data start signal is input. Interpolation circuit for disc player. The method of claim 1, wherein the upper average interpolation means 240 adds upper data output from the upper data input means 210 and data output from the upper pre-interpolation means 230, and outputs them. 241; Interpolation for compact disc player with low interpolation error, characterized in that the upper position shifting means 242 for shifting the position of the signal output from the upper adding means 241 bit by bit to output by dividing by 1/2. Circuit. 2. The apparatus of claim 1, wherein the upper output signal selecting means (250) comprises: upper second inverting means (251) for receiving a signal output from the correction signal processing means (220) and inverting and outputting the signal; It operates according to the signal output from the upper correction signal processing means 220 and the signal output from the upper second inverting means 251, so that the data output from the upper pre-interpolation means 230 and the upper average value interpolation means ( And an upper second data selecting means (252) for selecting and outputting one of the data output from the data output from the data output signal. The lower data interpolation means (300) is configured to receive and store lower data and a correction signal of the data from the data input means (100), and the lower data input signal is inputted high. Lower data input means 310 for outputting data and a correction signal; If the correction signal of the lower data outputted from the lower data input means 310 is received and stored, and the correction signal start signal is input high, the stored correction signal is read to determine whether or not the error of the lower data is corrected. Lower correction signal processing means 320 for outputting a signal according to the present invention; Lower pre-interpolation means for storing the lower data output from the lower data input means 310 and outputting data or pre-interpolating the data according to whether the signal is output from the lower correction signal processing means 320 ( 330; A lower average value interpolation means (340) for receiving a signal output from the lower data input means (310) and the lower pre-interpolation means (330) and performing interpolation of the average value; Lower output signal selection means for operating according to the signal output from the lower correction signal processing means 320 and selecting and outputting one signal from the signals output from the lower pre-interpolation means 330 and the lower average value interpolation means 340. An interpolation circuit for a compact disc player with low interpolation error, characterized in that it comprises (350). The lower correction signal processing means 320 is configured to receive and store a correction signal of lower data output from the lower data input means 310, and then input a correction signal start signal high. Correction signal storage means 321 for outputting the lower correction signal stored therein; The lower correction signal storing unit 321 receives the lower correction signal outputted from the lower correction signal to determine whether the lower data error has been corrected, and accordingly outputs the data as it is, transpose interpolation or output the average value interpolation. An interpolation circuit for a compact disc player with low interpolation error, characterized in that it comprises a lower correction signal checking means (323) for outputting a signal for controlling whether or not to output the signal. The apparatus of claim 6, wherein the pre-interpolation means (330) comprises: a lower first inverting means (331) for receiving a signal output from the lower correction signal processing means (320) and inverting and outputting the signal; In response to the signal output from the lower correction signal processing means 320 and the signal output from the lower first inverting means 331, the data output from the lower data input means 310 and the data input immediately before Lower first data selecting means 332 for selecting and outputting one; Compact data having low interpolation error, characterized in that it comprises the lower data storage means 333 for storing the data output from the lower first data selecting means 332 and outputting the data when a data start signal is input. Interpolation circuit for disc player. The method of claim 6, wherein the lower average interpolation means 340 adds and outputs the lower data output from the lower data input means 310 and the data output from the lower pre-interpolation means 330. 341; Interpolation for compact disc player with low interpolation error, characterized in that it consists of lower digit shifting means 342 for shifting the digit of the signal output from the lower adding means 341 by one bit and dividing by 1/2. Circuit. 7. The apparatus of claim 6, wherein the lower output signal selecting means (350) comprises: lower second inverting means (351) for receiving a signal output from the correction signal processing means (320) and inverting and outputting the signal; Operating according to the signal output from the lower correction signal processing means 320 and the signal output from the lower second inverting means 351, the data output from the lower pre-interpolation means 330 and the lower average value interpolation means ( An interpolation circuit for a compact disc player with less interpolation error, characterized in that it comprises a lower second data selecting means (352) for selecting and outputting from the data output from 340.