JP2738659B2 - Encoding method, encoding device, and decoding device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to digital information transmission.
Method and coding apparatus for error correction of information in
And encoding / decoding devices, in particular, perform three-system encoding.
The encoding method, the encoding device, and the encoding / decoding device
It is about. [0002] Generally, a magnetic recording / reproducing apparatus (VTR) is used.
Used PCM recorder and CD (compact disk)
Obtain high-quality playback sound for digital audio equipment
Therefore, an error correction code is used. This error correction
Coding and decoding of codes are performed after information is temporarily stored in memory.
Done in FIG. 1 is a memory showing the configuration of a conventional triple code.
In the figure, in the figure, D represents the k2 symbol in the x direction,
K1 symbol in the z direction and k3 symbol in the z direction
Indicates the information symbol area of k1 × k2 × k3
Where P, Q, and R are d1 symbols in the y direction and x
D2 symbol in z direction and d3 symbol in z direction
A check symbol area is shown, and (n1,
k1, d1 + 1), (n2, k2, d2 + 1) and (n3
, K3, d3 +1).
Small distance (d1 +1) x (d2 +1) x (d3 +1)
Are the symbols of n1.times.n2.times.n3 symbols. Where n
1 = k1 + d1, n2 = k2 + d2, n3 = k3 + d3
Where a in (a, b, c) is the code length and b is the information symbol
The number c indicates the minimum distance. [0004] k1 × k2 × generated during the unit time T
The information symbol of the k3 symbol is temporarily stored in the memory.
And then encoded. Using the following coordinates, x = x1, y
= Y1, z = z1 is represented by D (x1, y1, z
1), the P check symbol is p (x1, y1, z1),
Let Q (x1, y1, z1) be the Q check symbol and R check
Symbol is represented by r (x1, y1, z1).
The procedure for conversion will be described. First, d1 check symbols of the P code
Satisfies equation (1) from the information symbols in the memory.
Generated. [0006] [0007] The encoding of the P code by the equation (1) is performed at x = 1 to k.
2, z = 1 to k3, k2 × k3 correction block
Then, a P code of the block is generated and the processing ends. Next, encoding of a Q code is performed. Q sign
Encoding is an information symbol and P check generated by P encoding
Perform d2 checks on the symbols and satisfy equation (2).
A lock symbol is generated. [0009] However, the expression (2) is an information symbol of 1 ≦ y ≦ k1.
In the formula of the rule area, a P check symbol of k1 + 1 ≦ y ≦ n1
D (x, y, z) in equation (2) is p (x, y,
z). The encoding by the equation (2) is as follows: y = 1 to n
1, z = 1 to k3, n1 × k3 correction block
Then, a Q code of the block is generated, and the processing ends. [0011] The R code is obtained by checking d3 check codes by the equation (3).
Symbols are added in the z direction. However, y thin of P and Q
In the Vol domain, D (x, y, z) is p (x, y, z),
Replaced by q (x, y, z). ## EQU3 ## The encoding by the equation (3) is as follows: x = 1 to n2, y
= 1 to n1 and the n1 × n2 correction block
Generate and complete the R code. Encoded as above
The information obtained is obtained by converting n3 symbols in the z direction into data for one frame.
Transmitted as data. FIG. 2 shows an example of a frame format.
Is a synchronizing signal, A is additional information, and B is n3 series in the z direction in FIG.
Indicates information symbols and check symbols consisting of symbols
The code shown in FIG. 1 is transmitted in n1 × n2 frames.
Is done. On the other hand, on the receiving side, the transmitted n1 × n2
Figure 1 shows the information symbol and the check symbol of the frame.
The data is stored in the memory in a memory arrangement and decrypted. Decryption is first performed by R
Find the syndrome vector SR of the code by equation (4).
You. [Equation 4] Where u (x, y, z) is the arrangement shown in FIG.
Is the received symbol stored in the memory and the transmission symbol
Bol is an error. In decoding R, vector SR = vector 0
In the case of, it is determined that there is no error, and an error is detected for each block.
The flag FR is set to “0”, and the vector S ≠ vector
At 0, "1" is set. In the decoding of Q, the syndrome shown by equation (5)
Using the vector SQ and the detection flag FR for R decoding
The flag with the flag set is corrected as lost.
And correct up to d2 erasures (errors) in one correction block
Correct. (Equation 5) Corrected, or vector SQ = vector
If it is determined that there is no error in the
Set "0" to the error detection flag FQ of Q and cannot correct
If it is determined that the function is not possible, "1" is set. Next, the decoding of P is performed in the same manner as
To the drome vector SP and the detection flag FQ of the Q
Perform more corrections and correct up to d1 disappearances
In the case of correction or when vector SP = vector 0
If the error detection flag FP is set to "0",
In this case, "1" is set. [Equation 6] The feature of this code is that n1 × n2 shown in FIG.
× n3 symbols are triple-encoded
According to this, according to this, there is no error in the check symbol.
Even if information errors remain, as with information symbols,
Is corrected by each of the P, Q, and R codes.
R → Q → P → R → Q ... using error detection flag
Return decoding is possible, and decoding with higher correction ability is performed.
be able to. FIG. 3 shows each parameter of the P and Q codes of FIG.
N1 = n2 = 6, k1 = k2 = 4, d1 = d2 =
2 shows a memory diagram of z = 1 when 2. This code is P,
Q is sign of minimum distance 3 and occurred in x direction or y direction
Up to two erasures can be corrected. q (5,5,
1), q (5, 6, 1), q (6, 5, 1), q (6,
6, 1) indicates that both P and Q check symbols are P, Q
The symbol required to be included in the
Used for correcting symbols. Although not shown, P and
The same applies to the relationship between R, Q and R check symbols. [0026] The conventional triple code is
It can be decoded repeatedly because it is configured as
It is possible to improve the positive ability, but also check symbols
The disadvantage is that the redundancy is large because
Was. In FIG. 3, the information symbols are divided into 16 frames.
On the other hand, the check symbol is 20 frames, of which
4 frames are for correcting the check symbol
is there. The present invention has the disadvantages of the prior art as described above.
This was done to eliminate the
Encoding method for digital information transmission
Code with low redundancy without reducing the minimum distance
Or a large minimum distance without increasing redundancy,
A coding method that can obtain a code with improved correction capability
It is intended to provide law. Further, the present invention transmits information in a triple code configuration.
Encoding device and code for digital information transmission
In the decoding / decoding device, the
Codes with small lengths or the minimum without increasing redundancy
It is possible to obtain a code with a large small distance, that is, a code with improved correction capability.
To provide an encoding device and an encoding / decoding device capable of
It is intended to be. [0029] Coding according to the present invention
The method is that each plane consists of k1 × k2 data symbols.
All data symbols in the data planes from 1 to k3
, The first, second, and third codes of the three series
In an encoding method for encoding data symbols three times,
The first and second encodings are completed in each data plane.
Each code word in the third encoding is the first to k3
Up to several data symbols in each plane up to
And the plurality of data symbols in the same plane are respectively
Belong to the first and second different code words
You. Further, the encoding method according to the present invention
In the encoding method, the data symbol to be encoded is
Includes dummy data. Further, the encoding apparatus according to the present invention has
Error correction of k1 × k2 × k3 data symbols
Encoded with the first, second and third sequence codes for positive
In the encoding device that outputs the data symbol
Memory means for storing the desired data symbol
To generate a memory address for reading from
Memory address generating means, read from the memory means.
Of the data symbol
Codes for performing encoding of three different first, second, and third sequences
Encoding means, wherein each plane has k1 × k2
Data symbols from 1 to k3
For each of the data planes,
, And the third encoding above raises all codewords
A plurality of data in each of the first to k3 data planes.
Data symbols and in the same data plane
Are different from the first and second codes, respectively.
Belongs to the following codeword: An encoding / decoding apparatus according to the present invention
Is the input k1 × k2 × k3 data symbols
For the error correction, the first, second and third
And output it, encoded with the three series of codes.
Input data symbol, correct error and output
In an encoding / decoding device, an input data symbol is stored.
Memory means for storing desired data symbols
Memory address to generate a memory address to read from
Dress generation means and data read from the memory means.
Data symbols for error correction
2. Encoding means for encoding the third different three sequences
And the three series of coded data symbols,
Error correcting means for correcting an error in the data symbol.
The encoding means, wherein each plane has k1 × k2 data
Data planes from the first to the k3th data
For each, doubly encoded with the first and second codes
And the third encoding replaces all codewords with the first
Multiple data symbols in each data plane from
The plurality of data in the same data plane.
Symbols are respectively different codes of the first and second codes.
Belongs to a word. In the encoding method according to the present invention, each flat
The first to the second planes are composed of k1 × k2 data symbols.
For all data symbols in the data plane up to k3,
All the data symbols with the first, second and third three-series codes
A three-dimensional encoding method,
2 is completed at each data plane and the third code
Each codeword in the conversion is represented by each of the first to k3
Consists of multiple data symbols in a plane and is on the same plane
, The plurality of data symbols in
Since they belong to two different codewords, the redundancy
If you make the same, you can improve the correction ability,
If the correction capability is the same, the redundancy can be reduced.
And a plurality of codes constituting one code word of the third code.
Number of data symbols are different from each other by the first and second different symbols.
To prevent the deterioration of the correction capability during decoding.
Encoding can be performed. In the encoding method according to the present invention,
Is the data to be encoded in the encoding method described above.
Since dummy data is included in the symbol,
Code with the same configuration even if the number of data symbols to be encoded changes
Can be performed. In the encoding apparatus according to the present invention,
Is the input k1 × k2 × k3 data symbols
For the error correction, the first, second and third
In the encoding device that encodes and outputs the input data,
Memory means for storing data symbols and a desired data symbol
Memory address for reading the file from the memory means.
Memory address generating means for generating, and the memory means
The data symbols read from the
Encoding of the first, second and third different three sequences
Encoding means, wherein each plane has
1st to k3th data consisting of k1 × k2 data symbols
For each of the data planes up to
The encoding is performed twice with the code, and the third encoding is performed for all
The codeword is copied in each of the first to k3 data planes.
Consists of several data symbols and in the same data plane
Are respectively assigned to the first and second data symbols.
Are different from each other,
If the length is the same, the correction ability can be improved.
If the correction capability is the same, the redundancy can be reduced.
And can form one codeword of the third code.
The plurality of data symbols are different from each other in the first and second data symbols.
Prevents deterioration of correction capability during decoding because it belongs to a codeword
Encoding that can be performed. The encoding / decoding device according to the present invention
In the following, the input k1 × k2 × k3 data synths
The bol is first, second, and third sequences for error correction.
, And outputs the encoded data.
Input data symbol, correct error and output
In an encoding / decoding device,
Memory means for storing, and memory for storing desired data symbols
Memo to generate memory address for reading from the means
Read from the memory means,
For the data symbol
Codes for performing encoding of three different first, second, and third sequences
Encoding means, and the three series of encoded data symbols.
Error correcting means for correcting an error in the data symbol.
And the encoding means, wherein each plane has k1 × k2 planes.
Data from the first to the k3th data symbol
For each of the planes, doubly with the first and second signs
Encoding, and the third encoding converts all codewords to the above
A plurality of data in each of data planes 1 to k3
A plurality of symbols in the same data plane.
The data symbols are different from the first and second codes, respectively.
The same redundancy,
If you do, you can improve the correction ability,
If the same is used, the redundancy can be reduced, and
And a plurality of data constituting one code word of the third code.
Symbols belong to the first and second different codewords from each other
Therefore, it is possible to prevent the correction ability from deteriorating during decoding.
Wear. An embodiment of the present invention will be described below with reference to the drawings.
You. 4 to 7 show an encoding method according to an embodiment of the present invention.
FIG. 4 shows the redundancy of the P code in FIG.
It is applied when lowering. The P code in FIG. 3 is 2 for each of x = 1 to 6.
One check symbol is added, and (6, 4,
3) In FIG. 4, x = 1 to 6
Is provided with one check symbol area for each of
The (10,8,3) code is composed of columns. P (1,5,1) and P (2,5,1) are x
= 1 and x = 2 to satisfy equation (7)
Generated. P (3,5,1), P (4,5,1)
Are similarly generated from the information symbols of x = 3 and x = 4.
You. [Mathematical formula-see original document] The Q and R codes are the same as in the prior art. As is apparent from a comparison between FIG. 3 and FIG.
The check symbols have been reduced from 20 to 14. Immediately
That is, the area of 6 frames is reduced, and the redundancy is reduced.
You. In addition, even with such a configuration, one revision of the P code
The minimum distance is 3 in the normal block, which is the same as the conventional example in FIG.
Up to two disappearances can be corrected. Here, in this embodiment, Q
Synchronization of the same block of P code with the same correction block of code
Check the Q code because two bols will be included
The P code does not hold in the symbol area. For this reason,
In the case of reverse decoding, decoding is performed four times, ie, R → Q → P → R.
Has the same correction capability as before, but more
Then, if an error occurs in the check symbol of Q, the capability
Will be inferior. However, when applied to the system
Infinite repetition is impossible,
Since the degree of improvement saturates, there is no practical problem. FIG. 5 shows a block diagram of encoding and decoding.
11 is an input / output terminal for information symbols, and 12 is a menu.
Mori, 19 is composed of a multiplier, an adder and a register group
Encoding / decoding circuit such as Reed-Solomon code, 14
An x address generation circuit 15 for determining the value of the x axis in FIG.
The y-address generation circuit 16 that determines the value of the axis and the value of the z-axis are determined.
And a z-address generating circuit 17 for encoding,
First memory address that specifies a memory address at the time of decryption
Circuit 18 is connected to the first memory address circuit 14
The same configuration is used to write and read information symbols.
Memory address circuit for designating memory address, 1
3 is the output of the first memory address circuit 14 and the second memory
Select one of the outputs of the readdress circuit 18 and store it in the memory.
12 shows a selector for supplying the selector 12. Next, the operation at the time of recording will be described first. Entering
The information symbol input from the input terminal 11 is
The x-axis, y-axis, z
The value of the axis is determined and stored at a predetermined address in the memory 12.
Written. Next, the encoding of the P code will be described with reference to FIG.
You. x = y = z = 1 is applied to the first memory address circuit 14.
Is supplied to the memory 12 through the selector 13 and D
(1,1,1) is taken into the encoding / decoding circuit 19
You. Further, the output of the y address generation circuit 16 is advanced one by one.
D (1,2,1), D (1,3,1), D (1,
4, 1) is read out and supplied to the encoding / decoding circuit 19.
You. Next, the output of the x address generation circuit 15 is advanced by one, and x
= 2 and the output of the y-address generation circuit 16 from 1 to 4
And read D (2,1,1) to D (2,4,1)
Then, the data is supplied to the encoding / decoding circuit 19. Encoding / decoding
The conversion circuit 19 determines whether the above-mentioned eight information symbols have been input.
Based on Eq. (7), check symbol p (1,5,1),
Generate p (2,5,1) and that of the check symbol
Each is addressed by the first memory address circuit 14.
And stored in the memory 12 at the position shown in FIG.
You. Similarly, each of x = 3 and x = 4 in the y direction
From these four information symbols, p (3,5,1), p
(4, 5, 1) is generated, stored in the memory 12, and
The encoding of P at = 1 is completed. This operation is called z =
By performing for 1, 2,..., K3,
The encoding of the signal is completed. The encoding of the Q code is as follows.
Done. That is, the four information symbols in each row in FIG.
Designated by the output from the memory address circuit 14,
The symbol is taken into the encoding / decoding circuit 19,
In circuit 19, based on equation (2) (where d2 = 2, k2 = 4,
n2 = 6) A check symbol is generated, which is
12 is stored. The R code, like the P code and the Q code, has the first
The memory address is controlled by the memory address circuit 14
A check symbol is added in the z direction. When encoding of P, Q, and R is completed, input / output
The information symbol in the memory 12 and the check
The symbol is a memory address in the first memory address circuit 14.
Are controlled and output sequentially. On the other hand, at the time of decoding, the received symbol is
11 and temporarily stored in the memory 12, and stored in the equations (4), (5) and (6).
The received symbols required for the syndrome calculation are stored in the first memory
Encoding / decoding by performing address control in the dress circuit 14
Is taken into the conversion circuit 19. In the encoding / decoding circuit 19,
It has a register that stores the detection flag.
The error pattern of erasure is calculated using lag and syndrome.
And an erroneous pattern is assigned to an erroneous received symbol in the memory 12.
The correction is made by adding Then, R → P → Q or iterative decoding
When the error correction is completed, the second memory address round
The memory address is controlled by the path 18 and the input / output terminal 11
Only information symbols are output. In this embodiment, the P check
In encoding a symbol, one codeword is replaced with a conventional one.
Since it consists of two correction blocks, the minimum distance
Separation, that is, to reduce redundancy with the same correction capability
be able to. In other words, do not increase redundancy.
Correction ability can be improved. Note that the above embodiment
In the above, the P code is composed of two columns in the same plane.
May be composed of two or more planes if
No. FIG. 7 shows an information synth on two planes of z = 1 and z = 2.
It is a figure for explaining the example at the time of using a bolt.
In FIG. 7, 4 arranged in the y direction at x = 1 to 4 at z = 1
Information symbols and z = 2 and x = 1 to 4 in the y direction.
Combination that constitutes a P code with four information symbols
Are (z = 1, x = 1, z = 2, x = 2), (z =
1, x = 2, z = 2, x = 3), (z = 1, x = 3, z
= 2, x = 4), (z = 1, x = 4, z = 2, x = 1)
It has become. (Z = 1, x = 1, z = 2, x = 2)
For example, p (1,5,1) and p (2,5,2) are
Generated to satisfy equation (8). [Equation 8] The embodiment shown in FIG.
It has a remarkable effect in some cases. That is, Q of z = 1 and y = 1
It is assumed that an error detection flag is added to the code. At this time,
(7) Consists of x = 1 and x = 2 on the plane of z = 1 shown by the equation
D (1,1,1) and D (2,1,1) in the correction block
The P code has up to two symbols.
The error can be corrected because the erasures in are correctable. I
However, the error detection flag is also provided for the Q code of z = 1 and y = 2.
If you are standing, 4 symbols will be lost and it is impossible to correct
Become. On the other hand, as shown in equation (8), one codeword is 2
If it is composed of planes, D (1,1,1) and D (1,1,1)
Only the erasure of two symbols (1, 2, 1) is used as a correction block.
Does not occur and can be corrected in this case. As described above, the P code and the Q code are on the same plane.
Is added to one correction block of Q,
Detection flag is 2 erasures in P code, but different plane
By constructing a P code with, only one erasure is needed, and correction capability
Can be improved. Also, reduce the redundancy of Q code
Of the symbols constituting one correction block of the Q code
Different P-codes are not included in one correction block.
Code over the plane of the z value
Thus, a similar effect can be obtained. In the above embodiment, the triple
The example of the code has been described, but the double code, quadruple, quintuple,
, And the same applies to the n-fold code. FIG. 6 shows a three-dimensional array as shown in FIG.
Of the information symbol block, except for the Q code,
The example which applied the code is shown. And in this embodiment
Is (n3, k3, d3 +
1) A conventional R code constituting the code is indicated by a dotted line S
From three R correction blocks, (3n3, 3k3, 3d3 +
1) Constituting code. Therefore, compared to the conventional one,
Same redundancy, larger minimum distance, better correction
Would be better. The above R code is also used for the P code.
By increasing the correction capability by configuring the code
Can be Also, if the correction capability is the same,
The length can be reduced. Also, it is indicated by a dotted line portion L in FIG.
The code is composed of multiple blocks in the form of a broken line
The same applies to the case. As described above, the encoding according to the present invention
According to the method, each plane has k1 × k2 data symbols
All data planes from the first to k3 data planes
The first, second, and third sequences of codes
In the encoding method of encoding all data symbols three times
The first and second encodings are completed on each data plane.
And each code word in the third encoding is the first
From the multiple data symbols in each plane from
And the plurality of data symbols in the same plane are
Respectively belonging to the above first and second different codewords
The correction capability is improved when the redundancy is the same.
Redundancy if the correction capability is the same
Can be reduced, and one of the third symbols
The plurality of data symbols that make up the word
1, correction in decoding because it belongs to the second different codeword
The ability to perform encoding that can prevent performance degradation
There is fruit. According to the encoding method of the present invention,
In the encoding method described above, the data to be encoded
Since dummy data is included in the symbol,
Code with the same configuration even if the number of data symbols to be encoded changes
And simplify the system.
There is an effect that can be done. According to the encoding apparatus of the present invention,
For example, k1 × k2 × k3 input data symbols
For the error correction, the first, second and third
In the encoding device that encodes and outputs the input data,
Memory means for storing data symbols and a desired data symbol
Memory address for reading the file from the memory means.
Memory address generating means for generating, and the memory means
The data symbols read from the
Encoding of the first, second and third different three sequences
Encoding means, wherein each plane has
1st to k3th data consisting of k1 × k2 data symbols
For each of the data planes up to
The encoding is performed twice with the code, and the third encoding is performed for all
The codeword is copied in each of the first to k3 data planes.
Consists of several data symbols and in the same data plane
Are respectively assigned to the first and second data symbols.
Are different from each other,
If the length is the same, the correction ability can be improved.
If the correction capability is the same, the redundancy can be reduced.
And can form one codeword of the third code.
The plurality of data symbols are different from each other in the first and second data symbols.
Prevents deterioration of correction capability during decoding because it belongs to a codeword
There is an effect that possible encoding can be performed. The encoding / decoding device according to the present invention
According to the data input k1 × k2 × k3 data symbol
For error correction, the first, second, and third
Coded with a code and output.
Input data symbols, correct errors and output
Encoding / decoding apparatus stores input data symbols.
Memory means for storing the desired data symbols
A memory that generates a memory address for reading from a stage
Address generating means, read from the memory means
For the data symbol, the first,
Encoding method for encoding the second and third different three sequences
Input the stage and the three series of coded data symbols
Error correcting means for correcting an error in the data symbol
And the encoding means comprises k1 × k2 planes in each plane.
Data planes from 1 to k3 consisting of data symbols
For each of the surfaces, the first and second reference numerals are used for the double reference.
And the third encoding converts all codewords to the
A plurality of data systems in each data plane from 1 to k3
And the plurality of data in the same data plane.
Data symbols have different first and second codes, respectively.
Since they belong to codewords,
Can improve the correction ability,
If they are the same, the redundancy can be reduced, and
And a plurality of data constituting one code word of the third code.
Symbols belong to the first and second different codewords from each other
Therefore, it is possible to prevent the correction ability from deteriorating during decoding.
There is a clear effect.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a memory diagram showing the configuration of the present invention and a conventional triple code. FIG. 2 is a diagram showing a conventional frame format when transmitting a triple code. FIG. 3 is a configuration diagram of P and Q codes constituting a conventional triple code. FIG. 4 is a code configuration diagram according to an embodiment of the present invention. FIG. 5 is a block diagram of encoding / decoding according to an embodiment of the present invention. FIG. 6 is a code configuration diagram when a double code is applied to a three-dimensional array of information symbols according to an embodiment of the present invention. FIG. 7 is a diagram illustrating a code configuration according to an embodiment of the present invention. [Description of Code] D information symbol area, P, Q, R check symbol area, S synchronization signal, A additional information, B information, check symbol, 12 memories, 13 selector, 14 first memory address generation circuit, 18 2 memory address generating circuit, 19 encoding / decoding circuit.

   ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Atsuhiro Yamagishi               325 Kamimachiya, Kamakura City, Kanagawa Prefecture Mitsubishi Electric               Kiki Co., Ltd. (72) Inventor Yoshinobu Ishida               1 Baba Zujo, Nagaokakyo-shi, Kyoto Mitsubishi Electric               Kiki Co., Ltd. Electronic Product Development Laboratory                (56) References JP-A-58-168346 (JP, A)                 JP-A-60-69917 (JP, A)                 JP-A-59-2214 (JP, A)                 JP-A-59-202750 (JP, A)                 JP-A-54-34611 (JP, A)

Claims (1)

(57) [Claims] For all the data symbols in the first to k3 data planes, each plane of which is composed of k1 × k2 data symbols, all the data symbols are tripled by the first, second, and third series of codes. In the encoding method for encoding, the first and second encodings are completed in each data plane, and each codeword in the third encoding is a plurality of codewords in each of the first to kth planes. A coding method comprising: a plurality of data symbols; wherein the plurality of data symbols in the same plane belong to the first and second different codewords, respectively. 2. The encoding method according to claim 1, wherein the data symbol to be encoded includes dummy data. 3. A memory device for storing input data symbols in an encoding device for encoding and inputting k1.times.k2.times.k3 data symbols with first, second, and third sequences of codes for error correction. A memory address generating means for generating a memory address for reading a desired data symbol from the memory means; and a data symbol read from the memory means for the first and second data errors for error correction. , Encoding means for encoding the third different three sequences, wherein the encoding means performs encoding on each of the first to k3 data planes, each plane comprising k1 × k2 data symbols. , Perform double encoding with the first and second codes, and perform the third encoding with all the code words in the first to k3
Up to a plurality of data symbols in each data plane, and the plurality of data symbols in the same data plane belong to different codewords of the first and second codes, respectively. Encoding device. 4. The input k1 × k2 × k3 data symbols are encoded and output with first, second, and third sequences of codes for error correction, and the data encoded with the three sequences of codes are output. In an encoding / decoding device for inputting symbols, performing error correction and outputting, a memory means for storing input data symbols, and a memory address generating means for generating a memory address for reading a desired data symbol from the memory means Coding means for coding the first, second, and third different three sequences for error correction on the data symbol read from the memory means; Error correcting means for inputting the data symbol and correcting an error in the data symbol, wherein the encoding means comprises a first or second data symbol in which each plane is composed of k1 × k2 data symbols. Each of the data planes from (k3) to (k3) is double-encoded with the first and second codes. In the third encoding, all codewords are converted from the first to k3th codes.
Up to a plurality of data symbols in each data plane, and the plurality of data symbols in the same data plane belong to different codewords of the first and second codes, respectively. Encoding / decoding device.