KR0178967B1 - Fabricating method of mosfet - Google Patents
Fabricating method of mosfet Download PDFInfo
- Publication number
- KR0178967B1 KR0178967B1 KR1019900018186A KR900018186A KR0178967B1 KR 0178967 B1 KR0178967 B1 KR 0178967B1 KR 1019900018186 A KR1019900018186 A KR 1019900018186A KR 900018186 A KR900018186 A KR 900018186A KR 0178967 B1 KR0178967 B1 KR 0178967B1
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- Prior art keywords
- film
- oxide film
- gate
- photosensitive agent
- forming
- Prior art date
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- 238000000034 method Methods 0.000 title description 13
- 239000003795 chemical substances by application Substances 0.000 claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 10
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 7
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 7
- 238000002955 isolation Methods 0.000 claims abstract description 6
- -1 nitrogen ions Chemical class 0.000 claims abstract description 6
- 239000004065 semiconductor Substances 0.000 claims abstract description 5
- 238000000151 deposition Methods 0.000 claims abstract description 3
- 238000000059 patterning Methods 0.000 claims abstract description 3
- 150000004767 nitrides Chemical class 0.000 abstract description 15
- 238000010438 heat treatment Methods 0.000 abstract description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 3
- 230000010354 integration Effects 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 241000293849 Cordylanthus Species 0.000 description 1
- 210000003323 beak Anatomy 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 239000003504 photosensitizing agent Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Abstract
본 발명은 모스 트랜지스터 제조방법에 관한 것으로, 반도체기판의 필드영역에 선택적으로 필드산화막을 형성하는 공정콰, 상기 전표면 위에 감광제를 증착하고 소자격리영역을 제거하여 제거된 부분의 반도체 기판에 질소이온을 주입하는 공정과, 열처리하여 질소이온이 주입된 부분에 질화막을 형성하는 공정과, 게이트 산화막, 게이트막을 형성하고 감광제를 사용하여 상기 게이트 산화막, 게이트막을 패터닝하는 공정을 차례로 실시하여서 이루어진다.The present invention relates to a method of manufacturing a MOS transistor, comprising: forming a field oxide film selectively in a field region of a semiconductor substrate; depositing a photoresist on the entire surface and removing the device isolation region; And a step of forming a nitride film in a portion where nitrogen ions are implanted by heat treatment, forming a gate oxide film and a gate film, and patterning the gate oxide film and the gate film using a photosensitive agent.
Description
제1도는 종래의 MOS 트랜지스터 공정 단면도.1 is a cross-sectional view of a conventional MOS transistor process.
제2도는 종래의 다른 실시예를 나타낸 공정 단면도.2 is a process cross-sectional view showing another conventional embodiment.
제3도는 본발명의 MOS 트랜지스터 공정 단면도.3 is a cross-sectional view of a MOS transistor process of the present invention.
제4도는 본발명의 다른 실시예의 MOS트랜지스터 공정 단면도.4 is a cross-sectional view of a MOS transistor process according to another embodiment of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 실리콘기판 2 : 산화막1 silicon substrate 2 oxide film
3, 7 : 질화막 4, 6, 10, 11 : 감광제3, 7: nitride film 4, 6, 10, 11: photosensitizer
5 : 필드 산화막 8 : 게이트 산화막5: field oxide film 8: gate oxide film
9 : 게이트막 12 : N-웰9 gate film 12 N-well
본 발명은 모스(MOS) 트랜지스터 제조방법에 관한 것으로, 특히 기판의 특정영역에 이온을 주입시켜 열처리하므로 격리 질화막을 형성하기에 적당하도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a MOS transistor, and in particular, is suitable for forming an isolation nitride film by implanting ions into a specific region of a substrate and performing heat treatment.
종래에는 제1도(a)에 도시된 바와 같이 실리콘기판(1) 위에 산화막(2), 질화막(3)을 차례로 형성하고 (B)와 같이 상기 질화막(3) 위에 감광제(4)를 덮은 후 노광 및 현상공정으로 활성영역에만 남도록 감광제(4)를 패터닝한다.Conventionally, as shown in FIG. 1A, an oxide film 2 and a nitride film 3 are sequentially formed on the silicon substrate 1, and the photoresist 4 is covered on the nitride film 3 as shown in (B). The photosensitive agent 4 is patterned so that only the active region remains in the exposure and development processes.
다음에 (C)와 같이 제거되지 않은 감광제(4)를 이용하여 질화막(3)을 식각하고 감광제(4)를 제거한 후 (D)와 같이 필드영역 및 소자간의 격리영역에 필드산화막(5a)을 형성하고 질화막(3)을 제거하므로 (E)와 같이 형성되게 하였다.Next, the nitride film 3 is etched using the photoresist 4 not removed as shown in (C), the photoresist 4 is removed, and then the field oxide film 5a is applied to the field region and the isolation region between the elements as shown in (D). And the nitride film 3 was removed, thereby forming it as shown in (E).
그리고 (F)와 같이 게이트 산화막(8), 게이트막(9)을 차례로 형성한 후 감광제(10)를 증착한 후, 게이트영역을 정의하여 감광제(10)를 선택적으로 식각하였다.Then, as shown in (F), the gate oxide film 8 and the gate film 9 were sequentially formed, and then the photosensitive agent 10 was deposited. Then, the gate region was defined to selectively etch the photosensitive agent 10.
또한, (G)와 같이 게이트 산화막(8), 게이트막(9)을 선택적으로 식각하고 감광제(10)를 제거하므로 필드산화막(5a)에 의해 후공정시 형성되는 복수의 모스 트랜지스터가 격리되게 하였다.In addition, as shown in (G), the gate oxide film 8 and the gate film 9 are selectively etched and the photosensitive agent 10 is removed to isolate the plurality of MOS transistors formed during the post-process by the field oxide film 5a. .
제2도는 상기 제1도(c)(d)의 공정의 다른 실시예로 질화막(3) 일부를 덮도록 감광제(11) 도포 후 이온주입하여 액티브영역에 N-웰(12)을 형성하여 후공정을 진행하는 것을 나타낸 것이다.FIG. 2 is another embodiment of the process of FIG. 1 (c) (d). After the photosensitive agent 11 is applied to cover a portion of the nitride film 3, ion implantation is performed to form the N-well 12 in the active region. It shows the progress of the process.
그러나, 상기와 같은 종래기술에 있어서는 복수의 모스 트랜지스터를 격리시키기 위하여 두꺼운 필드산화막(5a)을 성장시켜야 하는데 이때 새부리(Bird's beak)형상이 필연적으로 형성되어 결국 집적도를 저하시키게 되는 결점이 있었다.However, in the prior art as described above, in order to isolate the plurality of MOS transistors, a thick field oxide film 5a needs to be grown. In this case, a bird's beak shape is inevitably formed, resulting in a decrease in the degree of integration.
본 발명은 이와 갈은 종래 기술의 결점을 해결하기 위한 것으로, 질소 이온주입에 의하여 이온이 주입된 영역에만 질화막을 형성하므로 복수의 모스 트랜지스터를 격리시키게 함을 그 목적으로 한다.The present invention has been made to solve the drawbacks of the prior art, which is intended to isolate a plurality of MOS transistors since a nitride film is formed only in a region where ions are implanted by nitrogen ion implantation.
이와 같은 목적을 달성하기 위한 본 발명은 반도체기판의 필드영역에 선택적으로 필드산화막을 형성하는 공정과, 상기 전표면 위에 감광제를 증착하고 소자격리영역을 제거하여 제거된 부분의 반도체 기판에 질소이온을 주입하는 공정과, 열처리하여 질소이온이 주입된 부분에 질화막을 형성하는 공정과, 게이트 산화막, 게이트막을 형성하고 감광제를 사용하여 상기 게이트 산화막, 게이트막을 패터닝하는 공정을 차례로 실시함을 특징으로 한다.In order to achieve the above object, the present invention provides a process for selectively forming a field oxide film in a field region of a semiconductor substrate, and depositing a photoresist on the entire surface and removing a device isolation region to provide nitrogen ions to the semiconductor substrate of the removed portion. And a step of forming the nitride film in the portion in which the nitrogen ion is implanted by heat treatment, forming the gate oxide film and the gate film, and patterning the gate oxide film and the gate film using a photosensitive agent.
이하에서 본발명의 실시예를 첨부된 도면 제3도에 의하여 상술하면 다음과 같다.Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG. 3.
먼저 (A)와 같이 실리콘기판(1) 위에 산화막(2)과 질화막(3)을 차례로 형성하고, (B)와 같이 감광제(4)를 도포한 후 노광 및 현상공정으로 활성영역에만 남도록 감광제(4)를 패터닝 (Fattening)한다.First, the oxide film 2 and the nitride film 3 are sequentially formed on the silicon substrate 1 as shown in (A), and the photosensitive agent 4 is applied as shown in (B), and then the photosensitive agent remains in the active region in the exposure and development processes ( Pattern 4).
그리고 (C)와 같이 감광제(4)를 마스크로 이용하여 질화막(3)을 식각한 후 감광제(4)를 제거하고 (D)와 같이 필드산화막(5)을 성장시킨다.The nitride film 3 is etched using the photosensitive agent 4 as a mask as shown in (C), the photosensitive agent 4 is removed, and the field oxide film 5 is grown as shown in (D).
이어서, (E)와 같이 질화막(3)을 제거하고 (F)와 같이 감광제(6)를 입혀 소자격리영역의 감광제(6)를 선택적으로 식각한 후 식각된 부된을 통하여 실리콘기판(1)에 질소이온을 주입한다.Subsequently, the nitride film 3 is removed as shown in (E) and the photoresist 6 is selectively etched by applying a photosensitive agent 6 as shown in (F), and then the silicon substrate 1 is etched through the etched load. Inject nitrogen ions.
다음에 (G)와 같이 감광제(6) 제거 후 열처리공정을 거치면 질소이온이 주입된 부분에 (H)와 같이 질화막을 형성한다.Next, when the photosensitive agent 6 is removed as in (G) and subjected to a heat treatment step, a nitride film is formed as in (H) in the portion where nitrogen ions are injected.
또한, (I)와 같이 게이트 산화막(8), 게이트막(9)을 차례로 형성하고 감광제(10)를 사용하여 사진식각 공정을 실시하면 (J)와 같이 게이트 산화막(8), 게이트막(9)이 식각되어 결국 질화막(7)에 의해 복수의 모스 트랜지스터가 격리될 수 있다.In addition, as shown in (I), the gate oxide film 8 and the gate film 9 are sequentially formed, and a photolithography process is performed using the photosensitive agent 10 to form the gate oxide film 8 and the gate film 9 as shown in (J). ) May be etched, and thus a plurality of MOS transistors may be isolated by the nitride film 7.
제4도(a)는 제3도(h)공정의 다른 실시예로 감광제(11)를 입히고 감광제(11)가 입혀지지 않은 부분에 이온주입을 하여 N-웰(12)을 형성한 후 (B)와 같이 감광제(11)를 제거하므로 후공정에서도 N-웰(12)이 형성된 상태에서 공정을 실시하게 된다.FIG. 4 (a) shows another embodiment of the process of FIG. 3 (h), after forming the N-well 12 by applying the photosensitive agent 11 and implanting ions into a portion where the photosensitive agent 11 is not coated ( Since the photosensitive agent 11 is removed as in B), the N-well 12 is formed in the subsequent step.
이상과 같은 본 발명에 의하면 종래와 같이 두꺼운 격리용 필드산화막을 형성하지 않아 새부리 형상이 형성되지 않으므로 집적도를 향상시킬 수 있고, 이에 따른 소자의 신뢰성을 향상시킬 수 있는 효과를 갖는다.According to the present invention as described above, since the thick isolation field oxide film is not formed as in the prior art, the beak shape is not formed, thereby increasing the degree of integration, thereby improving the reliability of the device.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019900018186A KR0178967B1 (en) | 1990-11-10 | 1990-11-10 | Fabricating method of mosfet |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019900018186A KR0178967B1 (en) | 1990-11-10 | 1990-11-10 | Fabricating method of mosfet |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR920010769A KR920010769A (en) | 1992-06-27 |
| KR0178967B1 true KR0178967B1 (en) | 1999-04-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| KR1019900018186A KR0178967B1 (en) | 1990-11-10 | 1990-11-10 | Fabricating method of mosfet |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101016060B1 (en) * | 2010-07-28 | 2011-02-23 | 주식회사 건정종합건축사사무소 | Eco permeable sidewalk block composition and construction method of sidewalk block by using same |
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1990
- 1990-11-10 KR KR1019900018186A patent/KR0178967B1/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101016060B1 (en) * | 2010-07-28 | 2011-02-23 | 주식회사 건정종합건축사사무소 | Eco permeable sidewalk block composition and construction method of sidewalk block by using same |
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| Publication number | Publication date |
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| KR920010769A (en) | 1992-06-27 |
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