KR0164125B1 - Apparatus of processing the full ess packet and common line signal - Google Patents

Abstract

The present invention relates to a packet and common line signal processing apparatus of an electronic switch, and is connected to a global bus to perform central control and to provide access control for providing call volume adjustment, packet and common line device maintenance and operation, and user selection. A processor; It is connected to the global bus to perform operation and maintenance functions such as packet call control, routing information processing, subscriber link management, billing, and statistics data collection, and performs MTP and SCCP functions of common line signaling devices. A plurality of packet and signal message processing processors operating in a redundant manner; Local bus, which is a communication channel between an unexplained packet call / common call controller and a time switch and a packet call / common call controller, which are grouped by being connected to the packet and signal message processing processor by a packet bus, A plurality of interface means for performing a packet bus matching function, checking a state of packet call / common call control devices, reporting the result to a higher level, and performing a routing function for communication with other devices; Connected to the plurality of interface means to perform X.25 / X.75 LAPB protocol processing, common line signal level 2 processing, packet and common line signal internal protocol processing of a packet, and Signal message processing processor has 8 or more 56/64 Kbps LAPB link matching function to exchange packet data with other packet call / common call control means and for packet subscriber and network access, and 56 / 64Kbps common line signal data A plurality of packet call / common call control means for handling the physical connection of the link and the common line signal MTP Level 2 protocol; Group the plurality of packet call / common call controllers to provide a path for data exchange between them and only when exchanging data with other groups of packet call / common call controllers or packet and signal message processing processor devices. It is characterized in that it comprises a local bus used via the interface device.

Description

Packet and common line signal processing device of all electronic switch

1 is a structural diagram of an electronic exchange providing a conventional packet and common line signaling device service.

2 is a block diagram of a packet and common line signal processing apparatus of the present invention.

3 is a functional block diagram of a packet and signal message processing processor device of FIG.

4 is a functional block diagram of the packet call / public communication call control device of FIG.

* Explanation of symbols for the main parts of the drawings

1: Access Spooling Processor 2: Packet Call / Common Preference Control

3: interface 4: packet and signal processing processor

5: time switch

The present invention relates to a packet and common line signal processing apparatus of an all-electronic switch that performs a packet message and a common line signal message in real time in a packet and common line processing apparatus of the all-electronic exchange.

In the existing or developed electronic switch, a packet processing device and a common line signal processing device are separately configured, which is inconvenient in operation and has a problem of rising cost.

The present invention has been made to solve the problems of the prior art, the packet and common line signal processing of all electronic switch that facilitates system operation and maintenance and reduces the system interval by providing a packet and common line service The object is to provide a device.

In order to achieve the above object, the present invention provides an access switching processor connected to the global bus to perform central control and provide call adjustment, packet and common line device maintenance and operation, and user selection function; It is connected to the global bus to perform operation and maintenance functions such as packet call control, routing information processing, subscriber link management, billing, and statistics data collection, and performs MTP and SCCP functions of common line signaling devices. A plurality of packet and signal message processing processors operating in a redundant manner; Local bus, which is a communication channel between an unexplained packet call / common call controller and a time switch and a packet call / common call controller, which are grouped by being connected to the packet and signal message processing processor by a packet bus, A plurality of interface means for performing a packet bus matching function, checking a state of packet call / common call control devices, reporting the result to a higher level, and performing a routing function for communication with other devices; Connected to the plurality of interface means to perform X.25 / X.75 LAPB protocol processing, common line signal level 2 processing, packet and common line signal internal protocol processing of a packet, and Signal message processing processor has 8 or more 56/64 Kbps LAPB link matching function to exchange packet data with other packet call / common call control means and for packet subscriber and network access, and 56 / 64Kbps common line signal data A plurality of packet call / common call control means for handling the physical connection of the link and the common line signal MTP Level 2 protocol; Group the plurality of packet call / common call controllers to provide a path for data exchange between them and only when exchanging data with other groups of packet call / common call controllers or packet and signal message processing processor devices. It is characterized in that it comprises a local bus used via the interface device.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is a configuration diagram of a general electronic switching system, in which a packet and a common line message are processed in separate subsystems.

In the packet device subsystem, the packet message entered through the incoming packet data handler enters the packet device via the time switch and the space switch. In the common line subsystem, the signal message entered through the incoming data line of the incoming trunk It enters the common line signaling device via the time switch and the space switch.

The packet device subsystem processes packet protocol levels 1, 2, and 3, and the common line signaling device subsystem processes common line protocol levels 1, 2, and 3, and then implements the relay line subsystem through the control network according to the message type. Send packet level or common line signaling message to other exchange by sending to level 4 or selecting appropriate outgoing line.

2 is a structural diagram of the present invention, the function of each device is as follows.

1) access switching processor

The device is centrally controlled and provides call coordination, packet and common line device maintenance and operation, and user selection.

2) Packet and Signal Processing Processor

This device performs operation and maintenance functions such as packet call control and routing information processing, subscriber link management, billing, and statistics data collection management, and performs MTP and SCCP functions of common line signaling device and operates with active / standby duplication. do.

In more detail, a packet call requested from a subscriber station is input to a packet call / common call control device via a time switch and a space switch, which performs packet data and command communication with an access switch processor device through a global bus. In the process, internal messages for controlling multiple packet calls are exchanged, and control messages such as packet call setup, control, and release are received and verification is performed.

In addition, the device manages which link of the switch the packet call input and output to the packet call / public communication call control device is assigned, and performs the charging function, traffic collection and management function, and maintenance function according to packet call generation.

This device which performs MTP and SCCP function of common line signaling device routes the message message input from packet call / common call control device to the user part or sends the message input from user part to the corresponding packet call / common call control device. Routing with.

3) interface device

This device is responsible for the matching function between the grouped packet call / common call control device and time switch, and the local communication channel and packet bus matching function between the packet call / common call control devices. Check the status and report the result to upper level and execute Routing function for communication with other devices.

4) Packet call / common call control device

The device performs X.25 / X.75 LAPB protocol processing of the packet, common line signal level 2 processing, and packet and common line signal internal protocol processing. Packet switching services can be divided into various types such as B channel subscriber access, D channel subscriber access, PSPDN connection, and connection with other exchanges. Basically, the packet call / common call control device uses packets and It has 8 or more 56/64 Kbps LAPB link matching functions for exchanging packet data with signal message processing processor devices or other packet / common call controllers and for packet subscriber and network access. The device also handles physical connections of 56/64 Kbps common line signaling data links and common line signaling MTP Level 2 protocols.

5) Packet Bus

The bus accommodates more than 128 signal links or more than 960 packet subscribers, providing a path through which data can be exchanged between them and handling the volume of calls generated from them.

6) local bus

This bus groups the packet call / common call controllers to provide a path for data exchange between them and only exchanges data with other groups of packet call / common call controllers or packet and signal message processor processors. By using the packet bus via the interface unit, the load on the packet bus can be reduced.

FIG. 3 shows the detailed functional structure of the packet and signal message processing processor device of FIG.

Looking at its functional structure, if the packet call / common call control device fails and becomes 0b out of service, call switching control is performed to other available packet call / common call control devices, and when various errors occur, Error handling function to take notification action, status processing function to report the call status when the operator requests the call status, tracing function performed at the request of the operator or when an abnormality occurs in the system, and operator interface processing for such operator-related interface. Function, a transparent user connection function that connects the user's direct line with the user, flow control processing function to control the flow of the call according to the amount of call volume, charge processing function to handle the charge of the call, volume of outgoing and incoming calls, Statistics processing functions for processing the traffic volume and the like.

4 shows the detailed structure of the packet call / common call control device of FIG. 2, a call processing control unit which handles X.25 internal protocol, level 2 signal link protocol and maintenance functions, X.25 LAPB protocol and level 2 signal link. And a link matching circuit for processing data, a bus matching circuit for exchanging data with adjacent devices, a common memory for temporarily storing call data, and an arbitration circuit for controlling the CPU in the controller to share the common memory.

The call processing controller is composed of MC68040 32bit processor, 2 Mbyte RAM, 256Kbyte, and interrupt processing circuit to process level 2 protocol and control the overall control of packet call / common call controller.

Link matching circuit is a circuit that handles LAPB protocol and Level 2 signal link at link speed of 64K / 56Kbps by using link level dedicated chip. It is matched by rate adaptation chip between link level dedicated chip and time switch. Eight timeslots are extracted from and connected to each link level dedicated chip. The bus matching circuit is a dedicated chip for transmitting and receiving call data under packet bus arbitration, and driver and control circuits for matching data bus signal lines (RTS, CTS, TxD, RxD, TxC, RxC, S-SEL, RST, A1m). Consists of

The arbitration circuit arbitrates the address and data buses of the common memory when the CPU, dedicated chips in the X.25 and Level 2 signal link matching circuits, and dedicated chips in the bus matching circuit access the common memory, so that the I / O chips Allow to share

As described above, the present invention facilitates system operation and maintenance by providing packet and common line services, and reduces the system price.

Claims (4)

An access switching processor connected to a global bus for central control and providing call coordination, packet and common line device maintenance and operation, and user selection; It is connected to the global bus to perform operation and maintenance functions such as packet call control, routing information processing, subscriber link management, billing, and statistics data collection, and performs MTP and SCCP functions of common line signaling devices. A plurality of packet and signal message processing processors operating in a redundant manner; Local bus, which is a communication channel between an unexplained packet call / common call controller and a time switch and a packet call / common call controller, which are grouped by being connected to the packet and signal message processing processor by a packet bus, A plurality of interface means for performing a packet bus matching function, checking a state of packet call / common call control devices, reporting the result to a higher level, and performing a routing function for communication with other devices; Connected to the plurality of interface means to perform X.25 / X.75 LAPB protocol processing, common line signal level 2 processing, packet and common line signal internal protocol processing of a packet, and Signal message processing processor has 8 or more 56/64 Kbps LAPB link matching function to exchange packet data with other packet call / common call control means and for packet subscriber and network access, and 56 / 64Kbps common line signal data A plurality of packet call / common call control means for handling the physical connection of the link and the common line signal MTP Level 2 protocol; Group the plurality of packet call / common call controllers to provide a path for data exchange between them and only when exchanging data with other groups of packet call / common call controllers or packet and signal message processing processor devices. Packet and common line signal processing apparatus of an electronic switch, characterized in that the local bus is used via the interface device. The method of claim 1, wherein the packet and signal message processing processor switches a call to another packet call / common call controller that is available when a failure occurs in the packet call / common call controller and becomes an out of service. An error processing function block that performs control and takes notice action upon occurrence of various errors; A status processing function for reporting a call state when requesting a call state from an operator, and a tracing function block for performing at the request of an operator or an abnormality in the system; An operator interface processing function block for an operator related interface; A transparent user connection function block that connects a user's direct line with the operator; A flow control processing function block for controlling the flow of the call depending on the amount of the call; A charging processing function block for processing the charging of the call; A packet and common line signal processing apparatus for a full-transition switch having a statistical processing function block for processing the amount of outgoing and incoming calls, the amount of traffic and the like. The apparatus of claim 1, wherein the packet call / common call control means comprises: a call processing control unit which processes an X.25 internal protocol, a level 2 signal link protocol, and a maintenance function; Bus matching circuits for data exchange with adjacent devices, common memory for temporarily storing call data; Link matching circuitry for handling X.25 LAPB protocols and level 2 signal links; And an arbitration circuit unit for controlling a CPU to share the common memory. 4. The apparatus of claim 3, wherein the call processing controller comprises an MC68040 32-bit processor, 2 Mbyte RAM, 256 Kbytes, an interrupt processing circuit, and the like.