KR970056636A - Packet and common line signal processing device of all electronic switch - Google Patents

Packet and common line signal processing device of all electronic switch Download PDF

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KR970056636A
KR970056636A KR1019950053983A KR19950053983A KR970056636A KR 970056636 A KR970056636 A KR 970056636A KR 1019950053983 A KR1019950053983 A KR 1019950053983A KR 19950053983 A KR19950053983 A KR 19950053983A KR 970056636 A KR970056636 A KR 970056636A
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South Korea
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packet
call
common
processing
common line
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KR1019950053983A
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Korean (ko)
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KR0164125B1 (en
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이규옥
송영기
이형호
윤병남
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양승택
한국전자통신연구원
이준
한국전기통신공사
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/12Discovery or management of network topologies
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/02Details
    • H04L12/14Charging, metering or billing arrangements for data wireline or wireless communications
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/06Management of faults, events, alarms or notifications
    • H04L41/0695Management of faults, events, alarms or notifications the faulty arrangement being the maintenance, administration or management system
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/08Configuration management of networks or network elements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/111Switch interfaces, e.g. port details
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/112Switch control, e.g. arbitration

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

본 발명은 전전자 교환기의 패킷 및 공통선 신호 처리장치에 관한 것으로, 그로벌 버스에 연결되어 중앙 제어를 담당하며 통화량 조정, 패킷 및 공통선 장치 유지보수 및 운용, 사용자 선택기능을 제공하는 액세스 스위칭 프로세서; 상기 그로벌 버스에 연결되어 패킷 호 제어 및 루팅정보 처리, 가입자 링크관리, 과금, 통계자료 수집관리등 운용 및 유지보수 기능을 수행하고 공통선 신호장치의 MTP, SCCP 기능을 수행하며 액티브/스탠바이 형태의 이중화로 동작하는 다수의 패킷 및 신호메시지 처리 프로세서; 상기 다수의 패킷 및 신호메시지 처리 프로세서에 패킷 버스로 연결되어 그룹핑된 미설명된 패킷호/공통선호 제어장치와 타임스위치와의 정합 기능과 패킷호/공통선호 제어장치들 상호간 통신 채널인 로칼버스, 패킷버스 정합 기능을 담당하고 패킷호/공통선호 제어장치들의 상태를 체크하여 그 결과를 상위로 보고하며 타 장치와의 통신을 위한 라우팅 기능을 수행하는 다수의 인터페이스수단; 상기 다수의 인터페이스수단에 연결되어 패킷의 X.25/X.75 LAPB 프로토콜 처리기능, 공통선 신호 레벨 2 처리기능, 패킷 및 공통선신호 내부 프로토콜 처리기능 등을 수행하고 로칼 버스를 통하여 상기 패킷 및 신호메시지 처리 프로세서 장치 또는 다른 패킷호/공통선호 제어수단들과 패킷 데이타를 상호 교환하고 패킷 가입자 및 망 접속을 위하여 8개 이상의 56/64 Kbps LAPB 링크 정합 기능을 가지며, 56/64Kbps 공통선 신호 데이타 링크의 물리적인 접속과 공통선 신호 MTP 레벨 2 프로토콜을 처리하는 다수의 패킷호/공통선호 제어수단; 상기 다수의 패킷호/공통선호 제어장치들을 그룹핑하여 이들간의 데이타 교환을 위한 경로를 제공하고 타 그룹의 패킷호/공통선호 제어장치들과 또는 패킷 및 신호메시지처리 프로세서 장치들과의 데이타 교환시에만 인터페이스장치를 경유하여 사용되는 로칼버스를 구비하는 것을 특징으로 한다.The present invention relates to a packet and common line signal processing apparatus of an electronic switch, and is connected to a global bus to perform central control and to provide access control for providing call volume adjustment, packet and common line device maintenance and operation, and user selection. A processor; It is connected to the global bus to perform operation and maintenance functions such as packet call control, routing information processing, subscriber link management, billing, and statistics data collection, and performs MTP and SCCP functions of common line signaling devices. A plurality of packet and signal message processing processors operating in a redundant manner; Local bus, which is a communication channel between an unexplained packet call / common call controller and a time switch and a packet call / common call controller, which are grouped by being connected to the packet and signal message processing processor by a packet bus, A plurality of interface means for performing a packet bus matching function, checking a state of packet call / common call control devices, reporting the result to a higher level, and performing a routing function for communication with other devices; Connected to the plurality of interface means to perform X.25 / X.75 LAPB protocol processing, common line signal level 2 processing, packet and common line signal internal protocol processing of a packet, and Signal message processing processor has 8 or more 56/64 Kbps LAPB link matching function to exchange packet data with other packet call / common call control means and for packet subscriber and network access, and 56 / 64Kbps common line signal data A plurality of packet call / common call control means for handling the physical connection of the link and the common line signal MTP Level 2 protocol; Group the plurality of packet call / common call controllers to provide a path for data exchange between them and only when exchanging data with other groups of packet call / common call controllers or packet and signal message processing processor devices. It is characterized in that it comprises a local bus used via the interface device.

Description

전전자 교환기의 패킷 및 공통선 신호 처리장치Packet and common line signal processing device of all electronic switch

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 패킷 및 공통선 신호 처리장치 구성도.2 is a block diagram of a packet and common line signal processing apparatus of the present invention.

제3도는 제2도의 패킷 및 신호메세지 처리 프로세서 장치의 기능 블럭도.3 is a functional block diagram of a packet and signal message processing processor device of FIG.

제4도는 제2도의 패킷호/공통신호 제어 장치의 기능 블럭도.4 is a functional block diagram of the packet call / public communication call control device of FIG.

Claims (4)

그로벌 버스에 연결되어 중앙 제어를 담당하며 통화량 조정, 패킷 및 공통선 장치 유지보수 및 운용, 사용자 선택기능을 제공하는 액세스 스위칭 프로세서; 상기 그로벌 버스에 연결되어 패킷 호 제어 및 루팅정보 처리, 가입자 링크관리, 과금, 통계자료 수집관리등 운용 및 유지보수 기능을 수행하고 공통선 신호장치의 MTP, SCCP 기능을 수행하며 액티브/스탠바이 형태의 이중화로 동작하는 다수의 패킷 및 신호메시지 처리 프로세서; 상기 다수의 패킷 및 신호메시지 처리 프로세서에 패킷 버스로 연결되어 그룹핑된 미설명된 패킷호/공통선호 제어장치와 타임스위치와의 정합 기능과 패킷호/공통선호 제어장치들 상호간 통신 채널인 로칼버스, 패킷버스 정합 기능을 담당하고 패킷호/공통선호 제어장치들의 상태를 체크하여 그 결과를 상위로 보고하며 타 장치와의 통신을 위한 라우팅 기능을 수행하는 다수의 인터페이스수단; 상기 다수의 인터페이스수단에 연결되어 패킷의 X.25/X.75 LAPB 프로토콜 처리기능, 공통선 신호 레벨 2 처리기능, 패킷 및 공통선신호 내부 프로토콜 처리기능 등을 수행하고 로칼 버스를 통하여 상기 패킷 및 신호메시지 처리 프로세서 장치 또는 다른 패킷호/공통선호 제어수단들과 패킷 데이타를 상호 교환하고 패킷 가입자 및 망 접속을 위하여 8개 이상의 56/64 Kbps LAPB 링크 정합 기능을 가지며, 56/64Kbps 공통선 신호 데이타 링크의 물리적인 접속과 공통선 신호 MTP 레벨 2 프로토콜을 처리하는 다수의 패킷호/공통선호 제어수단; 상기 다수의 패킷호/공통선호 제어장치들을 그룹핑하여 이들간의 데이타 교환을 위한 경로를 제공하고 타 그룹의 패킷호/공통선호 제어장치들과 또는 패킷 및 신호메시지처리 프로세서 장치들과의 데이타 교환시에만 인터페이스장치를 경유하여 사용되는 로칼버스를 구비하는 것을 특징으로 하는 전전자 교환기의 패킷 및 공통선 신호 처리장치.An access switching processor connected to a global bus for central control and providing call coordination, packet and common line device maintenance and operation, and user selection; It is connected to the global bus to perform operation and maintenance functions such as packet call control, routing information processing, subscriber link management, billing, and statistics data collection, and performs MTP and SCCP functions of common line signaling devices. A plurality of packet and signal message processing processors operating in a redundant manner; Local bus, which is a communication channel between an unexplained packet call / common call controller and a time switch and a packet call / common call controller, which are grouped by being connected to the packet and signal message processing processor by a packet bus, A plurality of interface means for performing a packet bus matching function, checking a state of packet call / common call control devices, reporting the result to a higher level, and performing a routing function for communication with other devices; Connected to the plurality of interface means to perform X.25 / X.75 LAPB protocol processing, common line signal level 2 processing, packet and common line signal internal protocol processing of a packet, and Signal message processing processor has 8 or more 56/64 Kbps LAPB link matching function to exchange packet data with other packet call / common call control means and for packet subscriber and network access, and 56 / 64Kbps common line signal data A plurality of packet call / common call control means for handling the physical connection of the link and the common line signal MTP Level 2 protocol; Group the plurality of packet call / common call controllers to provide a path for data exchange between them and only when exchanging data with other groups of packet call / common call controllers or packet and signal message processing processor devices. Packet and common line signal processing apparatus of an electronic switch, characterized in that the local bus is used via the interface device. 제1항에 있어서, 상기 패킷 및 신호메세지 처리 프로세서는, 상기 패킷호/공통선호 제어장치에 장애가 발생하여 서비스 장애(Out of service)가 될 경우 가용중인 다른 패킷호/공통선호 제어장치로 호 전환 제어를 수행하고, 여러 에러 발생시에 통보조치를 취하는 에러 처리기능블럭; 운용자로부터 호 상태를 요구시 호 상태를 보고하는 상태 처리 기능, 운용자의 요구시 또는 시스템내 이상 발생시 수행하는 추적(tracing) 기능블럭; 운용자 관련 인터페이스를 위한 운용자 인터페이스 처리 기능블럭; 사용자와 운용자의 직접 회선을 연결시켜 주는 트랜스페이런트 사용자 연결 기능블럭; 통화량의 다소에 따라 호의 흐름을 제어하는 흐름제어 처리 기능블럭; 호의 과금을 처리하기 위한 과금처리 기능블럭; 발신 및 착신 호의 양, 트래피량 등을 처리하는 통계 처리 기능블럭을 구비하고 있는 것을 특징으로 하는 전전가 교환기의 패킷 및 공통선 신호 처리장치.The method of claim 1, wherein the packet and signal message processing processor switches a call to another packet call / common call controller that is available when a failure occurs in the packet call / common call controller and becomes an out of service. An error processing function block that performs control and takes notice action upon occurrence of various errors; A status processing function for reporting a call state when requesting a call state from an operator, and a tracing function block for performing at the request of an operator or an abnormality in the system; An operator interface processing function block for an operator related interface; A transparent user connection function block that connects a user's direct line with the operator; A flow control processing function block for controlling the flow of the call depending on the amount of the call; A charging processing function block for processing the charging of the call; A packet and common line signal processing apparatus for a full-transition switch having a statistical processing function block for processing the amount of outgoing and incoming calls, the amount of traffic and the like. 제1항에 있어서, 상기 패킷호/공통선호 제어수단은, X.25 내부 프로토콜, 레벨 2 신호링크 프로토콜 및 유지보수 기능을 처리하는 호처리 제어부; 인접 장치와 데이타 교환을 위한 버스 정합회로, 호 데이타를 일시적으로 보관하기 위한 공통 메모리; X.25 LAPB 프로토콜 및 레벨 2 신호링크를 처리하기 위한 링크 정합회로부; CPU가 상기 공통 메모리를 공유할 수 있게 제어하는 중재 회로부를 구비하고 있는 것을 특징으로 하는 전전자 교환기의 패킷 및 공통선 신호 처리장치.The apparatus of claim 1, wherein the packet call / common call control means comprises: a call processing control unit which processes an X.25 internal protocol, a level 2 signal link protocol, and a maintenance function; Bus matching circuits for data exchange with adjacent devices, common memory for temporarily storing call data; Link matching circuitry for handling X.25 LAPB protocols and level 2 signal links; And an arbitration circuit unit for controlling a CPU to share the common memory. 제3항에 있어서, 상기 호처리 제어부는, MC68040 32bit 프로세서와 2 Mbyte RAM, 256Kbyte, 인터럽트 처리 회로 등으로 구성되는 것을 특징으로 하는 전전자 교환기의 패킷 및 공통선 신호 처리장치.4. The apparatus of claim 3, wherein the call processing controller comprises an MC68040 32-bit processor, 2 Mbyte RAM, 256 Kbytes, an interrupt processing circuit, and the like. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950053983A 1995-12-22 1995-12-22 Apparatus of processing the full ess packet and common line signal KR0164125B1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20000046118A (en) * 1998-12-31 2000-07-25 김영환 Communication method using event driven method between signal device and control device in full electronic switching system
KR100512772B1 (en) * 1998-07-03 2005-10-26 삼성탈레스 주식회사 Network Management Method for Multiple Wired / Wireless Carriers Using Common Line Signaling System

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101017502B1 (en) * 2008-12-31 2011-02-25 주식회사 케이티 Duplicate billing system and method in a communication network

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100512772B1 (en) * 1998-07-03 2005-10-26 삼성탈레스 주식회사 Network Management Method for Multiple Wired / Wireless Carriers Using Common Line Signaling System
KR20000046118A (en) * 1998-12-31 2000-07-25 김영환 Communication method using event driven method between signal device and control device in full electronic switching system

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