KR0135917B1 - Redundancy apparatus of a node maintenance repair bus - Google Patents

Abstract

The present invention relates to a redundancy device of a node maintenance bus, comprising: first and second node maintenance devices (101, 102) connected by a redundancy control line (108); Maintenance between nodes and node maintenance devices having a plurality of nodes connected to the first and second node maintenance devices 101 and 102 by using an M bus and providing an interprocessor communication path of a mobile communication system. It is effective to improve the reliability of the M bus by operating the repair bus in redundancy.

Description

Redundancy Units for Node Maintenance Buses

1 is a block diagram of a maintenance bus to which the present invention is applied.

2 is a functional block diagram of a maintenance bus inside a node maintenance device.

3 is a detailed view of the maintenance bus matching unit.

4 is a detailed view of the maintenance bus failure detection unit.

* Explanation of symbols for main parts of the drawings

201: Multiprotocol Processor

202: M bus matching

203: failure detection unit

204: memory

205: interrupt processing unit

The present invention relates to a redundancy apparatus of a node maintenance bus.

Currently, the mobile communication system is required to improve the reliability of the M bus by redundantly operating the maintenance bus between the nodes providing the communication path between the processor and the node maintenance device.

The present invention devised in order to meet the above requirements is to duplicate the maintenance communication bus (hereinafter referred to as M bus) between the nodes and the node maintenance device providing the inter-processor communication path of the mobile communication system to improve the reliability of the M bus. The purpose is to provide an improved redundant node maintenance bus.

In order to achieve the above object, the present invention, the first and second node maintenance apparatus connected by a redundant control line; And a plurality of nodes connected to the first and second node maintenance devices by using an M bus.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is a diagram illustrating the M-bus redundancy configuration. The node maintenance devices 101 and 102 are redundantly connected to the redundancy control line 108 to maintain high reliability.

Each of the nodes 103 and 104 and the maintenance device are connected to the A bus 109 and the B bus 110 of the redundant M bus and are connected to the D bus 107 which provides an interprocessor communication path. .

The redundant node maintenance devices 101 and 102 operate in an active / standby mode, and the maintenance device in which M-bus communication is active is a main agent.

The A bus / B bus selection of the M bus is selected at the time of maintenance device initialization. If the M bus fails, a bus transfer occurs.

The configuration of the M-bus functional block inside the maintenance apparatus of FIG. 2 is as follows.

In the figure, 201 is an integrated multiprotocol processor (hereinafter referred to as IMP), which processes information related to maintenance of nodes, and has a DMA (Direct Memory Access) function and a high level Data Link Control (HDLC) for high speed serial communication. It has serial data transmission and reception function and various I / O functions.

206 is a loopback signal line for M bus self function test using the I / O function of the IMP 201, 207 is a signal line indicating the selection of the A bus / B bus of the M bus to be operated, and 208 is an IMP and M bus. Internal M bus signal lines between the matching sections 202 are shown, respectively.

202 is an M bus matching unit, and the M bus signal 208 inside the maintenance apparatus and the plurality of nodes (the loop back signal line 206 input from the IMP and the selection signal line 207 of the A bus / B bus are the control signal lines). It has a signal conversion function between 103,104 of 1 degree and the matching M bus.

209 denotes an A bus of the redundant M buses, and 210 denotes a B bus of the redundant M buses.

203 is an M bus fault detection unit using a fault detection reference clock 217 to detect a fault state of a bus signal 219 which is selected from the signals of the A bus and the B bus constituting the redundant M bus. Generate a bus fault interrupt.

205 is a circuit for processing various interrupts generated in the maintenance apparatus 220. When the M bus self interrupt is input, the interrupt service request signal line 214 is generated to the IMP and the corresponding interrupt vector value is sent.

The 204 is a memory for storing node maintenance related programs and data, and is composed of 256K byte read only memory (ROM) and 512 K byte random access memory (RAM).

215 denotes a parallel data line of D0-D15 in the maintenance device, 216 denotes a parallel address line of A0-A24, and 218 denotes a control line related to read / write.

The configuration of the internal M bus functional block in the maintenance apparatus shown in FIG. 2 has been described so far.

The linkage of each functional block and the overall operation procedure are as follows.

When the redundant node maintenance devices 101 and 102 in FIG. 1 are initialized and an active or standby state is determined between the mutual devices, the maintenance device in the standby state does not perform maintenance communication through the M bus. The maintenance apparatus operates the A bus / B bus selection signal 207 to be operated by the IMP 201 in FIG. 2 to generate an HDLC serial frame for maintenance of the nodes.

The serial frame is converted into a signal to be transmitted from the M bus matching unit 202 to the bus and transmitted.

The fault detection unit 203 always monitors the states of the A bus and the B bus and generates an interrupt when a fault is detected, and performs interrupt service processing of the bus switching in operation.

Detailed operation description of the M bus matching unit will be described with reference to FIG. 3. In the figure, 301 denotes an A bus / B bus selection signal input from the IMP, and the 'high' state is A bus selection and the 'low' state is B bus selection.

306 is a device for converting HDLC serial data frame MTXD 303 inputted from IMP into RS-422 electrical signal, and uA96174 is used, and 307 to 310 are transmission data signals of A bus which are converted to differential. MTXDa (+), MTXDa (-) and MTXDb (+) and MTXDb (-) signals, which are transmission data signals of the B buses, are shown, respectively.

311 denotes differential signals of MRXDa (+) 312, MRXDa (-) 313, which are data of the A bus received from nodes, and MRXDb 314, MRXDb (-), 315, which are data of the B bus. UA96174 is used as a device to convert the signal into a 'TLT' signal, and 305 is an MRXD signal output to IMP.

304 is a circuit for controlling the M-bus self-test of the maintenance apparatus by transmitting the data directly on the M bus by the loopback control signal input from the IMP.

316 is a data transmission clock to be transmitted from the IMP to the M bus through the differential change element 318 to the M bus, onto the A bus, onto the MTXCa (+) 320, MTXCa (-) 321, and B buses. MTXCb (+) 322 and MTXCb (−) 323 are provided. At this time, the clock signals on the A bus and the B bus are looped back and provided to the data receiving clock 317.

4 illustrates the configuration and operation of the M bus failure detection unit in detail. 401 and 402 used the 74LS161 counter as a fault detection circuit. If the clock is not received for a certain time by connecting the MCLK clock to the reset input of the counter, the bus fault signal INT1 (or INT2 406) is set to 'low'. Transition to indicate a failure.

403 denotes MCLK, which is a data reception clock that is selected and operated among A bus and B bus of the redundant M bus, and 404 denotes RCLK, which is a reference clock for fault detection of MCLK.

The present invention configured and operated as described above has an effect of improving reliability of an M bus by operating a maintenance bus between nodes providing a communication path between processors of a mobile communication system and a node maintenance device in a redundant manner.

Claims (4)

A redundancy device of an M bus (maintenance communication bus) for maintenance communication between a plurality of nodes and a node maintenance device of a mobile communication system, the first and second node maintenance connected by a redundancy control line 108 Devices 101 and 102; And a plurality of nodes connected to the first and second node maintenance devices (101, 102) using an M bus. 2. The apparatus of claim 1, wherein the first and second node maintenance devices (101, 102) comprise: an integrated multiprotocol processor (201) for transmitting and receiving maintenance information processing and HDLC frames of a plurality of nodes; An M bus matching unit 202 connected to the multiprotocol processor 201 to change and control an M bus; A fault detection unit (203) connected to the M bus matching unit (202) to detect the M bus failure; An interrupt processor (205) connected to the fault detector (203) and the multiprotocol processor (201) to perform the M bus fault interrupt processing; And a memory (204) connected to the multiprotocol processor (201) and the interrupt processing unit (205). 3. The M bus matching unit 202 performs M bus self test in the maintenance apparatus by allowing the transmission data to be received directly on the M bus by means of a loopback control signal input from the multiprotocol processor 201. And a loopback control unit (304) configured to perform the duplication of the node maintenance bus. The node of claim 2, wherein the failure detection unit 203 is configured to generate a bus failure signal by notifying a bus failure signal if a clock is not received for a predetermined time using a bus failure detection circuit using a counter. Redundancy unit of maintenance bus.