KR0129610B1 - Apparatus for transmitting and receiving atm cell date with speed - Google Patents

Abstract

A fixed rate cell data transreceiver in order to interface between the ISDN terminal and the B-ISDN ATM layer in the ISDN B-TA system. The said apparatus consist of a protocol converting means(23), a local shell block(24) and timer(24). And the said apparatus whereby the software of protocol processor divides a N-ISDN protocol processor(21) and a B-ISDN protocol processor(22); and the ISDN interface means(11) consist of a ISDN subscriber connection means(31) and a AAL-1 processor(32,33).

Description

Fixed Speed Cell Data Transceiver

1 is a schematic diagram of an ISDN B-TA system to which the present invention is applied.

2 is a detailed configuration diagram of the system according to the present invention.

3 is an IBIA hardware block diagram.

4 is a conceptual diagram of fixed-speed user data flow between IBIA and ANIA.

* Explanation of symbols for main parts of the drawings

11 ISDN interface means (IBIA) 12 ISDN B-TA processor means (BPA)

13: ATM matching means (ANIA) 21: N-ISDN protocol processing unit

22: B-ISDN protocol processing unit 23: protocol conversion unit

24: local shell block 25: timer

The present invention relates to a fixed rate cell data transmission / reception apparatus for accessing an ISDN terminal and a broadband integrated information network (B-ISDN) ATM layer in an integrated information communication network (ISDN) B-TA system.

There are two ways to provide ISDN service in ATM network. The first is to solve this problem by interworking between ISDN network and B-ISDN network, and the second is to solve the problem with the terminal matching device for connecting ISDN terminal to B-ISDN network like the ISDN B-TA system. . With such a device, a plurality of ISDN terminals can be connected to a B-ISDN network at a low price, and in particular, a low-speed B-ISDN network can be connected with a slight change of the B-ISDN physical layer. In addition, not only BRI (Basic Rate Interface), which is a basic connection of ISDN terminal interface, but also PRI (Primary Rate Interface) can be possible with a small change of terminal connection.

The present invention is a terminal interface technology, system bus interface technology, clock synchronization technology with B-ISDN network, high-speed data access technology with ATM layer, and AAL-1 data transmission technology for ISDN B-TA. It is based on AAL-1 data reception technology. According to the present invention, regardless of the processing speed of the B-ISDN network, the received data can be processed in synchronization with the speed of the B-ISDN physical layer so that the data can be processed without loss of data. By setting the clock speed to be variable, it is possible to cope with ISDN terminals of various speeds and various B-ISDN matching speeds.

An object of the present invention is an ISDN terminal having both a function of transmitting and receiving fixed-speed data according to the ITU-T standard AAL-1 (ATM-1 Adaptation Layer 1) and an S interface function, which is an ISDN terminal access function, for connecting an ISDN terminal and an ATM network. The present invention provides a fixed-speed shell data transmission / reception apparatus for accessing an ISDN terminal and a B-ISDN ATM layer in an ISDN B-TA system that performs B-ISDN matching.

In order to achieve the above object, the present invention provides an ISDN interface means (IBIA: ISDN-BISDN InterFace board Assembly) for performing the R interface matching function and the AAL-1 function of the system and accessing the ATM network in the STM-1 standard connection form. An ATM Network Interface Board Assembly (ANIA), and an ISDB B-TA Processor Board Assembly (BPA) that performs overall control of the ISDN B-TA and is responsible for higher protocol processing and translation functions. In the ISDN B-TA system provided, software (S / W) of the protocol processing unit of the ISDN B-TA processor means is divided into an N-ISDN protocol processing unit and a B-ISDN protocol processing unit, and is responsible for protocol change therebetween. A local shell block and a timer connected to the N-ISDN protocol processing unit, driven by a separate task, and configured to perform input / output of a console, and the ISDN interface. Switch means is characterized in comprising the ISDN subscriber connection with AAL-1 processing section.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is a schematic diagram of an ISDN B-TA system, in which an ISDN interface (IBIA: ISDN-BISDN InterFace board Assembly) 11 performing an R interface matching function and an AAL-1 function and an ATM in an STM-1 standard connection form are provided. An ATM Network Interface Board Assembly (ANIA) 13 for accessing the network, and an ISDN B-TA processor unit (BPA: B) that performs overall control of the ISDN B-TA and is in charge of higher protocol processing and conversion functions. It consists of three blocks of a TA processor board assembly (12), which has a back board (ITBB) 14 connected to the ISDN connection 11 by a system bus.

2 is a detailed configuration diagram of the entire ISDN B-TA system.

The software (S / W) of the protocol processing unit is largely divided into the N-ISDN protocol processing unit 21 and the B-ISDN protocol processing unit 22, and protocol conversion between them is a structure in which the protocol conversion unit 23 is in charge. Consists of.

As shown in Figure 2, the input and output of the console is handled by a local shell block 24 driven by a separate task, and the timer 25 is also configured as a separate task, so that the N-ISDN protocol The processor 21 can be used in common.

The N-ISDN protocol processor 21 includes an IBIA device driver 211, a layer 2 processor 212, and a layer 3 processor 213.

The IBIA device driver 211 transfers control to a logical link control block 2122 by activating IBIA and grouping D channel data input from the IBIA into one frame, and transmitting a frame required by an upper layer. In charge of the function. Layer 2 protocol processing such as TE1 management is handled by the logical link control block 2122, and an information frame is transferred to the N-ISDN call control block 2132, and a layer 2 library for processing and transmitting layer 3 primitives. Provide (library) (2121).

The layer 3 protocol is processed by the call control block 2132, and each primitive is converted into the B-ISDN protocol through interworking with the protocol conversion unit and transmitted to the counterpart terminal.

The B-ISDN protocol processor is responsible for B-ISDN protocol processing, such as Q.2931, and provides the ANIA library 221 for interfacing with higher layers.

3 is a block diagram of an IBIA hardware module. It is composed of an S-connector 31, an AAL-1 transmitter 32, and an AAL-1 receiver 33.

The S connection part is composed of an ISDN terminal connection part 311 and a synchronization clock generation part 312. In the ISDN terminal connection part, the ISDN terminal is connected to the IBIA board and the S interface, which is an ITU-T I, which is an electrical standard of N-ISDN. Satisfies .430 The signal from the terminal is routed through the transformer on the IBIA board to the ISDN subscriber access and expansion controller. The ISDN subscriber access controller separates the 64 Kbps B channel information received from the S interface and the 16 Kbps D channel information delivering the signal message and transmits the D channel signal information to the CPU. Here, the B channel transmits serial data information to the PCM highway (8 KHz frame clock, 4.096 MHz data clock) via an expansion controller, which is transmitted via a transmission data buffer (S / P FIFO) 321. The control unit processes the function of AAL-1 and then outputs the received cell buffer (P / P FIFO) 334. In the case of reception, the reverse process is performed.

In order to provide a synchronous clock on the S interface side, the synchronous clock generator 321 divides the synchronous clock of the B-ISDN physical layer and uses it as an 8 KHz data frame clock on the S interface side through the T-bus.

The AAL-1 transmitter 32 is composed of transmission data buffers 321 and 322, a transmission cell buffer 324, and a transmission control unit 323.

The transmission data buffers 321 and 322 are buffers for converting and storing B channel serial data received by an ISDN terminal through an ISDN subscriber access controller and an expansion controller in units of bytes. A transmit data buffer (S / P FIFO) 322 is used.

The transmitting cell buffer 324 is composed of an ATM cell unit including an ATM header made by the transmission control unit 323, a SAR header, and user data read from the transmission data buffer 321. A transmit cell buffer (P / P FIFO) 324 is used as a buffer for storing data. The data stored here can be automatically sent to the T-bus (Traffic Bus), a dedicated cell data transmission bus, or read by the CPU, depending on the mode.

The AAL-1 transmission control unit 323 is a circuit that controls all data flows of the expansion controller → transmission buffer → transmission cell buffer → T-bus, and is driven by the following operation principle. As soon as 47 bytes of data are prepared in B1 and B2 channels, the ATM header (VCI and dummy data) and SAR hair (SN / SNP) of the corresponding channel are stored in the transmit cell buffer first, and then Read 47-byte data and store it in the sending cell buffer. Here, the ACI of the ATM header is a value previously set by the CPU, and the SN / SNP is a value generated by a counter, CRC, and parity generation circuit configured for each channel. The double SN value is 3-bit sequential information about user information, and performs the processing of lost and incorrectly inserted cells at the receiving side, and G (x) = x3 using a cyclic code for 3-bit information. By adding the SNP using the polynomial of + x1 + 1, the error of SN value can be prevented.

On the other hand, when one cell is stored in the transmitting cell buffer, transmission starts on the T-bus. The transmission speed to the T-bus is determined by transmission data click (TDCLK), and its frequency is optional (2.43 M, 4.86). M, 9.72 M, 19.44 M) are possible.

The data stored in the transmission cell buffer 324 can be set in a loop-back or CPU access mode in addition to the T-bus method which is automatically transmitted to the T-bus as described above.

In loop-back mode, the automatic transmission operation is the same as the T-bus mode, except that the data path is connected to the receiving side rather than the T-bus.

In CPU access mode, data is read from the CPU by considering the transmission cell buffer as one CPU memory space. The method of reading data from the CPUT can be interrupted or status polled according to the buffer status. The buffer status can be divided into an empty signal and a cell write completion signal. Can be.

The AAL-1 receiving unit 33 is composed of receiving cell buffers 331 and 332, a receiving data buffer 334, and a receiving control unit 333. The receiving cell buffer uses a P / P FIFO as a buffer for storing ATM cell unit data received on the T-bus, and may write data in the CPU instead of the T-bus depending on the mode.

Receiving data buffers 331 and 332 are ATM cell data received by the receiving cell buffer is separated into a header and the user data in the reception control unit and the user data is sent to the reception data buffer of the channel. Receive Data Buffer uses one P / S FIFO for each channel of B1 and B2, and the data stored in byte unit is converted into serial bit stream and sent to ISDN terminal through expansion controller and ISDN subscriber access controller. .

It also serves to compensate for delay variations in the network. In other words, the data is stored in the buffer and the transmission starts, so that the continuous data can be provided to the terminal even if the data received from the network is delayed.

The AAL-1 reception control unit 333 is a circuit for controlling all data flows of the T-bus → reception cell buffer → reception data buffer → expansion controller, and is driven as follows.

In the ATM cell received from the T-bus to the receiving cell buffer, cell synchronization is detected by the RESTART signal, and the VCI value of the ATM header is compared with the VCI value of each channel, and the data of any channel of B1 or B2 is detected. Distinguish cognition. The AAL layer of the detected channel analyzes 1-byte SAR hair (SN / SNP) to determine whether there is an error. In this case, the SNP error criterion according to ITU-T I.363 is as follows. The cell determined to be an SNP error is discarded and an interrupt is generated after setting the SNP error status bit. Since the SN error is related to cell loss and there is no treatment, the SN error status bit is set, an interrupt is generated, and the processing ends.

As a result of the above determination, if there is no SNP error, 47 bytes of user data are transmitted to the reception data buffer of the corresponding channel. The user data written in the receive data buffer is converted into serial data and transmitted to the expansion controller. After the appropriate amount of data is stored in the reception buffer to absorb the gap caused by the delay variation in the network, transmission to the expansion controller starts. do. The reference value of this starting data is set by the CPU in cell units.

The transmission between the receiving cell buffer and the receiving data buffer is 2.5 MHz and the transmission from the T-bus to the receiving cell buffer is determined by the receiving data clock (RDCLK) sent by the transmitting side.

According to the mode set in the CPU, the data source to the receiving cell buffer is as follows.

-T-bus mode: T-bus (network)

Loop mode: Transmit data (transmit cell buffer)

CPU mode: CPU write data

By configuring as described above, the following effects can be obtained.

First, in the ISDN B-TA system, a fixed speed cell data transmission / reception function (AAL-1 transmission / reception function), which is a connection function between the ISDN terminal and the AMT layer of the B-ISDN network, can be processed in real time.

Second, data received from B-ISDN network can be processed without loss regardless of network dalay.

Third, the cell data transmission / reception rate can be varied according to the terminal speed or the B-ISDN physical layer speed.

Claims (6)

ISDN interface means (IBIA: ISDN -BISDN InterFace board Assembly) 11 performing R interface matching function and AAL-1 function of the system and ATM matching means (ANIA: ATM) for connecting to ATM network in STM-1 standard mode Network Interface board Assembly (13), and ISDN B-TA Processor Board Assembly (BPA) 12, which performs overall control of the ISDN B-TA and is responsible for higher protocol processing and conversion functions. In the ISDN B-TA system, software (S / W) of the protocol processing unit of the ISDN B-TA processor means 11 is divided into an N-ISDN protocol processing unit 21 and a B-ISDN protocol processing unit 22. A local shell block 24 connected to the N-ISDN protocol processor 21 and driven by a separate task and responsible for input / output of the console; And the timer 25, the ISDN interface means (11) The ISDN subscriber access unit 31 and the AAL-1 processing unit (32, 33) characterized in that the fixed rate cell data transmission and reception apparatus. The IBIA device driver of claim 1, wherein the N-ISDN protocol processor 21 transmits a frame to an upper layer by activating the IBIA 13 and grouping D channel data input from the IBIA into one frame. devide driver) 211; A layer 2 processor 212 which performs layer 2 protocol processing on a frame received from the IBIA device driver 211; And a layer 3 processor (213) connected to the layer 2 processor (212) to perform layer 3 protocol processing. The apparatus of claim 1, wherein the B-ISDN protocol processor 22 includes an ANIA library 221 and an ANIA device driver 222 for interfacing with a higher layer. . According to claim 1, The ISDN subscriber access unit 31 is connected to the ISDN terminal to separate the B channel information received from the S interface and the D channel information for transmitting the signal message to transmit the D channel signal information to the CPU ISDN terminal connection 311; In order to provide a synchronous clock on the S interface side, a synchronous clock generator 312 divides the synchronous clock of the B-ISDN physical layer and uses the T-bus as a data frame clock on the S interface side. Fixed speed cell data transmission and reception device. The AAL-1 transmitter of claim 1, further comprising: a transmission data buffer (321, 322) for converting and storing B channel serial data received by an ISDN terminal in units of bytes; An AAL-1 transmission control unit 323 connected to the transmission data buffers 321 and 322 to form an ATM header, a SAR header, and user data; And a transmission cell buffer (324) for storing data in units of ATM cells made by the AAL-1 transmission control unit (323). 2. The receiver of claim 1, wherein the AAL-1 receiving unit (33) comprises: a receiving cell buffer (334) for storing ATM cell unit data received on a T-bus; An AAL-1 reception control unit 333 for separating ATM cell data received by the reception cell buffer 334 into a header and user data; And reception data buffers (331, 332) for converting data stored in units of bytes of B channel data into serial bit streams and transmitting the data to an ISDN terminal.