JPWO2024247113A1 - - Google Patents
Info
- Publication number
- JPWO2024247113A1 JPWO2024247113A1 JP2025523748A JP2025523748A JPWO2024247113A1 JP WO2024247113 A1 JPWO2024247113 A1 JP WO2024247113A1 JP 2025523748 A JP2025523748 A JP 2025523748A JP 2025523748 A JP2025523748 A JP 2025523748A JP WO2024247113 A1 JPWO2024247113 A1 JP WO2024247113A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/435—Cross-sectional shapes or dispositions of interconnections
Landscapes
- Engineering & Computer Science (AREA)
- Databases & Information Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2023/020110 WO2024247113A1 (ja) | 2023-05-30 | 2023-05-30 | 半導体素子を用いたメモリ装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2024247113A1 true JPWO2024247113A1 (https=) | 2024-12-05 |
| JPWO2024247113A5 JPWO2024247113A5 (https=) | 2026-02-19 |
Family
ID=93652606
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2025523748A Pending JPWO2024247113A1 (https=) | 2023-05-30 | 2023-05-30 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20240404583A1 (https=) |
| JP (1) | JPWO2024247113A1 (https=) |
| WO (1) | WO2024247113A1 (https=) |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3808763B2 (ja) * | 2001-12-14 | 2006-08-16 | 株式会社東芝 | 半導体メモリ装置およびその製造方法 |
| JP5078338B2 (ja) * | 2006-12-12 | 2012-11-21 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| US7919800B2 (en) * | 2007-02-26 | 2011-04-05 | Micron Technology, Inc. | Capacitor-less memory cells and cell arrays |
| JP2012074684A (ja) * | 2010-09-03 | 2012-04-12 | Elpida Memory Inc | 半導体装置およびその製造方法 |
| KR102529073B1 (ko) * | 2015-04-29 | 2023-05-08 | 제노 세미컨덕터, 인크. | 백바이어스를 이용한 드레인 전류가 향상된 트랜지스터 및 메모리 셀 |
| KR102784170B1 (ko) * | 2021-09-06 | 2025-03-19 | 유니산티스 일렉트로닉스 싱가포르 프라이빗 리미티드 | 반도체 소자를 사용한 메모리 장치 |
-
2023
- 2023-05-30 JP JP2025523748A patent/JPWO2024247113A1/ja active Pending
- 2023-05-30 WO PCT/JP2023/020110 patent/WO2024247113A1/ja not_active Ceased
-
2024
- 2024-05-29 US US18/676,782 patent/US20240404583A1/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| WO2024247113A1 (ja) | 2024-12-05 |
| US20240404583A1 (en) | 2024-12-05 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20251119 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20251119 |