JPWO2024176988A1 - - Google Patents

Info

Publication number
JPWO2024176988A1
JPWO2024176988A1 JP2025502699A JP2025502699A JPWO2024176988A1 JP WO2024176988 A1 JPWO2024176988 A1 JP WO2024176988A1 JP 2025502699 A JP2025502699 A JP 2025502699A JP 2025502699 A JP2025502699 A JP 2025502699A JP WO2024176988 A1 JPWO2024176988 A1 JP WO2024176988A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2025502699A
Other languages
Japanese (ja)
Other versions
JPWO2024176988A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2024176988A1 publication Critical patent/JPWO2024176988A1/ja
Publication of JPWO2024176988A5 publication Critical patent/JPWO2024176988A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/497Inductive arrangements or effects of, or between, wiring layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/495Capacitive arrangements or effects of, or between wiring layers
    • H10W20/496Capacitor integral with wiring layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/147Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations being multilayered
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
JP2025502699A 2023-02-21 2024-02-19 Pending JPWO2024176988A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023025220 2023-02-21
PCT/JP2024/005655 WO2024176988A1 (ja) 2023-02-21 2024-02-19 半導体装置

Publications (2)

Publication Number Publication Date
JPWO2024176988A1 true JPWO2024176988A1 (https=) 2024-08-29
JPWO2024176988A5 JPWO2024176988A5 (https=) 2025-11-04

Family

ID=92501211

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2025502699A Pending JPWO2024176988A1 (https=) 2023-02-21 2024-02-19

Country Status (3)

Country Link
US (1) US20250364404A1 (https=)
JP (1) JPWO2024176988A1 (https=)
WO (1) WO2024176988A1 (https=)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006319094A (ja) * 2005-05-12 2006-11-24 Fujikura Ltd 半導体装置およびその製造方法
JP2010109269A (ja) * 2008-10-31 2010-05-13 Panasonic Corp 半導体装置
JP2011253944A (ja) * 2010-06-02 2011-12-15 Toshiba Corp 半導体装置及びその製造方法
CN205081096U (zh) * 2013-02-28 2016-03-09 株式会社村田制作所 Esd保护器件
CN105051886B (zh) * 2013-03-25 2018-06-08 瑞萨电子株式会社 半导体装置及其制造方法
US9640607B2 (en) * 2015-03-04 2017-05-02 Tower Semiconductor Ltd. Die including a high voltage capacitor

Also Published As

Publication number Publication date
US20250364404A1 (en) 2025-11-27
WO2024176988A1 (ja) 2024-08-29

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Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20250814