JPWO2024166846A1 - - Google Patents

Info

Publication number
JPWO2024166846A1
JPWO2024166846A1 JP2024576317A JP2024576317A JPWO2024166846A1 JP WO2024166846 A1 JPWO2024166846 A1 JP WO2024166846A1 JP 2024576317 A JP2024576317 A JP 2024576317A JP 2024576317 A JP2024576317 A JP 2024576317A JP WO2024166846 A1 JPWO2024166846 A1 JP WO2024166846A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024576317A
Other languages
Japanese (ja)
Other versions
JPWO2024166846A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2024166846A1 publication Critical patent/JPWO2024166846A1/ja
Publication of JPWO2024166846A5 publication Critical patent/JPWO2024166846A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • H10W70/424Cross-sectional shapes
    • H10W70/427Bent parts
    • H10W70/429Bent parts being the outer leads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/411Chip-supporting parts, e.g. die pads
    • H10W70/417Bonding materials between chips and die pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/421Shapes or dispositions
    • H10W70/424Cross-sectional shapes
    • H10W70/427Bent parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/481Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/129Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed forming a chip-scale package [CSP]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/755Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a laterally-adjacent insulating package substrate, interpose or RDL
JP2024576317A 2023-02-08 2024-02-05 Pending JPWO2024166846A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2023017617 2023-02-08
PCT/JP2024/003633 WO2024166846A1 (ja) 2023-02-08 2024-02-05 半導体装置

Publications (2)

Publication Number Publication Date
JPWO2024166846A1 true JPWO2024166846A1 (https=) 2024-08-15
JPWO2024166846A5 JPWO2024166846A5 (https=) 2026-01-06

Family

ID=92262582

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024576317A Pending JPWO2024166846A1 (https=) 2023-02-08 2024-02-05

Country Status (3)

Country Link
US (1) US20250357283A1 (https=)
JP (1) JPWO2024166846A1 (https=)
WO (1) WO2024166846A1 (https=)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0233961A (ja) * 1988-07-23 1990-02-05 Nec Corp リードフレーム
JP2513062B2 (ja) * 1990-04-17 1996-07-03 三菱電機株式会社 リ―ドフレ―ムおよび半導体装置の製造方法
US8093707B2 (en) * 2009-10-19 2012-01-10 National Semiconductor Corporation Leadframe packages having enhanced ground-bond reliability

Also Published As

Publication number Publication date
US20250357283A1 (en) 2025-11-20
WO2024166846A1 (ja) 2024-08-15

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