JPWO2024053022A1 - - Google Patents
Info
- Publication number
- JPWO2024053022A1 JPWO2024053022A1 JP2024545340A JP2024545340A JPWO2024053022A1 JP WO2024053022 A1 JPWO2024053022 A1 JP WO2024053022A1 JP 2024545340 A JP2024545340 A JP 2024545340A JP 2024545340 A JP2024545340 A JP 2024545340A JP WO2024053022 A1 JPWO2024053022 A1 JP WO2024053022A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/668—Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/01—Manufacture or treatment
- H10D12/031—Manufacture or treatment of IGBTs
- H10D12/032—Manufacture or treatment of IGBTs of vertical IGBTs
- H10D12/038—Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/415—Insulated-gate bipolar transistors [IGBT] having edge termination structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
- H10D12/411—Insulated-gate bipolar transistors [IGBT]
- H10D12/441—Vertical IGBTs
- H10D12/461—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
- H10D12/481—Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
- H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
- H10D30/0297—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
- H10D30/665—Vertical DMOS [VDMOS] FETs having edge termination structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
- H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
- H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]
- H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
- H10D62/107—Buried supplementary regions, e.g. buried guard rings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
- H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/111—Field plates
- H10D64/117—Recessed field plates, e.g. trench field plates or buried field plates
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/JP2022/033581 WO2024053022A1 (ja) | 2022-09-07 | 2022-09-07 | 半導体装置およびその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPWO2024053022A1 true JPWO2024053022A1 (https=) | 2024-03-14 |
| JPWO2024053022A5 JPWO2024053022A5 (https=) | 2025-01-08 |
| JP7752780B2 JP7752780B2 (ja) | 2025-10-10 |
Family
ID=90192496
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2024545340A Active JP7752780B2 (ja) | 2022-09-07 | 2022-09-07 | 半導体装置およびその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP7752780B2 (https=) |
| CN (1) | CN119769193A (https=) |
| DE (1) | DE112022007744T5 (https=) |
| WO (1) | WO2024053022A1 (https=) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007189192A (ja) * | 2005-12-15 | 2007-07-26 | Toshiba Corp | 半導体装置 |
| JP2011199109A (ja) * | 2010-03-23 | 2011-10-06 | Renesas Electronics Corp | パワーｍｏｓｆｅｔ |
| WO2012127821A1 (ja) * | 2011-03-23 | 2012-09-27 | パナソニック株式会社 | 半導体装置およびその製造方法 |
| JP2014033079A (ja) * | 2012-08-03 | 2014-02-20 | Renesas Electronics Corp | 半導体装置の製造方法および半導体装置 |
| JP2015230932A (ja) * | 2014-06-04 | 2015-12-21 | 三菱電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
| WO2016047438A1 (ja) * | 2014-09-26 | 2016-03-31 | 三菱電機株式会社 | 半導体装置 |
| JP2016152357A (ja) * | 2015-02-18 | 2016-08-22 | 株式会社東芝 | 半導体装置および半導体パッケージ |
| WO2017138215A1 (ja) * | 2016-02-09 | 2017-08-17 | 三菱電機株式会社 | 半導体装置 |
| WO2020031971A1 (ja) * | 2018-08-07 | 2020-02-13 | ローム株式会社 | ＳｉＣ半導体装置 |
-
2022
- 2022-09-07 WO PCT/JP2022/033581 patent/WO2024053022A1/ja not_active Ceased
- 2022-09-07 DE DE112022007744.1T patent/DE112022007744T5/de active Pending
- 2022-09-07 JP JP2024545340A patent/JP7752780B2/ja active Active
- 2022-09-07 CN CN202280099413.2A patent/CN119769193A/zh active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007189192A (ja) * | 2005-12-15 | 2007-07-26 | Toshiba Corp | 半導体装置 |
| JP2011199109A (ja) * | 2010-03-23 | 2011-10-06 | Renesas Electronics Corp | パワーｍｏｓｆｅｔ |
| WO2012127821A1 (ja) * | 2011-03-23 | 2012-09-27 | パナソニック株式会社 | 半導体装置およびその製造方法 |
| JP2014033079A (ja) * | 2012-08-03 | 2014-02-20 | Renesas Electronics Corp | 半導体装置の製造方法および半導体装置 |
| JP2015230932A (ja) * | 2014-06-04 | 2015-12-21 | 三菱電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
| WO2016047438A1 (ja) * | 2014-09-26 | 2016-03-31 | 三菱電機株式会社 | 半導体装置 |
| JP2016152357A (ja) * | 2015-02-18 | 2016-08-22 | 株式会社東芝 | 半導体装置および半導体パッケージ |
| WO2017138215A1 (ja) * | 2016-02-09 | 2017-08-17 | 三菱電機株式会社 | 半導体装置 |
| WO2020031971A1 (ja) * | 2018-08-07 | 2020-02-13 | ローム株式会社 | ＳｉＣ半導体装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| DE112022007744T5 (de) | 2025-06-18 |
| WO2024053022A1 (ja) | 2024-03-14 |
| JP7752780B2 (ja) | 2025-10-10 |
| CN119769193A (zh) | 2025-04-04 |
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