JPWO2023281969A1 - - Google Patents

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Publication number
JPWO2023281969A1
JPWO2023281969A1 JP2023533476A JP2023533476A JPWO2023281969A1 JP WO2023281969 A1 JPWO2023281969 A1 JP WO2023281969A1 JP 2023533476 A JP2023533476 A JP 2023533476A JP 2023533476 A JP2023533476 A JP 2023533476A JP WO2023281969 A1 JPWO2023281969 A1 JP WO2023281969A1
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JP
Japan
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JP2023533476A
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    • HELECTRICITY
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7817Lateral DMOS transistors, i.e. LDMOS transistors structurally associated with at least one other device
    • H01L29/7818Lateral DMOS transistors, i.e. LDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
    • H01L29/7819Lateral DMOS transistors, i.e. LDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode in antiparallel, e.g. freewheel diode
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
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    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
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    • H01L29/0692Surface layout
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    • H01L29/0843Source or drain regions of field-effect devices
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    • H01L29/0852Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873Drain regions
    • H01L29/0878Impurity concentration or distribution
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    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
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    • H01L29/4983Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
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    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
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    • H01L29/76Unipolar devices, e.g. field effect transistors
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    • H01L29/78Field effect transistors with field effect produced by an insulated gate
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    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7817Lateral DMOS transistors, i.e. LDMOS transistors structurally associated with at least one other device
    • H01L29/7818Lateral DMOS transistors, i.e. LDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
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    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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    • H01L29/107Substrate region of field-effect devices
    • H01L29/1075Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
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    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
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    • H01L29/42312Gate electrodes for field effect devices
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    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/665Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7823Lateral DMOS transistors, i.e. LDMOS transistors with an edge termination structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2023533476A 2021-07-08 2022-06-08 Pending JPWO2023281969A1 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021113669 2021-07-08
PCT/JP2022/023165 WO2023281969A1 (ja) 2021-07-08 2022-06-08 半導体装置

Publications (1)

Publication Number Publication Date
JPWO2023281969A1 true JPWO2023281969A1 (ja) 2023-01-12

Family

ID=84800267

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023533476A Pending JPWO2023281969A1 (ja) 2021-07-08 2022-06-08

Country Status (5)

Country Link
US (1) US20240128373A1 (ja)
JP (1) JPWO2023281969A1 (ja)
CN (1) CN117425966A (ja)
DE (1) DE112022003464T5 (ja)
WO (1) WO2023281969A1 (ja)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5206028B2 (ja) * 2008-03-03 2013-06-12 株式会社デンソー 半導体装置
EP2608272A1 (en) * 2011-12-23 2013-06-26 Imec N-channel LDMOS device
JP6221284B2 (ja) * 2013-03-19 2017-11-01 富士通セミコンダクター株式会社 半導体装置及び半導体装置の製造方法
JP2015023208A (ja) 2013-07-22 2015-02-02 旭化成エレクトロニクス株式会社 電界効果トランジスタ及び半導体装置、電界効果トランジスタの製造方法
JP2017079432A (ja) * 2015-10-21 2017-04-27 株式会社デンソー 半導体装置
US11255589B2 (en) 2020-01-18 2022-02-22 True Manufacturing Co., Inc. Ice maker

Also Published As

Publication number Publication date
DE112022003464T5 (de) 2024-04-25
WO2023281969A1 (ja) 2023-01-12
CN117425966A (zh) 2024-01-19
US20240128373A1 (en) 2024-04-18

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