JPWO2023105604A1 - - Google Patents

Info

Publication number
JPWO2023105604A1
JPWO2023105604A1 JP2023565711A JP2023565711A JPWO2023105604A1 JP WO2023105604 A1 JPWO2023105604 A1 JP WO2023105604A1 JP 2023565711 A JP2023565711 A JP 2023565711A JP 2023565711 A JP2023565711 A JP 2023565711A JP WO2023105604 A1 JPWO2023105604 A1 JP WO2023105604A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2023565711A
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2023105604A1 publication Critical patent/JPWO2023105604A1/ja
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/4016—Memory devices with silicon-on-insulator cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
JP2023565711A 2021-12-07 2021-12-07 Ceased JPWO2023105604A1 (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2021/044837 WO2023105604A1 (ja) 2021-12-07 2021-12-07 半導体素子を用いたメモリ装置

Publications (1)

Publication Number Publication Date
JPWO2023105604A1 true JPWO2023105604A1 (https=) 2023-06-15

Family

ID=86607954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023565711A Ceased JPWO2023105604A1 (https=) 2021-12-07 2021-12-07

Country Status (3)

Country Link
US (1) US12100443B2 (https=)
JP (1) JPWO2023105604A1 (https=)
WO (1) WO2023105604A1 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022168220A1 (ja) * 2021-02-04 2022-08-11 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
WO2022239193A1 (ja) * 2021-05-13 2022-11-17 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
WO2022269890A1 (ja) * 2021-06-25 2022-12-29 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置の製造方法
CN119366278A (zh) * 2022-06-10 2025-01-24 新加坡优尼山帝斯电子私人有限公司 半导体内存装置
WO2023242956A1 (ja) * 2022-06-14 2023-12-21 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
WO2024042609A1 (ja) * 2022-08-23 2024-02-29 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
WO2024079816A1 (ja) * 2022-10-12 2024-04-18 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
WO2024134761A1 (ja) * 2022-12-20 2024-06-27 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006080280A (ja) * 2004-09-09 2006-03-23 Toshiba Corp 半導体装置およびその製造方法
JP2006108309A (ja) * 2004-10-04 2006-04-20 Toshiba Corp 半導体記憶装置およびｆｂｃメモリセルの駆動方法
JP2008218556A (ja) * 2007-03-01 2008-09-18 Toshiba Corp 半導体記憶装置
JP2009252264A (ja) * 2008-04-02 2009-10-29 Toshiba Corp 半導体記憶装置およびその駆動方法
US20150054090A1 (en) * 2013-03-11 2015-02-26 Monolithic 3D Inc. 3dic system with a two stable state memory
US20150200005A1 (en) * 2014-01-15 2015-07-16 Zeno Semiconductor, Inc. Memory Device Comprising an Electrically Floating Body Transistor

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2703970B2 (ja) 1989-01-17 1998-01-26 株式会社東芝 Ｍｏｓ型半導体装置
JPH03171768A (ja) 1989-11-30 1991-07-25 Toshiba Corp 半導体記憶装置
JP3957774B2 (ja) 1995-06-23 2007-08-15 株式会社東芝 半導体装置
JP3808763B2 (ja) 2001-12-14 2006-08-16 株式会社東芝 半導体メモリ装置およびその製造方法
JP5078338B2 (ja) 2006-12-12 2012-11-21 ルネサスエレクトロニクス株式会社 半導体記憶装置
WO2022219704A1 (ja) * 2021-04-13 2022-10-20 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
WO2022239100A1 (ja) * 2021-05-11 2022-11-17 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
WO2022239228A1 (ja) * 2021-05-14 2022-11-17 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置
WO2023281613A1 (ja) * 2021-07-06 2023-01-12 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体素子を用いたメモリ装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006080280A (ja) * 2004-09-09 2006-03-23 Toshiba Corp 半導体装置およびその製造方法
JP2006108309A (ja) * 2004-10-04 2006-04-20 Toshiba Corp 半導体記憶装置およびｆｂｃメモリセルの駆動方法
JP2008218556A (ja) * 2007-03-01 2008-09-18 Toshiba Corp 半導体記憶装置
JP2009252264A (ja) * 2008-04-02 2009-10-29 Toshiba Corp 半導体記憶装置およびその駆動方法
US20150054090A1 (en) * 2013-03-11 2015-02-26 Monolithic 3D Inc. 3dic system with a two stable state memory
US20150200005A1 (en) * 2014-01-15 2015-07-16 Zeno Semiconductor, Inc. Memory Device Comprising an Electrically Floating Body Transistor

Also Published As

Publication number Publication date
US12100443B2 (en) 2024-09-24
US20230178145A1 (en) 2023-06-08
WO2023105604A1 (ja) 2023-06-15

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