JPWO2022163425A1 - - Google Patents

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Publication number
JPWO2022163425A1
JPWO2022163425A1 JP2022578259A JP2022578259A JPWO2022163425A1 JP WO2022163425 A1 JPWO2022163425 A1 JP WO2022163425A1 JP 2022578259 A JP2022578259 A JP 2022578259A JP 2022578259 A JP2022578259 A JP 2022578259A JP WO2022163425 A1 JPWO2022163425 A1 JP WO2022163425A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2022578259A
Other languages
Japanese (ja)
Other versions
JP7688054B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2022163425A1 publication Critical patent/JPWO2022163425A1/ja
Priority to JP2025085055A priority Critical patent/JP2025114860A/ja
Application granted granted Critical
Publication of JP7688054B2 publication Critical patent/JP7688054B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P52/00—Grinding, lapping or polishing of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0428—Apparatus for mechanical treatment or grinding or cutting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0442—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/06—Planarisation of inorganic insulating materials
    • H10P95/062—Planarisation of inorganic insulating materials involving a dielectric removal step
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7408—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including alignment aids
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7412—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7428—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used to support diced chips prior to mounting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7434—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/744—Details of chemical or physical process used for separating the auxiliary support from a device or a wafer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/301—Marks applied to devices, e.g. for alignment or identification for alignment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
    • H10W46/607—Located on parts of packages, e.g. on encapsulations or on package substrates
JP2022578259A 2021-01-29 2022-01-18 チップ付き基板の製造方法、及び基板処理装置 Active JP7688054B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2025085055A JP2025114860A (ja) 2021-01-29 2025-05-21 チップ付き基板の製造方法、及び基板処理装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021013785 2021-01-29
JP2021013785 2021-01-29
PCT/JP2022/001520 WO2022163425A1 (ja) 2021-01-29 2022-01-18 チップ付き基板の製造方法、及び基板処理装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2025085055A Division JP2025114860A (ja) 2021-01-29 2025-05-21 チップ付き基板の製造方法、及び基板処理装置

Publications (2)

Publication Number Publication Date
JPWO2022163425A1 true JPWO2022163425A1 (https=) 2022-08-04
JP7688054B2 JP7688054B2 (ja) 2025-06-03

Family

ID=82653344

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2022578259A Active JP7688054B2 (ja) 2021-01-29 2022-01-18 チップ付き基板の製造方法、及び基板処理装置
JP2025085055A Pending JP2025114860A (ja) 2021-01-29 2025-05-21 チップ付き基板の製造方法、及び基板処理装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2025085055A Pending JP2025114860A (ja) 2021-01-29 2025-05-21 チップ付き基板の製造方法、及び基板処理装置

Country Status (5)

Country Link
US (1) US20240079403A1 (https=)
JP (2) JP7688054B2 (https=)
KR (1) KR20230135615A (https=)
CN (1) CN116783684A (https=)
WO (1) WO2022163425A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12610845B2 (en) * 2022-04-22 2026-04-21 Tokyo Electron Limited Method for forming semiconductor packages using dielectric alignment marks and laser liftoff process

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011049210A (ja) * 2009-08-25 2011-03-10 Seiko Epson Corp 薄膜素子群の転写方法
WO2012133760A1 (ja) * 2011-03-30 2012-10-04 ボンドテック株式会社 電子部品実装方法、電子部品実装システムおよび基板
JP2014045013A (ja) * 2012-08-24 2014-03-13 Bondtech Inc 基板上への対象物の位置決め方法及び装置
JP2017041472A (ja) * 2015-08-17 2017-02-23 株式会社ディスコ 貼り合せ基板の加工方法
JP2018125427A (ja) * 2017-02-01 2018-08-09 株式会社ディスコ 加工方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015046569A (ja) 2013-07-31 2015-03-12 マイクロン テクノロジー， インク． 半導体装置の製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011049210A (ja) * 2009-08-25 2011-03-10 Seiko Epson Corp 薄膜素子群の転写方法
WO2012133760A1 (ja) * 2011-03-30 2012-10-04 ボンドテック株式会社 電子部品実装方法、電子部品実装システムおよび基板
JP2014045013A (ja) * 2012-08-24 2014-03-13 Bondtech Inc 基板上への対象物の位置決め方法及び装置
JP2017041472A (ja) * 2015-08-17 2017-02-23 株式会社ディスコ 貼り合せ基板の加工方法
JP2018125427A (ja) * 2017-02-01 2018-08-09 株式会社ディスコ 加工方法

Also Published As

Publication number Publication date
JP2025114860A (ja) 2025-08-05
US20240079403A1 (en) 2024-03-07
JP7688054B2 (ja) 2025-06-03
CN116783684A (zh) 2023-09-19
KR20230135615A (ko) 2023-09-25
WO2022163425A1 (ja) 2022-08-04

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