JPWO2021171880A1 - - Google Patents

Info

Publication number
JPWO2021171880A1
JPWO2021171880A1 JP2022503180A JP2022503180A JPWO2021171880A1 JP WO2021171880 A1 JPWO2021171880 A1 JP WO2021171880A1 JP 2022503180 A JP2022503180 A JP 2022503180A JP 2022503180 A JP2022503180 A JP 2022503180A JP WO2021171880 A1 JPWO2021171880 A1 JP WO2021171880A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2022503180A
Other languages
Japanese (ja)
Other versions
JP7586441B2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2021171880A1 publication Critical patent/JPWO2021171880A1/ja
Application granted granted Critical
Publication of JP7586441B2 publication Critical patent/JP7586441B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/05—Digital input using the sampling of an analogue quantity at regular intervals of time, input from a/d converter or output to d/a converter
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/48—Analogue computers for specific processes, systems or devices, e.g. simulators
    • G06G7/60—Analogue computers for specific processes, systems or devices, e.g. simulators for living beings, e.g. their nervous systems ; for problems in the medical field
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/78—Simultaneous conversion using ladder network

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Mathematical Analysis (AREA)
  • Biomedical Technology (AREA)
  • General Health & Medical Sciences (AREA)
  • Neurology (AREA)
  • Neurosurgery (AREA)
  • Physiology (AREA)
  • Human Computer Interaction (AREA)
  • Analogue/Digital Conversion (AREA)
  • Complex Calculations (AREA)
JP2022503180A 2020-02-26 2021-01-27 積和演算器 Active JP7586441B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020031047 2020-02-26
JP2020031047 2020-02-26
PCT/JP2021/002791 WO2021171880A1 (ja) 2020-02-26 2021-01-27 積和演算器

Publications (2)

Publication Number Publication Date
JPWO2021171880A1 true JPWO2021171880A1 (https=) 2021-09-02
JP7586441B2 JP7586441B2 (ja) 2024-11-19

Family

ID=77490443

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2022503180A Active JP7586441B2 (ja) 2020-02-26 2021-01-27 積和演算器

Country Status (2)

Country Link
JP (1) JP7586441B2 (https=)
WO (1) WO2021171880A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20240096766A (ko) * 2021-11-10 2024-06-26 신타라 아게 하이브리드 행렬 승수기
JPWO2024143223A1 (https=) * 2022-12-26 2024-07-04

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60178584A (ja) * 1984-02-23 1985-09-12 Dainippon Screen Mfg Co Ltd デシタル入力デジタル出力積和平均化装置
JPH09259205A (ja) * 1996-03-19 1997-10-03 Yozan:Kk 積和演算回路
JPH11163728A (ja) * 1997-08-22 1999-06-18 Harris Corp 線形性を向上させる電流セルマトリクスを有するデジタル−アナログコンバータ及びその制御方法
WO2019152451A1 (en) * 2018-01-31 2019-08-08 Amazon Technologies, Inc. Improving performance of neural network arrays

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5310222B2 (ja) * 2009-04-20 2013-10-09 富士通株式会社 電荷分配型デジタル・アナログ変換器及びそれを有する逐次比較型アナログ・デジタル変換器
JP2018129046A (ja) * 2017-02-08 2018-08-16 株式会社半導体エネルギー研究所 Ａｉシステム

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60178584A (ja) * 1984-02-23 1985-09-12 Dainippon Screen Mfg Co Ltd デシタル入力デジタル出力積和平均化装置
JPH09259205A (ja) * 1996-03-19 1997-10-03 Yozan:Kk 積和演算回路
JPH11163728A (ja) * 1997-08-22 1999-06-18 Harris Corp 線形性を向上させる電流セルマトリクスを有するデジタル−アナログコンバータ及びその制御方法
WO2019152451A1 (en) * 2018-01-31 2019-08-08 Amazon Technologies, Inc. Improving performance of neural network arrays

Also Published As

Publication number Publication date
WO2021171880A1 (ja) 2021-09-02
JP7586441B2 (ja) 2024-11-19

Similar Documents

Publication Publication Date Title
BR112023005462A2 (https=)
BR112023012656A2 (https=)
BR112021014123A2 (https=)
BR112023009656A2 (https=)
BR112022009896A2 (https=)
BR112021017747A2 (https=)
BR112022024743A2 (https=)
BR112022026905A2 (https=)
BR112023011738A2 (https=)
BR112023006729A2 (https=)
BR102021018859A2 (https=)
BR112023016292A2 (https=)
BR112023011610A2 (https=)
BR112023011539A2 (https=)
BR112023008976A2 (https=)
BR102021020147A2 (https=)
BR102021018926A2 (https=)
BR102021018167A2 (https=)
BR102021017576A2 (https=)
BR102021016837A2 (https=)
BR102021016551A2 (https=)
BR102021016375A2 (https=)
BR102021016200A2 (https=)
BR102021015220A2 (https=)
BR102021015247A2 (https=)

Legal Events

Date Code Title Description
RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20221005

AA64 Notification of invalidation of claim of internal priority (with term)

Free format text: JAPANESE INTERMEDIATE CODE: A241764

Effective date: 20221018

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20221025

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20240110

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20240820

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20241011

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20241029

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20241029

R150 Certificate of patent or registration of utility model

Ref document number: 7586441

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150