JPWO2021144666A1 - - Google Patents

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Publication number
JPWO2021144666A1
JPWO2021144666A1 JP2021571064A JP2021571064A JPWO2021144666A1 JP WO2021144666 A1 JPWO2021144666 A1 JP WO2021144666A1 JP 2021571064 A JP2021571064 A JP 2021571064A JP 2021571064 A JP2021571064 A JP 2021571064A JP WO2021144666 A1 JPWO2021144666 A1 JP WO2021144666A1
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2021571064A
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Japanese (ja)
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JPWO2021144666A5 (ja
JP7594550B2 (ja
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Publication of JPWO2021144666A1 publication Critical patent/JPWO2021144666A1/ja
Publication of JPWO2021144666A5 publication Critical patent/JPWO2021144666A5/ja
Priority to JP2024203623A priority Critical patent/JP7730973B2/ja
Application granted granted Critical
Publication of JP7594550B2 publication Critical patent/JP7594550B2/ja
Priority to JP2025135965A priority patent/JP2025164803A/ja
Active legal-status Critical Current
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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733Multi-gate TFTs
    • H10D30/6734Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6757Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D87/00Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
JP2021571064A 2020-01-16 2021-01-07 半導体装置の作製方法 Active JP7594550B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2024203623A JP7730973B2 (ja) 2020-01-16 2024-11-22 半導体装置の作製方法
JP2025135965A JP2025164803A (ja) 2020-01-16 2025-08-18 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2020005149 2020-01-16
JP2020005149 2020-01-16
PCT/IB2021/050079 WO2021144666A1 (ja) 2020-01-16 2021-01-07 半導体装置、および半導体装置の作製方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2024203623A Division JP7730973B2 (ja) 2020-01-16 2024-11-22 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JPWO2021144666A1 true JPWO2021144666A1 (https=) 2021-07-22
JPWO2021144666A5 JPWO2021144666A5 (ja) 2024-01-05
JP7594550B2 JP7594550B2 (ja) 2024-12-04

Family

ID=76863674

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2021571064A Active JP7594550B2 (ja) 2020-01-16 2021-01-07 半導体装置の作製方法
JP2024203623A Active JP7730973B2 (ja) 2020-01-16 2024-11-22 半導体装置の作製方法
JP2025135965A Pending JP2025164803A (ja) 2020-01-16 2025-08-18 半導体装置

Family Applications After (2)

Application Number Title Priority Date Filing Date
JP2024203623A Active JP7730973B2 (ja) 2020-01-16 2024-11-22 半導体装置の作製方法
JP2025135965A Pending JP2025164803A (ja) 2020-01-16 2025-08-18 半導体装置

Country Status (3)

Country Link
US (1) US12563716B2 (https=)
JP (3) JP7594550B2 (https=)
WO (1) WO2021144666A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114038611A (zh) * 2021-11-01 2022-02-11 吉林大学 一种远红外透明导电薄膜材料及其制备方法

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12040409B2 (en) 2021-02-09 2024-07-16 Taiwan Semiconductor Manufacturing Company Limited Thin film transistor including a dielectric diffusion barrier and methods for forming the same
TW202329333A (zh) * 2021-11-30 2023-07-16 日商半導體能源研究所股份有限公司 半導體裝置、半導體裝置的製造方法
WO2024028681A1 (ja) * 2022-08-02 2024-02-08 株式会社半導体エネルギー研究所 半導体装置、及び記憶装置
WO2026033392A1 (ja) * 2024-08-08 2026-02-12 株式会社半導体エネルギー研究所 半導体装置、及び半導体装置の作製方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011139055A (ja) * 2009-12-04 2011-07-14 Semiconductor Energy Lab Co Ltd 半導体素子、半導体装置及びそれらの作製方法
JP2015195380A (ja) * 2014-03-28 2015-11-05 株式会社半導体エネルギー研究所 トランジスタおよび半導体装置
WO2019025917A1 (ja) * 2017-08-04 2019-02-07 株式会社半導体エネルギー研究所 半導体装置、及び表示装置
WO2019166921A1 (ja) * 2018-03-02 2019-09-06 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
WO2019171196A1 (ja) * 2018-03-07 2019-09-12 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2019220515A (ja) * 2018-06-15 2019-12-26 東京エレクトロン株式会社 基板処理装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100993416B1 (ko) 2009-01-20 2010-11-09 삼성모바일디스플레이주식회사 박막 트랜지스터, 그의 제조 방법 및 박막 트랜지스터를 구비하는 평판 표시 장치
KR101870119B1 (ko) 2009-12-25 2018-06-25 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
CN107947763B (zh) 2010-08-06 2021-12-28 株式会社半导体能源研究所 半导体集成电路
JP2015005705A (ja) 2013-06-24 2015-01-08 パナソニック株式会社 薄膜トランジスタ素子及びその製造方法
JP7229669B2 (ja) 2017-11-17 2023-02-28 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
WO2019111105A1 (ja) 2017-12-06 2019-06-13 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP7022592B2 (ja) 2018-01-11 2022-02-18 株式会社ジャパンディスプレイ 表示装置
JP7204353B2 (ja) 2018-06-15 2023-01-16 株式会社半導体エネルギー研究所 トランジスタおよび半導体装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011139055A (ja) * 2009-12-04 2011-07-14 Semiconductor Energy Lab Co Ltd 半導体素子、半導体装置及びそれらの作製方法
JP2015195380A (ja) * 2014-03-28 2015-11-05 株式会社半導体エネルギー研究所 トランジスタおよび半導体装置
WO2019025917A1 (ja) * 2017-08-04 2019-02-07 株式会社半導体エネルギー研究所 半導体装置、及び表示装置
WO2019166921A1 (ja) * 2018-03-02 2019-09-06 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
WO2019171196A1 (ja) * 2018-03-07 2019-09-12 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP2019220515A (ja) * 2018-06-15 2019-12-26 東京エレクトロン株式会社 基板処理装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114038611A (zh) * 2021-11-01 2022-02-11 吉林大学 一种远红外透明导电薄膜材料及其制备方法

Also Published As

Publication number Publication date
WO2021144666A1 (ja) 2021-07-22
US20230047805A1 (en) 2023-02-16
JP7730973B2 (ja) 2025-08-28
JP7594550B2 (ja) 2024-12-04
US12563716B2 (en) 2026-02-24
JP2025164803A (ja) 2025-10-30
JP2025026982A (ja) 2025-02-26

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