JPWO2020230666A1 - - Google Patents
Info
- Publication number
- JPWO2020230666A1 JPWO2020230666A1 JP2021519380A JP2021519380A JPWO2020230666A1 JP WO2020230666 A1 JPWO2020230666 A1 JP WO2020230666A1 JP 2021519380 A JP2021519380 A JP 2021519380A JP 2021519380 A JP2021519380 A JP 2021519380A JP WO2020230666 A1 JPWO2020230666 A1 JP WO2020230666A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/27—ROM only
- H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
- H10B20/34—Source electrode or drain electrode programmed
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/27—ROM only
- H10B20/50—ROM only having transistors on different levels, e.g. 3D ROM
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/43—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6735—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes having gates fully surrounding the channels, e.g. gate-all-around
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/117—Shapes of semiconductor bodies
- H10D62/118—Nanostructure semiconductor bodies
- H10D62/119—Nanowire, nanosheet or nanotube semiconductor bodies
- H10D62/121—Nanowire, nanosheet or nanotube semiconductor bodies oriented parallel to substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0186—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D88/00—Three-dimensional [3D] integrated devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D88/00—Three-dimensional [3D] integrated devices
- H10D88/01—Manufacture or treatment
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
Landscapes
- Semiconductor Memories (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2019090699 | 2019-05-13 | ||
| JP2019090699 | 2019-05-13 | ||
| PCT/JP2020/018393 WO2020230666A1 (ja) | 2019-05-13 | 2020-05-01 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2020230666A1 true JPWO2020230666A1 (https=) | 2020-11-19 |
| JP7560747B2 JP7560747B2 (ja) | 2024-10-03 |
Family
ID=73289101
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2021519380A Active JP7560747B2 (ja) | 2019-05-13 | 2020-05-01 | 半導体記憶装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US12225719B2 (https=) |
| JP (1) | JP7560747B2 (https=) |
| WO (1) | WO2020230666A1 (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023157724A1 (ja) * | 2022-02-16 | 2023-08-24 | 株式会社ソシオネクスト | 半導体記憶装置 |
| WO2024018875A1 (ja) * | 2022-07-21 | 2024-01-25 | 株式会社ソシオネクスト | 半導体記憶装置 |
| EP4451332A3 (en) * | 2023-04-17 | 2025-01-01 | Samsung Electronics Co., Ltd. | Integrated circuit including read only memory (rom) cell |
| WO2026004616A1 (ja) * | 2024-06-27 | 2026-01-02 | 株式会社ソシオネクスト | 半導体記憶装置 |
| WO2026053741A1 (ja) * | 2024-09-03 | 2026-03-12 | 株式会社ソシオネクスト | 半導体記憶装置および半導体集積回路装置 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7715246B1 (en) * | 2008-06-27 | 2010-05-11 | Juhan Kim | Mask ROM with light bit line architecture |
| JP2011258898A (ja) * | 2010-06-11 | 2011-12-22 | Toshiba Corp | 半導体装置およびその製造方法 |
| US20160329313A1 (en) * | 2014-06-23 | 2016-11-10 | Synopsys, Inc. | Cells having transistors and interconnects including nanowires or 2d material strips |
| JP2018026565A (ja) * | 2016-08-10 | 2018-02-15 | 東京エレクトロン株式会社 | 半導体素子のための拡張領域 |
| US20180151576A1 (en) * | 2016-11-28 | 2018-05-31 | Samsung Electronics Co., Ltd. | Semiconductor devices |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2749434B1 (fr) * | 1996-05-31 | 1998-09-04 | Dolphin Integration Sa | Matrice de memoire rom compacte |
| CN108701653B (zh) * | 2016-02-25 | 2022-07-29 | 株式会社索思未来 | 半导体集成电路装置 |
| KR102228497B1 (ko) * | 2016-07-19 | 2021-03-15 | 도쿄엘렉트론가부시키가이샤 | 3 차원 반도체 디바이스 및 그 제조 방법 |
| US10756097B2 (en) * | 2018-06-29 | 2020-08-25 | International Business Machines Corporation | Stacked vertical transistor-based mask-programmable ROM |
| US10720391B1 (en) * | 2019-01-04 | 2020-07-21 | Globalfoundries Inc. | Method of forming a buried interconnect and the resulting devices |
-
2020
- 2020-05-01 JP JP2021519380A patent/JP7560747B2/ja active Active
- 2020-05-01 WO PCT/JP2020/018393 patent/WO2020230666A1/ja not_active Ceased
-
2021
- 2021-11-11 US US17/524,369 patent/US12225719B2/en active Active
-
2025
- 2025-01-08 US US19/013,630 patent/US20250151268A1/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7715246B1 (en) * | 2008-06-27 | 2010-05-11 | Juhan Kim | Mask ROM with light bit line architecture |
| JP2011258898A (ja) * | 2010-06-11 | 2011-12-22 | Toshiba Corp | 半導体装置およびその製造方法 |
| US20160329313A1 (en) * | 2014-06-23 | 2016-11-10 | Synopsys, Inc. | Cells having transistors and interconnects including nanowires or 2d material strips |
| JP2018026565A (ja) * | 2016-08-10 | 2018-02-15 | 東京エレクトロン株式会社 | 半導体素子のための拡張領域 |
| US20180151576A1 (en) * | 2016-11-28 | 2018-05-31 | Samsung Electronics Co., Ltd. | Semiconductor devices |
Also Published As
| Publication number | Publication date |
|---|---|
| US20250151268A1 (en) | 2025-05-08 |
| US12225719B2 (en) | 2025-02-11 |
| WO2020230666A1 (ja) | 2020-11-19 |
| US20220068942A1 (en) | 2022-03-03 |
| JP7560747B2 (ja) | 2024-10-03 |
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