JPWO2017195486A1 - Composite transistor - Google Patents

Abstract

The composite transistor in which the first active region 11, the second active region 12 and the control electrode 60 overlap each other includes a first electrode 61, a second electrode 62 and a third electrode 63; extending from the first active region 11. The first A extending portion 111 and the first B extending portion 121, the second A extending portion 131 and the second B extending portion 141 extending from the second active region 12 are further provided; Connected to the extension 111, the second electrode 62 is connected to the second A extension 131, and the third electrode 63 is connected to the first B extension 121 and the second B extension 141; the control electrode 60, the first The first active region 11, the first A extending portion 111, and the first B extending portion 121 constitute the first transistor TR1; the control electrode 60, the second active region 12, the second A extending portion 131, and the second B extending portion. 141 to the second transistor TR2 That.

Description

  The present disclosure relates to composite transistors, and specifically to complementary transistors.

  In a CMOS circuit that constitutes an inverter circuit, a NAND circuit, or the like that includes conventional field effect transistors, a p-channel field effect transistor and an n-channel field effect transistor are laid out in parallel. Then, by reducing and scaling such a layout, higher density of gates and lower power consumption have been promoted. However, since the processing difficulty level has increased and the manufacturing cost has increased remarkably, scaling itself has become difficult.

One of the candidates for the next generation device as a low power consumption device is a tunnel field effect transistor (TFET). Here, in the development of TFETs, attention has been focused on two-dimensional materials (2D materials) such as transition metal dichalcogenides (TMDC). Such a TFET is known from, for example, Japanese Patent Application Laid-Open No. 2015-090984. The semiconductor element disclosed in this patent publication is
A first two-dimensional material including a first metal chalcogenide material; and a second two-dimensional material bonded to a side surface of the first two-dimensional material and including a second metal chalcogenide material; A semiconductor layer including a two-dimensional material element in which the material and the second two-dimensional material are chemically bonded; and
It includes at least one non-semiconductor layer located on at least one surface of the semiconductor layer.

Japanese Patent Laying-Open No. 2015-090984

  However, even the TFET disclosed in Japanese Patent Application Laid-Open No. 2015-090984 has a problem that scaling is difficult as in the case of a conventional field effect transistor.

  Accordingly, an object of the present disclosure is to provide a composite transistor having a configuration and a structure capable of realizing higher density.

In order to achieve the above object, a composite transistor of the present disclosure includes:
In the overlapping region, the first active region, the second active region and the control electrode overlap,
A first electrode, a second electrode and a third electrode;
An insulating layer is provided between the control electrode and one of the first active region and the second active region adjacent to the control electrode,
A first A extending portion extending from one end of the first active region, a first B extending portion extending from the other end of the first active region, a second A extending portion extending from one end of the second active region, and A second B extending portion extending from the other end of the second active region,
The first electrode is connected to the first A extending portion,
The second electrode is connected to the second A extension,
The third electrode is connected to the first B extension part and the second B extension part,
The control transistor, the first active region, the first A extension portion and the first B extension portion constitute a first transistor,
A second transistor is configured by the control electrode, the second active region, the second A extending portion, and the second B extending portion. The overlapping order of the first active region, the second active region, and the control electrode may be the order of the first active region, the second active region, and the control electrode, or the second active region, the first active region. The order of the control electrodes may be used.

  In the composite transistor according to the present disclosure, since the control electrode, the first active region, and the second active region that constitute the first transistor and the second transistor overlap, it is possible to realize further higher density. Can do. Note that the effects described in the present specification are merely examples and are not limited, and may have additional effects.

1A, 1B, and 1C are conceptual diagrams of the composite transistor of Example 1. FIG. 2A and 2B are diagrams schematically showing the arrangement of components of the inverter circuit configured by the composite transistor of the first embodiment, and FIG. 2C is an inverter configured by the composite transistor of the first embodiment. It is an equivalent circuit diagram of a circuit. FIG. 3 is a schematic partial cross-sectional view of the composite transistor according to the first embodiment. 4A, 4B, and 4C are conceptual diagrams showing the positional relationship between the first active region, the second active region, and the control electrode in the composite transistor of Example 1. FIG. 5A, 5B, and 5C are conceptual partial cross-sectional views of the composite transistor of Example 1. FIG. FIG. 6 is a schematic plan view of the composite transistor of Example 1 and a schematic plan view of a conventional CMOS circuit for explaining the footprint. 7A, 7B, and 7C are conceptual diagrams of the composite transistor of Example 2. FIG. 8A and 8B are schematic partial cross-sectional views of the composite transistor of Example 2. FIG. 9A, 9B, and 9C are conceptual diagrams of the composite transistor of Example 3. FIG. FIG. 10 is a schematic partial cross-sectional view of the composite transistor of the third embodiment. FIG. 11A is an equivalent circuit diagram of a NAND circuit formed on the basis of the composite transistors of the first embodiment, the second embodiment, and the third embodiment. FIGS. 11B and 11C are configured by the composite transistor of the first embodiment. 2 is a diagram schematically showing the arrangement of components of a NAND circuit. 12A, 12B, and 12C are conceptual partial cross-sectional views of NAND circuits that are formed based on the composite transistors of Embodiment 1, Embodiment 2, and Embodiment 3, respectively. FIG. 13 is a diagram schematically illustrating an arrangement of active regions and the like when a NAND circuit formed based on the composite transistor of the first embodiment is cut along four levels of virtual planes. 14A and 14B schematically show the arrangement of active regions and the like when a NAND circuit formed based on the composite transistor of Example 2 and Example 3 is cut at two levels of virtual planes, respectively. FIG. FIG. 15A is an equivalent circuit diagram of a NOR circuit formed on the basis of the composite transistors of the first embodiment, the second embodiment, and the third embodiment. FIGS. 15B and 15C are configured by the composite transistor of the first embodiment. It is a figure which shows typically arrangement | positioning of the component of a NOR circuit. FIGS. 16A, 16B, and 16C are conceptual partial cross-sectional views of NOR circuits formed based on the composite transistors of Embodiment 1, Embodiment 2, and Embodiment 3, respectively. FIG. 17 is a diagram schematically illustrating the arrangement of active regions and the like when a NOR circuit formed based on the composite transistor of the first embodiment is cut along four levels of virtual planes. 18A and 18B schematically show the arrangement of active regions and the like when a NOR circuit formed based on the composite transistor of Example 2 and Example 3 is cut at two levels of virtual planes, respectively. FIG. FIG. 19 is an equivalent circuit diagram of an SRAM circuit composed of eight transistors formed based on the composite transistors of the first, second, and third embodiments. 20A and 20B are diagrams schematically illustrating the arrangement of the components of the SRAM circuit configured by the composite transistor of the first embodiment. 21A and 21B are conceptual partial cross-sectional views of an SRAM circuit formed based on the composite transistor of the first embodiment. 22A and 22B are conceptual partial cross-sectional views of an SRAM circuit formed based on the composite transistor of the second embodiment. FIGS. 22C and 22D are formed based on the composite transistor of the third embodiment. 1 is a conceptual partial cross-sectional view of an SRAM circuit. FIG. 23A and FIG. 23B schematically show the arrangement of active regions and the like when the SRAM circuit formed based on the composite transistor of Example 1 is cut at four levels and one level of virtual plane, respectively. FIG. 24A, 24B, 24C, and 24D are schematic partial end views of a silicon semiconductor substrate and the like for explaining the method of manufacturing the composite transistor of Example 1. FIG. FIG. 25A, FIG. 25B, FIG. 25C, and FIG. 25D show the change in energy band in each active region when the composite transistor having the first structure and the second structure of the present disclosure is turned on / off. It is a figure shown typically.

Hereinafter, although this indication is explained based on an example with reference to drawings, this indication is not limited to an example and various numerical values and materials in an example are illustrations. The description will be given in the following order.
1. 1. General description of the composite transistor of the present disclosure Example 1 (Compound transistor of the present disclosure: first structure of the present disclosure)
3. Example 2 (Modification of Example 1: Second structure of the present disclosure)
4). Example 3 (another modification of Example 1; third structure of the present disclosure)
5. Example 4 (various application examples of the composite transistor of the present disclosure)
6). Other

<General Description of Composite Transistor of the Present Disclosure>
In the composite transistor of the present disclosure,
A voltage higher than that of the second electrode is applied to the first electrode,
When the first voltage V ₁ is applied to the control electrode, the first transistor is turned on, the second transistor is turned off,
When a second voltage V ₂ (> V ₁ ) higher than the first voltage V ₁ is applied to the control electrode, the second transistor is turned on and the first transistor is turned off. It can be.

  Furthermore, in the composite transistor according to the present disclosure including the above-described preferable mode, the first active region and the second active region can be formed of a two-dimensional material or graphene.

In the composite transistor of the present disclosure including the various preferred embodiments described above,
In the overlapping region, the first active region is composed of the first A active region and the 1B active region overlapping the first A active region,
The 1A extension extends from the 1A active region,
The 1B extension extends from the 1B active region,
In the overlapping region, the second active region is composed of a second A active region and a second B active region overlapping the second A active region,
The second A extension extends from the second A active region;
The second B extending portion extends from the second B active region,
The energy value E _{V-1A at} the upper end of the valence band in the 1A active region and the energy value E _C-1A at the lower end of the conduction band are respectively the energy value E _{V-1A at} the upper end of the valence band in the 1B active region. Smaller than each of _V-1B and the energy value E _C-1B at the lower end of the conduction band,
The energy value E _{V-2A at} the upper end of the valence band in the 2A active region and the energy value E _C-2A at the lower end of the conduction band are respectively the energy value E at the upper end of the valence band in the 2B active region. It can be configured to be larger than each of _V-2B and the energy value E _C-2B at the lower end of the conduction band. Note that the composite transistor having such a configuration is referred to as “a composite transistor having the first structure of the present disclosure” for convenience. That is, for example, when the composite transistor is off,
E _C-1B > E _C-1A > E _V-1B > E _V-1A
as well as,
E _C-2A > E _C-2B > E _V-2A > E _V-2B
When the composite transistor is on,
E _C-1B > E _V-1B > E _C-1A > E _V-1A
as well as,
E _C-2A > E _V-2A > E _C-2B > E _V-2B
Satisfied. The order of overlapping of the first A active region and the first B active region may be such that the first A active region may be located on the control electrode side, or the first B active region may be located on the control electrode side. Similarly, the overlapping order of the second A active region and the second B active region may be such that the second A active region may be located on the control electrode side, or the second B active region may be located on the control electrode side.

  In the composite transistor having the first structure of the present disclosure, a second insulating layer is provided between the first active region and the second active region from the viewpoint of operation stability. Furthermore, from the viewpoint of operational stability, a first interlayer insulating layer is provided between the first A active region and the first B active region, and the second A active region and the first A second interlayer insulating layer may be provided between the 2B active region. However, it is not essential to provide the second insulating layer, the first interlayer insulating layer, and the second interlayer insulating layer. Changes in the state of the energy band between the first A active region and the first B active region, and the state of the energy band between the second A active region and the second B active region, based on the voltage application state to the control electrode described later If this change can be achieved, it may be unnecessary to provide the second insulating layer, the first interlayer insulating layer, and the second interlayer insulating layer. These insulating layers may be composed of natural oxide films. In addition, there may be a form of lamination through weak van der Waals force.

Alternatively, in the composite transistor of the present disclosure including the various preferred embodiments described above,
In the overlapping region, the first active region is composed of a first A active region and a first B active region located in the same virtual plane as the first A active region and facing the first A active region,
The 1A extension extends from the 1A active region,
The 1B extension extends from the 1B active region,
In the overlapping region, the second active region is composed of the second A active region and the second B active region located in the same virtual plane as the second A active region and facing the second A active region,
The second A extension extends from the second A active region;
The second B extending portion extends from the second B active region,
The energy value E _{V-1A at} the upper end of the valence band in the 1A active region and the energy value E _C-1A at the lower end of the conduction band are respectively the energy value E _{V-1A at} the upper end of the valence band in the 1B active region. Smaller than each of _V-1B and the energy value E _C-1B at the lower end of the conduction band,
The energy value E _{V-2A at} the upper end of the valence band in the 2A active region and the energy value E _C-2A at the lower end of the conduction band are respectively the energy value E at the upper end of the valence band in the 2B active region. It can be configured to be larger than each of _V-2B and the energy value E _C-2B at the lower end of the conduction band. For convenience, the composite transistor having such a configuration is referred to as “a composite transistor having the second structure of the present disclosure”. That is, for example, when the composite transistor is off,
E _C-1B > E _C-1A > E _V-1B > E _V-1A
as well as,
E _C-2A > E _C-2B > E _V-2A > E _V-2B
When the composite transistor is on,
E _C-1B > E _V-1B > E _C-1A > E _V-1A
as well as,
E _C-2A > E _V-2A > E _C-2B > E _V-2B
Satisfied.

  In the composite transistor having the second structure of the present disclosure described above, a configuration in which the second insulating layer is provided between the first active region and the second active region from the viewpoint of operational stability. It can be. However, it is not essential to provide the second insulating layer. Changes in the state of the energy band between the first A active region and the first B active region, and the state of the energy band between the second A active region and the second B active region, based on the voltage application state to the control electrode described later If the above change can be achieved, it may be unnecessary to provide the second insulating layer. The second insulating layer may be composed of a natural oxide film. In addition, there may be a form of lamination through weak van der Waals force.

Alternatively, in the composite transistor of the present disclosure,
In the overlapping region, the first active region comprises a first channel formation region,
The first A extending portion extends from one end of the first channel forming region,
The first B extension portion extends from the other end of the first channel formation region,
In the overlapping region, the second active region comprises a second channel forming region,
The second A extension portion extends from one end of the second channel formation region,
The second B extension portion extends from the other end of the second channel formation region,
When the first voltage V ₁ is applied to the control electrode, the first transistor is turned on, the second transistor is turned off,
When a second voltage V ₂ (> V ₁ ) higher than the first voltage V ₁ is applied to the control electrode, the second transistor is turned on and the first transistor is turned off. It can be. Note that the composite transistor having such a configuration is referred to as “a composite transistor having the third structure of the present disclosure” for convenience.

  In the composite transistor having the third structure of the present disclosure, the second insulating layer may be provided between the first active region and the second active region. In the composite transistor having the third structure of the present disclosure including such a configuration, it is preferable that the first active region and the second active region are made of a two-dimensional material or graphene.

In the composite transistor of the present disclosure including the various preferable modes and configurations described above (hereinafter, these may be collectively referred to simply as “composite transistor of the present disclosure”, etc.), as described above, A higher voltage than that of the second electrode can be applied to the first electrode. Specifically, for example, a second voltage V ₂ (for example, V _dd volt> 0) is applied to the first electrode, and a first voltage V ₁ (for example, 0 volt) is applied to the second electrode. It can be set as a form. The first voltage V ₁ and the second voltage V ₂ applied to the control electrode are voltages based on the first A active region and the second A active region.

In the composite transistor having the first structure and the second structure of the present disclosure, the first transistor is configured when the first voltage V ₁ lower than the second voltage V ₂ is applied to the control electrode. For example, the second voltage V ₂ is applied to the first A active region, and the valence band in the first boundary region located between the first A active region and the first B active region in the first transistor is detected. The energy value E _{V-1-IF at the} upper end and the energy value E _C-1-IF at the lower end of the conduction band are respectively the energy value E _{V-1B at} the upper end of the valence band of the 1B active region and the conduction. It approaches each of the energy values E _C-1B at the lower end of the band (see FIG. 25B). As a result, electrons move from the 1B active region to the 1A active region by the tunnel effect, so that the first transistor becomes conductive, and the potentials of the 1A active region and the 1B active region are ideally equal. , the potential of the third electrode is a second potential V _2. On the other hand, in the second transistor, the first 2A active region, for example, a first voltage V ₁ is applied, since the first voltage V ₁ is applied to the control electrode, the second transistor The energy value E _{V-2-IF at} the upper end of the valence band and the energy value E _{C-2-IF at} the lower end of the conduction band in the second boundary region located between the second A active region and the second B active region No change occurs in each of them (see FIG. 25C). As a result, there is no movement of electrons from the second A active region to the second B active region, and the second transistor is turned off.

Further, in the composite transistor having the first structure and the second structure of the present disclosure, when the second voltage V ₂ higher than the first voltage V ₁ is applied to the control electrode, the second transistor is turned on. For example, the first voltage V ₁ is applied to the second A active region, and the valence electrons in the second boundary region located between the second A active region and the second B active region in the second transistor are included. The energy value E _{V-2-IF at} the upper end of the band and the energy value E _C-2-IF at the lower end of the conduction band are respectively the energy values E _{V-2B at} the upper end of the valence band of the second B active region. And the energy value E _C-2B at the lower end of the conduction band is approached (see FIG. 25D). As a result, electrons move from the 2A active region to the 2B active region by the tunnel effect, so that the second transistor becomes conductive, and the potentials of the 2A active region and the 2B active region are ideally equal. The potential of the third electrode becomes the first potential V ₁ . On the other hand, in the first transistor, the first 1A active region, for example, and the second voltage V ₂ is applied, the second voltage V ₂ is applied to the control electrode, the first transistor The energy value E _{V-1-IF at} the upper end of the valence band and the energy value E _{C-1-IF at} the lower end of the conduction band in the first boundary region located between the first A active region and the first B active region No change occurs in each of them (see FIG. 25A). As a result, there is no movement of electrons from the first A active region to the first B active region, and the first transistor is turned off.

  In the composite transistor having the first structure and the second structure of the present disclosure, the first transistor corresponds to a p-channel FET, and the second transistor corresponds to an n-channel FET. The first A active region and the second A active region correspond to the source portion in the FET, the first B active region and the second B active region correspond to the drain portion in the FET, and the control electrode corresponds to the gate portion in the FET. In the composite transistor having the first structure and the second structure of the present disclosure, the first A active region and the second B active region are referred to as “n-type active region” for convenience, and the first B active region and the second A active region May be referred to as a “p-type active region” for convenience.

  The operation of the composite transistor having the third structure of the present disclosure is basically the same as the operation of the conventional field effect transistor.

  In the composite transistor or the like of the present disclosure, the first active region and the control electrode overlap in the overlapping region, but the orthographic image of the first active region is included in the orthographic image of the control electrode. Alternatively, it may coincide with the orthogonal projection image of the control electrode, or may protrude from the orthogonal projection image of the control electrode. Similarly, in the overlapping region, the second active region and the control electrode overlap, but the orthogonal projection image of the second active region may be included in the orthogonal projection image of the control electrode, or the orthogonal projection of the control electrode. It may coincide with the projected image, or may protrude from the orthographic image of the control electrode.

  Further, in the composite transistor having the first structure of the present disclosure, the first A active region and the first B active region constituting the first active region overlap in the overlapping region. And the first B active region may be included in the orthographic image of the control electrode, may coincide with the orthographic image of the control electrode, or may be the orthographic image of the control electrode. It may protrude from the projected image. Similarly, in the overlapping region, the second A active region and the second B active region constituting the second active region overlap, but the orthographic image of the region where the second A active region and the second B active region overlap is It may be included in the orthogonal projection image of the control electrode, may coincide with the orthogonal projection image of the control electrode, or may protrude from the orthogonal projection image of the control electrode.

  In the composite transistor or the like of the present disclosure, the extending direction of the first A extending portion and the first B extending portion may be the same as the extending direction of the second A extending portion and the second B extending portion. preferable.

In the composite transistor having the first structure to the second structure of the present disclosure,
[A] a first A active region including a first A extending portion (hereinafter sometimes referred to as “first A active region or the like”), a first B active region including a first B extending portion (hereinafter referred to as “first B active region”) , Etc.), a 2A active region including the 2A extension (hereinafter referred to as “2A active region, etc.”), a 2B active region including the 2B extension (hereinafter referred to as “second A active region”). , Which may be referred to as “second B active region, etc.”), may be made up of a total of four types of materials,
[B] The first A active region, etc. and the second B active region, etc. are composed of the same material, and the materials constituting the first B active region, etc., and the second A active region, etc. are different from each other. Or
[C] The first A active region and the second B active region are made of different materials, and the first B active region and the second A active region are made of the same material. Or
[D] The first A active region, etc. and the second B active region, etc. are made of the same material, and the first B active region, etc., and the second A active region, etc. are made of the same material. May be.

  When the materials constituting the first A active region and the second B active region are different, the materials constituting the first A active region and the second B active region are the same, and the doping material for the first A active region and the like The doping material for the 2B active region or the like may be different. Similarly, when the materials constituting the first B active region and the second A active region are different, the materials constituting the first B active region and the second A active region are the same, and doping to the first B active region and the like is performed. The material may be different from the doping material for the second A active region or the like. Examples of doping include an ion implantation method and a chemical doping method.

For example, as a doping material for forming a p-type active region, an ionic liquid such as NO ₂ BF ₄ , NOBF ₄ , NO ₂ SbF ₆ ; HCl, H ₂ PO ₄ , CH ₃ COOH, H ₂ SO ₄ , HNO Acid compounds such as ₃ ; organic compounds such as dichlorodicyanoquinone, oxone, dimyristoylphosphatidylinositol, trifluoromethanesulfonimide; HPtCl ₄ , AuCl ₃ , HAuCl ₄ , silver trifluoromethanesulfonate, AgNO ₃ , H ₂ PdCl ₆ , Pd (OAc) ₂ , Cu (CN) _2, etc. can be mentioned. Further, as doping materials for forming the n-type active region, NMNH (nicotinamide mononucleotide-H), NADH (nicotinamide adenine dinucleotide-H), NADPH (nicotinamide adenine dinucleotide phosphate-H), PEI (polyethylenimine), potassium and lithium An alkali metal such as

As described above, the material constituting the first active region and the second active region in the composite transistor or the like of the present disclosure can include a two-dimensional material. Specifically, a transition metal chalcogenide (TMDC) DiChalcogenide) -based materials. TMDC is represented by, for example, MX ₂ , and examples of transition metal “M” include Ti, Zr, Hf, V, Nb, Ta, Mo, W, Tc, and Re, and chalcogen element “X”. , O, S, Se, Te. Alternatively, CuS, which is a compound of Cu, which is a transition metal, and S, which is a chalcogen element, can also be mentioned, and a compound of a non-transition metal such as Ga, In, Ge, Sn, Pb and the chalcogen element (for example, GaS, GaSe, GaTe, In ₂ Se ₃ , InSnS ₂ , SnSe ₂ , GeSe, SnS ₂ , PbO). Alternatively, as a material for the two-dimensional material constituting the first active region and the second active region in the composite transistor or the like of the present disclosure, black phosphor (Black Phosphorus) may be used.

More specifically, as a two-dimensional material constituting the first A active region or the second B active region (n-type active region) in the composite transistor having the first structure to the second structure of the present disclosure, The two-dimensional material constituting the second A extension portion and the second B extension portion in the composite transistor having the disclosed third structure is selected from the group consisting of MoSe ₂ , MoTe ₂ , WSe ₂ , MoS _2, and WTe _2. At least one kind of two-dimensional material can be exemplified, and the thickness can be exemplified as 0.65 nm to 6.5 nm, preferably 0.65 nm to 2.6 nm. On the other hand, as a two-dimensional material constituting the first B active region or the second A active region (p-type active region) in the composite transistor having the first structure to the second structure of the present disclosure, As a two-dimensional material constituting the first A extension portion and the first B extension portion in the composite transistor having the structure of MoS ₂ , WS ₂ , ZrS ₂ , ZrSe ₂ , HfS ₂ , HfSe ₂ , NbSe ₂ and ReSe ₂ At least one type of two-dimensional material selected from the group consisting of: can be exemplified, and the thickness can be exemplified from 0.65 nm to 6.5 nm, preferably from 0.65 nm to 2.6 nm. However, it is not limited to these.

When the two-dimensional materials constituting the first A active region and the like are different from each other, the two-dimensional material constituting the first A active region is represented by M ^1A X ^1A ₂ and constitutes the first B active region and the like. When a two-dimensional material is represented by M ^1B X ^1B ₂ ,
M ^1A ≠ M ^1B and X ^1A ≠ X ^1B
May be,
M ^1A = M ^1B and X ^1A ≠ X ^1B
May be,
M ^1A ≠ M ^1B and X ^1A = X ^1B
It may be. Similarly, when the two-dimensional material constituting the second A active region is represented by M ^2A X ^2A ₂ and the two-dimensional material constituting the second B active region is represented by M ^2B X ^2B ₂ ,
M ^2A ≠ M ^2B and X ^2A ≠ X ^2B
May be,
M ^2A = M ^2B and X ^2A ≠ X ^2B
May be,
M ^2A ≠ M ^2B and X ^2A = X ^2B
It may be. However, it is not limited to these.

Examples of methods for forming the first A active region, the first B active region, the second A active region, and the second B active region include the following methods in addition to the PVD method and the CVD method. That is,
[A] A method in which a precursor of a transition metal chalcogenide-based material is formed into a thin film on a substrate (underlayer) and then heat-treated.
[B] A method of forming a thin film made of a transition metal oxide on a substrate (underlayer) and then reacting the transition metal in the transition metal oxide with the chalcogen in the material containing the chalcogen element.

Graphene refers to a 1 atom thick sheet of sp ² bonded carbon atoms, having a honeycomb-like hexagonal lattice structure made from carbon atoms and their bonds. In order to dope n-type or p-type impurities into the graphene film, for example, chemical doping may be performed. In order to perform chemical doping, specifically, a dopant layer may be formed on the graphene film. The dopant layer can be an electron-accepting (p-type) dopant layer, or it can be an electron-donating (n-type) dopant layer. Materials constituting the electron-accepting type (p-type) dopant layer include chlorides such as AuCl ₃ , HAuCl ₄ and PtCl ₄ ; acids such as HNO ₃ , H ₂ SO ₄ , HCl and nitromethane; Group III such as boron and aluminum Element: An electron-withdrawing molecule such as oxygen can be mentioned, and as a material constituting an electron-donating (n-type) dopant layer, in addition to a group V element such as nitrogen and phosphorus, a pyridine compound, a nitride, Examples thereof include electron-donating molecules such as alkali metals and aromatic compounds having an alkyl group.

  Graphene can be formed by, for example, a manufacturing method described below. In other words, a film containing a graphenization catalyst is formed on the base material. Then, simultaneously with supplying the vapor phase carbon supply source to the film containing the graphenization catalyst, the vapor phase carbon supply source is heat-treated to generate graphene. Thereafter, by cooling the graphene at a predetermined cooling rate, the film-like graphene can be formed on the film containing the graphene catalyst. As graphene catalyst, in addition to carbon compounds such as SiC, Ni, Co, Fe, Pt, Au, Al, Cr, Cu, Mg, Mn, Mo, Rh, Si, Ta, Ti, W, U, V, and Mention may be made of at least one metal selected from Zr. Further, as a vapor phase carbon source, for example, at least selected from carbon monoxide, methane, ethane, ethylene, ethanol, acetylene, propane, butane, butadiene, pentane, pentene, cyclopentadiene, hexane, cyclohexane, benzene and toluene One type of carbon source can be mentioned. And the graphene can be obtained by isolate | separating the film-form graphene formed as mentioned above from the film | membrane containing a graphene-ized catalyst.

  In the composite transistor having the first structure of the present disclosure, the first A active region and the first B active region overlap as described above, but the first A active region and the first B active region may be in contact with each other. Alternatively, a first boundary region may be provided between the first A active region and the first B active region. Similarly, the second A active region and the second B active region overlap as described above, but the second A active region and the second B active region may be in contact with each other, or the second A active region and the second B active region may be in contact with each other. A second boundary region may be provided between the region. The first boundary region and the second boundary region are composed of the first interlayer insulating layer and the second interlayer insulating layer described above.

In the composite transistor having the second structure of the present disclosure, the first A active region and the first B active region are opposed to each other, but the first A active region and the first B active region may be in contact with each other. In addition, a first boundary region may be provided between the first A active region and the first B active region. Similarly, the second A active region and the second B active region are opposed to each other, but the second A active region and the second B active region may be in contact with each other, or between the second A active region and the second B active region. A second boundary region may be provided. Examples of materials constituting the first boundary region and the second boundary region include SiO ₂ (including a natural oxide film), SiN, hexagonal boron nitride (hBN), and Al ₂ O ₃ .

In the composite transistor or the like of the present disclosure, as a material constituting the control electrode, polysilicon, polycide, metal silicide, metal nitride (for example, TiN), metal such as aluminum (Al) or gold (Au), graphene or ITO Examples of methods for forming the control electrode include various physical vapor deposition methods (PVD methods) including vacuum vapor deposition and sputtering methods, and various chemical vapor deposition methods (CVD methods). It can be illustrated. Further, as a material constituting the first electrode, the second electrode, and the third electrode, polysilicon doped with impurities; aluminum; tungsten, Ti, Pt, Pd, Cu, TiW, TiNW, WSi ₂ , MoSi _2, etc. A conductive material made of a refractory metal or a metal silicide can be exemplified, and various PVD methods and CVD methods can be exemplified as methods for forming these electrodes.

Furthermore, as a material constituting the insulating layer and the second insulating layer, a relative dielectric constant k (=) in addition to a SiO _x material such as silicon oxide (SiO ₂ ), a SiOF material, a SiN material, or a SiON material. A so-called high relative dielectric constant material having (ε / ε ₀ ) of approximately 4.0 or more can be mentioned. As high dielectric constant materials, hafnium oxide (HfO ₂ ), zirconium oxide (ZrO ₂ ), aluminum oxide (Al ₂ O ₃ ), aluminum oxide / hafnium (HfAlO ₂ ), silicon oxide / hafnium (HfSiO), tantalum oxide (HfSiO ₂ ) Examples thereof include metal oxide materials such as Ta ₂ O ₅ ), yttrium oxide (Y ₂ O ₃ ), and lanthanum oxide (La ₂ O), and metal nitride materials. Alternatively, an insulating material made of a metal silicate such as HfSiO, HfSiON, ZrSiO, AlSiO, LaSiO can be exemplified. The insulating layer and the second insulating layer may be formed of one type of material or may be formed of a plurality of types of materials. In addition, the insulating layer and the second insulating layer may have a single-layer structure or a multi-layer structure. As a method of forming the insulating layer and the second insulating layer, various CVD methods including ALD (Atomic Layer Deposition) method, metal organic chemical vapor deposition method (MOCVD method), various methods including vacuum deposition method and sputtering method. The PVD method can be exemplified. The thickness of the insulating layer can be 1 nm to 10 nm, and the thickness of the second insulating layer can be 1 nm to 10 nm.

Examples of materials constituting the first interlayer insulating layer and the second interlayer insulating layer include SiO ₂ , SiN, hexagonal boron nitride (hBN), and Al ₂ O ₃ , and the first interlayer insulating layer, Examples of the method for forming the second interlayer insulating layer include a low temperature oxidation method, a plasma CVD method, and an ALD method. Examples of the thickness of the first interlayer insulating layer and the second interlayer insulating layer include 1 nm to 3 nm.

  The composite transistor and the like of the present disclosure may be provided on a silicon semiconductor substrate having an insulating film formed on the surface, for example.

  Specifically, a so-called complementary transistor is configured by the composite transistor or the like of the present disclosure. In addition, a logic circuit such as an inverter circuit, a NAND circuit, an AND circuit, a NOR circuit, an OR circuit, an XOR circuit, or a NOT circuit can be configured by the composite transistor of the present disclosure, or an SRAM circuit can be configured. it can.

  Example 1 relates to a composite transistor of the present disclosure, and specifically relates to a composite transistor having the first structure of the present disclosure. A so-called complementary transistor is formed by the composite transistor of the first embodiment, and an inverter circuit is formed.

  FIG. 1A, FIG. 1B, and FIG. 1C show conceptual diagrams of the composite transistor of the first embodiment, and FIG. 2A and FIG. 2B schematically show the arrangement of components of the inverter circuit that is configured by the composite transistor of the first embodiment. FIG. 2C shows an equivalent circuit diagram of the inverter circuit configured by the composite transistor of the first embodiment. In FIG. 2C, for convenience, an equivalent circuit diagram of the inverter circuit is shown using a symbol of FET. FIG. 3 shows a schematic partial cross-sectional view of the composite transistor of Example 1. FIG. 4A shows the positional relationship between the first active region, the second active region, and the control electrode in the composite transistor of Example 1. 4B and FIG. 4C, conceptual partial cross-sectional views of the composite transistor of Example 1 are shown in FIGS. 5A, 5B, and 5C. 1A shows a state in which the first transistor is in a conductive state (on state) and a second transistor is in a non-conductive state (off state), and FIG. 1B shows that the first transistor is in a conductive state. FIG. 1C shows a state in which the second transistor is changed from a non-conductive state (off state) to a conductive state (on state) from the state (on state) to the non-conductive state (off state). The state is in a non-conduction state (off state) and the second transistor is in a conduction state (on state). 2A and 2B are actually overlapped.

The composite transistor of Example 1 or Example 2 to Example 3 described later is:
In the overlapping region, the first active regions 11, 11 ′, 11 ″, the second active regions 12, 12 ′, 12 ″, and the control electrode 60 overlap,
A first electrode 61, a second electrode 62, and a third electrode 63;
One of the control electrode 60 and the first active region 11, 11 ′, 11 ″ and the second active region 12, 12 ′, 12 ″ adjacent to the control electrode 60 (in the illustrated example, the first active region 11, 11 ′, 11 ″) is provided with an insulating layer 71. The control electrode 60 is made of, for example, TiN, and the first electrode 61, the second electrode 62, and the third electrode 63 are, for example, The insulating layer 71 is made of, for example, hafnium oxide (HfO ₂ ) having a thickness of 1 nm.

And
First A extending portions 111, 211, 311 extending from one end of the first active regions 11, 11 ′, 11 ″, and 1B extending from the other ends of the first active regions 11, 11 ′, 11 ″ In addition to the parts 121, 221 and 321, the second active regions 12, 12 'and 331 extending from one end of the second active regions 12, 12' and 12 ", and the second active regions 12, 12 'and 12" 2B extending portions 141, 241, 341 extending from the end,
The first electrode 61 is connected to the first A extending portions 111, 211, 311,
The second electrode 62 is connected to the second A extending portions 131, 231 and 331,
The third electrode 63 is connected to the first B extending parts 121, 221, 321 and the second B extending parts 141, 241, 341,
The control transistor 60, the first active regions 11, 11 ′, 11 ″, the first A extending portions 111, 211, 311 and the first B extending portions 121, 221, 321 constitute a _first transistor TR ₁ .
The control transistor 60, the second active regions 12, 12 ′, 12 ″, the second A extending portions 131, 231, 331 and the second B extending portions 141, 241, 341 constitute a _second transistor TR ₂ .

Here, in the composite transistor of Example 1 or Example 2 to Example 3 described later,
A voltage higher than that of the second electrode 62 is applied to the first electrode 61,
When the first voltage V ₁ (= 0 volt) is applied to the control electrode 60, the first transistor TR ₁ is turned on, the second transistor TR ₂ is turned off,
When a second voltage V ₂ (= V _dd > 0 volt) higher than the first voltage V ₁ (= 0 volt) is applied to the control electrode 60, the second transistor TR ₂ becomes conductive, The first transistor TR ₁ is turned off. The voltage applied to the first electrode 61 was V ₂ (= V _dd ), and the voltage applied to the second electrode 62 was V ₁ (= 0 volts <V ₂ = V _dd ). 1A, 1B, 1C, 7A, 7B, 7C, Figures 9A, 9B, in FIG. 9C, represents the voltage applied to the control electrode 60 at V _CE, it is applied to the third electrode 63 It represents the voltage at V _3.

  In the composite transistor of Example 1 or Examples 2 to 3 described later, the first active regions 11, 11 ′, 11 ″ and the second active regions 12, 12 ′, 12 ″ are made of a two-dimensional material or graphene. It is configured.

The composite transistor of Example 1 is specifically a composite transistor having the first structure of the present disclosure.
In the overlapping region, the first active region 11 includes a first A active region 110 and a first B active region 120 overlapping the first A active region 110.
The first A extending portion 111 extends from the first A active region 110,
The first B extension part 121 extends from the first B active region 120,
In the overlapping region, the second active region 12 includes a second A active region 130 and a second B active region 140 overlapping the second A active region 130,
The second A extension 131 extends from the second A active region 130,
The second B extending portion 141 extends from the second B active region 140.

The energy value E _V-1A of the upper end of the valence band of the first A active region 110 and the energy value E _C-1A of the lower end of the conduction band are respectively the upper end of the valence band of the first B active region 120. It is smaller than each of the energy value E _V-1B and the energy value E _C-1B at the lower end of the conduction band (see FIG. 25A). In addition, the energy value E _V-2A of the upper end of the valence band of the second A active region 130 and the energy value E _C-2A of the lower end of the conduction band are respectively the upper end of the valence band of the second B active region 140. It is larger than each of the energy value E _V-2B and the energy value E _C-2B at the lower end of the conduction band (see FIG. 25C).

The first A active region 110 (including the first A extending portion 111) is an n-type active region, specifically, made of WTe ₂ having a thickness of 1 nm, and the first B active region 120 (first B extending portion 121). Is a p-type active region, specifically, made of MoS ₂ having a thickness of 1 nm, and the _{second A} active region 130 (including the second A extending portion 131) is a p-type active region, Specifically, the second B active region 140 (including the second B extension portion 141) is made of MoS ₂ having a thickness of 1 nm, and is specifically an n-type active region. Specifically, the second B active region 140 is made of WTe ₂ having a thickness of 1 nm. Become. However, it is not limited to these materials and thickness. The extending direction of the first A extending part 111 and the first B extending part 121 and the extending direction of the second A extending part 131 and the second B extending part 141 coincide with each other.

  In the illustrated example, the second active region 12, the first active region 11, and the control electrode 60 overlap in this order, but the first active region 11, the second active region 12, and the control electrode 60 may overlap in this order. The order of overlap between the first A active region 110 and the first B active region 120 is that the first B active region 120 is located on the control electrode side, but the first A active region 110 may be located on the control electrode side. . The order of overlap between the second A active region 130 and the second B active region 140 is that the second B active region 140 is located on the control electrode side, but the second A active region 130 is located on the control electrode side. Also good. The composite transistor is formed on a silicon semiconductor substrate 70 on the surface of which an insulating film (not shown) is formed.

A second insulating layer 72 made of SiO ₂ having a thickness of 5 nm is provided between the first active region 11 and the second active region 12. A first interlayer insulating layer 73 corresponding to the first boundary region is provided between the first A active region 110 and the first B active region 120 and is made of HfO ₂ having a thickness of 1 nm. Between the region 130 and the second B active region 140, a second interlayer insulating layer 74 made of HfO ₂ having a thickness of 1 nm and corresponding to the second boundary region is provided.

The operations of the first transistor TR ₁ and the second transistor TR ₂ in the composite transistor of Example 1 are as described above with reference to FIGS. 25A, 25B, 25C, and 25D.

  In the overlapping region, the first active region 11 and the control electrode 60 overlap, but the orthographic image of the first active region 11 may be included in the orthographic image of the control electrode 60 (see FIG. 4A). ), May coincide with the orthographic image of the control electrode 60 (see FIG. 4B), or may protrude from the orthographic image of the control electrode 60 (see FIG. 4C). Similarly, in the overlapping region, the second active region 12 and the control electrode 60 overlap, but the orthographic image of the second active region 12 may be included in the orthographic image of the control electrode 60 ( 4A), may coincide with the orthogonal projection image of the control electrode 60 (see FIG. 4B), or may protrude from the orthogonal projection image of the control electrode 60 (see FIG. 4C). From the viewpoint that the electric field generated by the control electrode 60 is applied more uniformly, the orthogonal projection images of the first active region 11 and the second active region 12 are included in the orthogonal projection image of the control electrode 60. Is desirable.

  Further, in the overlapping region, the first A active region 110 and the first B active region 120 constituting the first active region 11 overlap, but the region where the first A active region 110 and the first B active region 120 overlap is correct. The projected image may be included in the orthographic image of the control electrode 60 (see FIG. 5A), may coincide with the orthographic image of the control electrode 60 (see FIG. 5B), or You may protrude from an orthogonal projection image (refer FIG. 5C). Similarly, in the overlapping region, the second A active region 130 and the second B active region 140 constituting the second active region 12 overlap, but the second A active region 130 and the second B active region 140 overlap. The orthographic image may be included in the orthographic image of the control electrode 60 (see FIG. 5A), may coincide with the orthographic image of the control electrode 60 (see FIG. 5B), or the control electrode 60. May protrude from the orthogonal projection image (see FIG. 5C).

  Hereinafter, an outline of a method for manufacturing the composite transistor of Example 1 will be described with reference to FIGS. 24A, 24B, 24C, and 24D.

That is, after forming MoS ₂ on the silicon semiconductor substrate 70 on which the insulating film (not shown) is formed based on the CVD method, the _{second A} active region 130 (second A extension) is formed by patterning into a desired shape. (Including the existing portion 131) (see FIG. 24A). The patterning can be performed based on, for example, an oxygen plasma etching method.

Next, a second interlayer insulating layer 74 is formed on the entire surface. Then, after forming WTe ₂ on the second interlayer insulating layer 74 based on the CVD method, the second B active region 140 (including the second B extending portion 141) is obtained by patterning into a desired shape. (See FIG. 24B).

Next, a second insulating layer 72 is formed on the entire surface. Then, after forming WTe ₂ on the second insulating layer 72 based on the CVD method, the first A active region 110 (including the first A extending portion 111) can be obtained by patterning into a desired shape. Yes (see FIG. 24C).

Next, a first interlayer insulating layer 73 is formed on the entire surface. Then, after forming MoS ₂ on the first interlayer insulating layer 73 based on the CVD method, the first B active region 120 (including the first B extending portion 121) is obtained by patterning into a desired shape. (See FIG. 24D).

  Next, an insulating layer 71 is formed on the entire surface. Then, the control electrode 60 is formed on the insulating layer 71. Thereafter, an upper interlayer insulating layer 75 is formed on the entire surface, and the first A extension portion 111, the second A extension portion 131, and the upper layer interlayer located above the first B extension portion 121 and the second B extension portion 141, respectively. By forming openings in the insulating layer 75 and embedding these openings with a conductive material, the first electrode 61, the second electrode 62, and the third electrode 63 are formed over the top surface of the upper interlayer insulating layer 75. (See FIG. 3).

  In the composite transistor according to the first embodiment, the control electrode, the first active region, and the second active region constituting the first transistor and the second transistor overlap with each other, so that the composite transistor is generated by one control electrode. The driving of the first transistor and the second transistor can be controlled based on the electric field (specifically, the vertical electric field), and not only can higher density be realized, but also the wiring can be simplified. As a result, a reduction in parasitic capacitance (that is, lower power consumption) can be achieved. Further, since the total thickness of the first active region and the second active region can be extremely reduced, the step can be reduced, and a conventional planar process can be applied. It is easy to connect to the contact.

A schematic plan view of the composite transistor of Example 1 is shown on the right hand side of FIG. 6, and a schematic plan view of a conventional CMOS circuit is shown on the left hand side of FIG. In FIG. 6, the control electrode (gate portion) is hatched to clearly indicate the control electrode (gate portion). When the minimum processing dimension is “F”, in the conventional CMOS circuit, the CMOS circuit occupies the length of “9F” in the Y direction. On the other hand, in the composite transistor of Example 1, the composite transistor occupies the length of “4F” in the Y direction. In the X direction, when the length occupied by the conventional CMOS circuit is “1”, the length occupied by the composite transistor of the first embodiment is “1.5”. Therefore, the footprint of the composite transistor of Example 1 is compared with the footprint of the conventional CMOS circuit,
(4/9) × 1.5 = 0.66 (times)
And the gate density is
1 / 0.66 = 1.5 (times)
It becomes. That is, a higher density can be realized. Moreover, since the transistors are not scaled, variations in transistor characteristics do not increase.

  Example 2 is a modification of the composite transistor of Example 1, and relates to a composite transistor having the second structure of the present disclosure. 7A, 7B, and 7C are conceptual diagrams of the composite transistor of Example 2, and FIG. 8A is a schematic partial cross-sectional view of the composite transistor of Example 2. FIG. 7A shows a state in which the first transistor is in a conductive state (on state) and a second transistor is in a non-conductive state (off state). FIG. 7B shows a state in which the first transistor is conductive. FIG. 7C shows a state in which the second transistor is changed from a non-conductive state (off state) to a conductive state (on state) from the state (on state) to the non-conductive state (off state). The state is in a non-conduction state (off state) and the second transistor is in a conduction state (on state).

In the composite transistor of Example 2 having the second structure of the present disclosure,
In the overlapping region, the first active region 11 ′ is composed of a first A active region 210 and a first B active region 220 that is located in the same virtual plane as the first A active region 210 and faces the first A active region 210,
The first A extending portion 211 extends from the first A active region 210,
The first B extension part 221 extends from the first B active region 220,
In the overlapping region, the second active region 12 ′ is composed of the second A active region 230 and the second B active region 240 that is located in the same virtual plane as the second A active region 230 and faces the second A active region 230.
The second A extension part 231 extends from the second A active region 230,
The second B extension part 241 extends from the second B active region 240.

The energy value E _V-1A of the upper end of the valence band of the first A active region 210 and the energy value E _C-1A of the lower end of the conduction band are respectively the upper end of the valence band of the first B active region 220. Smaller than each of the energy value E _V-1B and the energy value E _C-1B at the lower end of the conduction band,
The energy value E _{V-2A at} the upper end of the valence band of the second A active region 230 and the energy value E _C-2A at the lower end of the conduction band are respectively the energy at the upper end of the valence band of the second B active region 240. It is larger than the value E _V-2B and the energy value E _C-2B at the lower end of the conduction band.

Here, when the composite transistor of Example 2 is off,
E _C-1B > E _C-1A > E _V-1B > E _V-1A
as well as,
E _C-2A > E _C-2B > E _V-2A > E _V-2B
When the composite transistor is on,
E _C-1B > E _V-1B > E _C-1A > E _V-1A
as well as,
E _C-2A > E _V-2A > E _C-2B > E _V-2B
Satisfied.

  A second insulating layer 72 is provided between the first active region 11 'and the second active region 12'. In addition, a first boundary region 212 is provided between the first A active region 210 and the first B active region 220, and a second boundary region 232 is provided between the second A active region 230 and the second B active region 240. It has been. As shown in FIG. 8B, the first A active region 210 and the first B active region 220 may be in contact with each other, or the second A active region 230 and the second B active region 240 may be in contact with each other.

The first A active region 210 (including the first A extending portion 211) is an n-type active region, specifically, made of WTe ₂ having a thickness of 3 nm, and the first B active region 220 (first B extending portion 221). Is a p-type active region, specifically, made of WTe ₂ having a thickness of 3 nm, and the _{second A} active region 230 (including the second A extending portion 231) is a p-type active region, Specifically, it is made of MoS ₂ having a thickness of 3 nm, and the second B active region 240 (including the second B extending portion 241) is an n-type active region, specifically, made of MoS ₂ having a thickness of 3 nm. The first boundary region 212 is an intrinsic active region, specifically, WTe ₂ having a thickness of 3 nm, and the second boundary region 232 is also an intrinsic active region, specifically, And made of MoS _{2 with} a thickness of 3 nm.

  An outline of a method for manufacturing the composite transistor of Example 2 will be described below.

That is, after forming MoS ₂ on the silicon semiconductor substrate 70 on which the insulating film is formed based on the CVD method, the _{second A} active region 230 (including the second A extending portion 231 is included) by patterning into a desired shape. ), The second B active region 240 (including the second B extending portion 241), and the region and the portion to be the second boundary region 232 are obtained. Then, based on the chemical doping method, the second A active region 230 (including the second A extending portion 231) that is a p-type active region is formed, and the second B active region 240 (second B extending) that is an n-type active region is formed. Present portion 241). Note that when the chemical doping method is performed, a mask layer may be formed in order to prevent an undesired region from being doped.

Next, a second insulating layer 72 is formed on the entire surface. Then, WTe ₂ is formed on the second insulating layer 72 based on the CVD method, and then patterned into a desired shape, whereby the first A active region 210 (including the first A extending portion 211), the first B An active region 220 (including the first B extending portion 221) and a region and a portion that become the first boundary region 212 are obtained. Thereafter, based on the chemical doping method, a first A active region 210 (including the first A extending portion 211) that is an n-type active region is formed, and a first B active region 220 (first B extension) that is a p-type active region is formed. Present portion 221).

  Next, an insulating layer 71 is formed on the entire surface. Then, the control electrode 60 is formed on the insulating layer 71. Thereafter, an upper interlayer insulating layer 75 is formed on the entire surface, and the first interlayer extension 211, the second A extension 231 and the upper interlayers located above the first B extension 221 and the second B extension 241 respectively. By forming openings in the insulating layer 75 and embedding these openings with a conductive material, the first electrode 61, the second electrode 62, and the third electrode 63 are formed over the top surface of the upper interlayer insulating layer 75. be able to.

  Example 3 is also a modification of the composite transistor of Example 1, but relates to a composite transistor having the third structure of the present disclosure. 9A, 9B, and 9C are conceptual diagrams of the composite transistor of Example 3, and FIG. 10 is a schematic partial cross-sectional view of the composite transistor of Example 3. 9A shows a state where the first transistor is in a conductive state (on state) and a second transistor is in a non-conductive state (off state), and FIG. 9B shows a state in which the first transistor is conductive. FIG. 9C shows a state in which the second transistor is changed from a non-conductive state (off state) to a conductive state (on state) from the state (on state) to the non-conductive state (off state). The state is in a non-conduction state (off state) and the second transistor is in a conduction state (on state).

In the composite transistor of Example 3 having the third structure of the present disclosure,
In the overlapping region, the first active region 11 ″ is composed of the first channel forming region 310,
The first A extension portion 311 extends from one end of the first channel formation region 310,
The first B extension part 321 extends from the other end of the first channel formation region 310,
In the overlapping region, the second active region 12 ″ is composed of the second channel forming region 330,
The second A extending portion 331 extends from one end of the second channel forming region 330,
The second B extending portion 341 extends from the other end of the second channel forming region 330.

When the first voltage V ₁ is applied to the control electrode 60, the first transistor TR ₁ is in a conductive state, the second transistor TR ₂ is in a non-conductive state, and the first voltage is applied to the control electrode 60. when the high second voltage V ₂ than V ₁ (> V ₁₎ is applied, the second transistor TR ₂ becomes conductive, the first transistor TR ₁ becomes non-conductive state. Here, the operation of the composite transistor of Example 3 is basically the same as the operation of the conventional field effect transistor.

In the composite transistor of Example 3, the second insulating layer 72 is provided between the first active region 11 "and the second active region 12". In the composite transistor of Example 3, the first active region 11 ″ (first channel forming region 310) is made of WTe ₂ having a thickness of 3 nm, and the second active region 12 ″ (second channel forming region 330) is It consists of 3 nm thick MoS ₂ . The first A extension part 311 and the first B extension part 321 are made of 3 nm thick WTe ₂ doped with p-type impurities, and the _{second A} extension part 331 and the second B extension part 341 are n-type. It consists of 3 nm thick MoS ₂ doped with impurities.

  An outline of a method for manufacturing the composite transistor of Example 3 will be described below.

That is, after forming MoS ₂ on the silicon semiconductor substrate 70 on which the insulating film is formed based on the CVD method, the second channel forming region 330, the second A extending portion 331, A region and a portion to be the second B extending portion 341 are obtained. Then, based on the ion implantation method, the second A extending portion 331 and the second B extending portion 341 containing n-type impurities are formed. When the ion implantation method is performed, a mask layer may be formed in order to prevent an undesired region from being ion implanted.

Next, a second insulating layer 72 is formed on the entire surface. Then, after forming WTe ₂ on the second insulating layer 72 based on the CVD method, the first channel forming region 310, the first A extending portion 311 and the first B extending are formed by patterning into a desired shape. A region and a part to be the part 321 are obtained. Thereafter, the first A extending portion 311 and the first B extending portion 321 containing a p-type impurity are formed based on an ion implantation method.

  Next, an insulating layer 71 is formed on the entire surface. Then, the control electrode 60 is formed on the insulating layer 71. Thereafter, an upper interlayer insulating layer 75 is formed on the entire surface, and the first A extension portion 311, the second A extension portion 331, and the upper layer interlayer located above the first B extension portion 321 and the second B extension portion 341, respectively. By forming openings in the insulating layer 75 and embedding these openings with a conductive material, the first electrode 61, the second electrode 62, and the third electrode 63 are formed over the top surface of the upper interlayer insulating layer 75. be able to.

  The fourth embodiment is a modification of the first to third embodiments, and relates to a logic circuit including the composite transistor described in the first to third embodiments.

  FIG. 11A shows an equivalent circuit diagram of a NAND circuit formed on the basis of the composite transistor of the first embodiment, the second embodiment, and the third embodiment, and the arrangement of the components of the NAND circuit configured by the composite transistor of the first embodiment. Is schematically shown in FIGS. 11B and 11C. Note that FIG. 11B and FIG. 11C actually overlap. Furthermore, FIGS. 12A, 12B, and 12C respectively show conceptual partial cross-sectional views of NAND circuits formed based on the composite transistors of the first, second, and third embodiments. Here, the equivalent circuit diagram shown in FIG. 11A is based on the composite transistor of the first embodiment.

The NAND circuit is composed of four transistors Tr ₁ , Tr ₂ , Tr ₃ , Tr ₄ . Here, in the illustrated example, the first transistor Tr ₁ and the second transistor Tr ₂ are formed of the composite transistor of the present disclosure. That is, the first transistor Tr ₁ corresponds to the first transistor TR ₁ , and the second transistor Tr ₂ corresponds to the second transistor TR ₂ .

The first transistor TR ₁ (Tr ₁ ) includes a control electrode 60 ₁ , first active regions 11 ₁ , 11 ′ ₁ , 11 ″ ₁ , first A extending portions 111 ₁ , 211 ₁ , 311 ₁ and 1B extending. part 121 _1, 221 _1, and a 321 _1. the second transistor TR ₂ (Tr _2), the control electrode 60 _1, the second active region 12 _2, 12 _'2, 12' _2, the 2A extending portions 131 ₂ , 231 ₂ , 331 ₂ and second B extending portions 141 ₂ , 241 ₂ , 341 ₂ are included.

Further, the third transistor Tr ₃ constituting the NAND circuit is substantially constituted by the first transistor TR ₁ , specifically, the control electrode 60 ₂ , the first active regions 11 ₃ , 11 ′ ₃ , 11 ″ ₃ , first A extending portions 111 ₃ , 211 ₃ , 311 ₃ and 1B extending portions 121 ₃ , 221 ₃ , 321 _{3. Further} , the fourth transistor Tr ₄ constituting the NAND circuit is The second transistor TR _{2 is} substantially composed of the control electrode 60 ₂ , the second active regions 12 ₄ , 12 ′ ₄ , 12 ″ ₄ , and the second A extending portions 131 ₄ , 231 _4. , 331 ₄ and second B extending portions 141 ₄ , 241 ₄ , 341 ₄ . The _{second A} extending portion 1312 and the second B extending portion 141 ₄ are connected via the connecting portion 64.

  FIG. 13 schematically shows the arrangement of active regions and the like when a NAND circuit formed on the basis of the composite transistor of Example 1 is cut at four levels of virtual planes. In FIG. 13, FIG. 14A, FIG. 14B, FIG. 17, FIG. 18A, FIG. 18B, FIG. 23A, and FIG.

Here, in FIG. 13, in the upper stage, the first B active regions 120 ₁ and 120 ₃ positioned at the level closest to the control electrode (first level), the first B extending portions 121 ₁ and 121 ₃ , and The first A active regions 110 ₁ , 110 ₃ and the first A extending portions 111 ₁ , 111 ₃ located at the second level below the first level are shown. Further, in FIG. 13, the lower stage includes second B active regions 140 ₂ and 140 ₄ located at a third level below the second level, second B extending portions 141 ₂ and 141 ₄ , and a third level. The _{second A} active regions 130 ₂ and 130 ₄ and the second A extending portions 131 ₂ and 131 ₄ located at the lowermost lower level (fourth level) are shown.

Further, FIG. 14A schematically shows an arrangement of active regions and the like when a NAND circuit formed based on the composite transistor of Example 2 is cut at two levels of virtual planes. In FIG. 14A, in the upper part, the first A active regions 210 ₁ and 210 ₃ , the first B active regions 220 ₁ and 220 ₃ , the _{first A} extending portions 211A ₁ , which are located at the level closest to the control electrode (first level) are shown. 211A ₃ and the first B extending portions 221B ₁ and 221B ₃ are shown. Further, in FIG. 14A, in the lower part, the second A active regions 230 ₂ and 230 ₄ , the second B active regions 240 ₂ and 240 ₄ , the _{second A} extending portions 231A ₂ , 231A ₄ and the second B extending portions 241B ₂ and 241B ₄ are shown.

Furthermore, FIG. 14B schematically shows the arrangement of active regions and the like when a NAND circuit formed based on the composite transistor of Example 3 is cut at two levels of virtual planes. In FIG. 14B, in the upper stage, the first channel forming regions 310 ₁ and 310 ₃ , the first A extending portions 311A ₁ and 311A ₃ , and the first B extending at the level closest to the control electrode (first level). The parts 321B ₁ and 321B ₃ are shown. Further, in FIG. 14B, in the lower stage, the second channel forming regions 330 ₂ and 330 ₄ , the _{second A} extending portions 331A ₂ and 331A ₄ , and the second B extending are located at the second level below the first level. The parts 341B ₂ and 341B ₄ are shown.

  FIG. 15A shows an equivalent circuit diagram of a NOR circuit formed on the basis of the composite transistor of the first embodiment, the second embodiment, and the third embodiment. The arrangement of the components of the NOR circuit configured by the composite transistor of the first embodiment is shown in FIG. Is schematically shown in FIGS. 15B and 15C. Note that FIG. 15B and FIG. 15C actually overlap. Further, FIGS. 16A, 16B, and 16C respectively show conceptual partial cross-sectional views of the NOR circuit formed based on the composite transistors of the first, second, and third embodiments. Here, the equivalent circuit diagram shown in FIG. 15A is based on the composite transistor of the first embodiment.

The NOR circuit is also composed of _four transistors Tr ₁ , Tr ₂ , Tr ₃ , Tr ₄ . Here, in the illustrated example, the first transistor Tr ₁ and the second transistor Tr ₂ are formed of the composite transistor of the present disclosure. That is, the first transistor Tr ₁ corresponds to the first transistor TR ₁ , and the second transistor Tr ₂ corresponds to the second transistor TR ₂ .

The first transistor TR ₁ (Tr ₁ ) includes a control electrode 60 ₁ , first active regions 11 ₁ , 11 ′ ₁ , 11 ″ ₁ , first A extending portions 111 ₁ , 211 ₁ , 311 ₁ and 1B extending. part 121 _1, 221 _1, and a 321 _1. the second transistor TR ₂ (Tr _2), the control electrode 60 _1, the second active region 12 _2, 12 _'2, 12' _2, the 2A extending portions 131 ₂ , 231 ₂ , 331 ₂ and second B extending portions 141 ₂ , 241 ₂ , 341 ₂ are included.

Further, the third transistor Tr ₃ constituting the NOR circuit is substantially constituted by the first transistor TR ₁ , specifically, the control electrode 60 ₂ , the first active regions 11 ₃ , 11 ′ ₃ , 11 ″ ₃ , first A extending portions 111 ₃ , 211 ₃ , 311 _3, and 1B extending portions 121 ₃ , 221 ₃ , 321 _3. The fourth transistor Tr ₄ constituting the NOR circuit includes The second transistor TR _{2 is} substantially composed of the control electrode 60 ₂ , the second active regions 12 ₄ , 12 ′ ₄ , 12 ″ ₄ , and the second A extending portions 131 ₄ , 231 _4. , 331 ₄ and second B extending portions 141 ₄ , 241 ₄ , 341 ₄ .

  FIG. 17 schematically shows the arrangement of active regions and the like when the NOR circuit formed based on the composite transistor of Example 1 is cut along four levels of virtual planes.

Here, in FIG. 17, in the upper stage, the first A active region 110 ₁ , the first B active region 120 ₃ , the first A extending portion 111 ₁ , the first level, which are located at the level closest to the control electrode (first level). 1B extending portion 121 ₃ , and first B active region 120 ₁ , first A active region 110 ₃ , and 1B extending portion 121 ₁ , 1A extending portion located at the second level below the first level 111 ₃ is shown. Further, in FIG. 17, in the lower part, the second B active regions 140 ₂ and 140 ₄ located at the third level below the second level, the second B extending portions 141 ₂ and 141 ₄ , and the third level are shown. The _{second A} active regions 130 ₂ and 130 ₄ and the second A extending portions 131 ₂ and 131 ₄ located at the lowermost lower level (fourth level) are shown.

FIG. 18A schematically shows the arrangement of active regions and the like when a NOR circuit formed based on the composite transistor of Example 2 is cut at two levels of virtual planes. In FIG. 18A, in the upper stage, the first A active regions 210 ₁ and 210 ₃ , the first A extending portions 211A ₁ and 211A ₃ , and the first B extending portions located at the level closest to the control electrode (first level) are shown. 221B ₁ and 221B ₃ are shown. Further, in FIG. 18A, in the lower stage, the second A active regions 230 ₂ and 230 ₄ , the _{second A} extending portions 231A ₂ and 231A ₄ , and the second B extending portions located at the second level below the first level are shown. 241B ₂ and 241B ₄ are shown.

Furthermore, FIG. 18B schematically shows the arrangement of active regions and the like when a NOR circuit formed based on the composite transistor of Example 3 is cut at two levels of virtual planes. In FIG. 18B, in the upper stage, the first channel forming regions 310 ₁ and 310 ₃ , the first A extending portions 311A ₁ and 311A ₃ , and the first B extending are located at the level closest to the control electrode (first level). The parts 321B ₁ and 321B ₃ are shown. Further, in FIG. 18B, in the lower stage, second channel forming regions 330 ₂ and 330 ₄ , second A extending portions 331A ₂ and 331A ₄ , and second B extending located at the second level below the first level are shown. The parts 341B ₂ and 341B ₄ are shown.

  FIG. 19 shows an equivalent circuit diagram of an SRAM circuit composed of eight transistors formed on the basis of the composite transistors of the first embodiment, the second embodiment, and the third embodiment. The arrangement of the components of the SRAM circuit is schematically shown in FIGS. 20A and 20B. Note that the SRAM circuit components shown in the upper part of FIG. 20A and the SRAM circuit elements shown in the upper part of FIG. 20B actually overlap each other. In addition, the constituent elements of the SRAM circuit shown in the middle stage in FIG. 20A and the constituent elements of the SRAM circuit shown in the lower stage in FIG. 20B actually overlap each other. Further, FIGS. 21A and 21B are conceptual partial cross-sectional views of an SRAM circuit formed based on the composite transistor of the first embodiment. Further, FIGS. 22A and 22B are conceptual partial cross-sectional views of the SRAM circuit formed based on the composite transistor of the second embodiment, and the conceptual diagram of the SRAM circuit formed based on the composite transistor of the third embodiment. A partial cross-sectional view is shown in FIGS. 22C and 22D. Here, the equivalent circuit diagram shown in FIG. 19 is based on the composite transistor of the first embodiment.

The SRAM circuit in the fourth embodiment includes eight transistors Tr ₁ , Tr ₂ , Tr ₃ , Tr ₄ , Tr ₅ , Tr ₆ , Tr ₇ and Tr ₈ . Since the circuit configuration of the SRAM circuit itself is well known, detailed description thereof is omitted.

Here, one end of the transistor Tr ₃ is connected to the write bit line WBL via the connection portion 65 ′, and the control electrode 60 ₂ ′ of the transistor Tr ₃ is connected to the write word line WWL. One end of the transistor Tr ₆ is connected to the write bit line WBX via the connection portion 65, and the control electrode 60 ₂ of the transistor Tr ₆ is connected to the write word line WWL. Furthermore, one end of the transistor Tr ₇ is connected to the read bit line RBL via connection 66, the control electrode 60 and _fourth transistors Tr ₇ is connected to the read word line RWL. Further, the control electrode 60 ₃ of the transistor Tr ₈ are connected to the third electrode 63, one end of the transistor Tr ₈ is connected to the other end of the transistor Tr _7, the other end of the transistor Tr ₈ is grounded via a connection 67 ing.

Here, in the illustrated example, the fourth transistor Tr ₄ and the fifth transistor Tr ₅ are configured by the composite transistor of the present disclosure. That is, the fourth transistor Tr ₄ corresponds to the first transistor TR ₁ , and the fifth transistor Tr ₅ corresponds to the second transistor TR ₂ . The first transistor Tr ₁ and the second transistor Tr ₂ have the same configuration and structure as the composite transistor of the present disclosure except that the third electrode is not provided. That is, the first transistor Tr ₁ corresponds to the first transistor TR ₁ , and the second transistor Tr ₂ corresponds to the second transistor TR ₂ . The first transistor Tr ₁ includes a control electrode 60 ₁ ′ and is connected to the first electrode 61 and the connection portion A. The second transistor Tr ₂ includes a control electrode 60 ₁ ′ and is connected to the second electrode 62 and the connection portion A. The third transistor Tr ₃ includes a control electrode 60 ₂ ′ and is connected to the connection portion 65 ′ and the connection portion A.

In the following description, the fourth transistor Tr ₄ , the fifth transistor Tr ₅ , the sixth transistor Tr ₆ , the seventh transistor Tr ₇ , and the eighth transistor Tr ₈ will be described. The first transistor Tr ₁ , the second transistor Description of Tr ₂ and the third transistor Tr ₃ is omitted.

The first transistor TR ₁ (fourth transistor Tr ₁ ) includes a control electrode 60 ₁ , first active regions 11 ₁ , 11 ′ ₁ , 11 ″ ₁ , first A extending portions 111 ₄ , 211 ₄ , 311 ₄ and 1B extending portions 121 ₄ , 221 ₄ , 321 ₄ , and the second transistor TR ₂ (fifth transistor Tr ₅ ) includes a control electrode 60 ₁ , second active regions 12 ₅ , 12 ′ _5. , 12 ″ ₅ , second A extending portions 131 ₅ , 231 ₅ , 331 _5, and second B extending portions 141 ₅ , 241 ₅ , 341 ₅ .

Furthermore, the sixth transistor Tr ₆ is substantially composed of the second transistor TR ₂ , specifically, the control electrode 60 ₂ , the first active regions 12 ₆ , 12 ′ ₆ , 12 ″ ₆ , 2A extending portions 131 ₆ , 231 ₆ , 331 ₆ and 2B extending portions 141 ₆ , 241 ₆ , 341 ₆ are included.

The seventh transistor Tr _{7 is} also substantially composed of the second transistor TR ₂ , specifically, the control electrode 60 ₄ , the first active regions 12 ₇ , 12 ′ ₇ , 12 ″ ₇ , and the second A extension. It is composed of parts 131 ₇ , 231 ₇ , 331 ₇ and second B extending parts 141 ₇ , 241 ₇ , 341 ₇ .

The eighth transistor Tr _{8 is} also substantially composed of the second transistor TR ₂ , specifically, the control electrode 60 ₄ , the first active regions 12 ₈ , 12 ′ ₈ , 12 ″ ₈ , and the second A extension. part 131 _8, 231 _8, 331 ₈ and being constructed from a 2B extending portion 141 _8, 241 _8, 341 _8. the 2B extending portion 141 ₈ constituting the eighth transistor Tr ₈ and the seventh transistor Tr ₇ and the 2A extending portion 131 ₇ constituting the are connected via a connecting portion 68.

23A and 23B schematically show the arrangement of active regions and the like when the SRAM circuit formed based on the composite transistor of Example 1 is cut at four levels and one level of virtual plane. In FIG. 23A, in the upper stage, the first B active region 120 ₄ and the first B extending portion 121 ₄ located at the level closest to the control electrode (first level), and the second level below the first level are shown. The first A active region 110 ₄ and the first A extending portion 111 ₄ are shown. Furthermore, in FIG. 23A, the lower stage includes second B active regions 140 ₅ , 140 ₆ located at a third level below the second level, second B extending portions 141 ₅ , 141 ₆ , and third the 2A active region 130 _5, 130 ₆ located lowermost level below the level (fourth level), and shows a first 2A extending portion 131 _5, 131 _6.

In FIG. 23B, the second B active regions 140 ₇ and 140 ₈ located at the level closest to the control electrode (first level), the second B extending portions 141 ₇ and 141 ₈ , and the first level the 2A active region 130 _7, 130 ₈ located in the second level below, and shows a first 2A extending portion 131 _7, 131 _8.

  The composite transistor of the present disclosure has been described based on the preferred embodiments. However, the configuration, structure, constituent material, manufacturing method, and the like of the composite transistor of the present disclosure are not limited to the embodiments, and may be changed as appropriate. can do. Further, various application examples of the composite transistor of the present disclosure described in the embodiments are also examples, and needless to say, the present invention can be applied to other circuit examples.

In addition, this indication can also take the following structures.
[A01] << Composite transistor >>
In the overlapping region, the first active region, the second active region and the control electrode overlap,
A first electrode, a second electrode and a third electrode;
An insulating layer is provided between the control electrode and one of the first active region and the second active region adjacent to the control electrode,
A first A extending portion extending from one end of the first active region, a first B extending portion extending from the other end of the first active region, a second A extending portion extending from one end of the second active region, and A second B extending portion extending from the other end of the second active region,
The first electrode is connected to the first A extending portion,
The second electrode is connected to the second A extension,
The third electrode is connected to the first B extension part and the second B extension part,
The control transistor, the first active region, the first A extension portion and the first B extension portion constitute a first transistor,
A composite transistor in which a second transistor is composed of a control electrode, a second active region, a second A extending portion, and a second B extending portion.
[A02] A voltage higher than that of the second electrode is applied to the first electrode,
When the first voltage is applied to the control electrode, the first transistor becomes conductive, the second transistor becomes non-conductive,
The composite transistor according to [A01], wherein when the second voltage higher than the first voltage is applied to the control electrode, the second transistor is turned on and the first transistor is turned off.
[A03] The composite transistor according to [A01] or [A02], in which the first active region and the second active region are made of a two-dimensional material or graphene.
[A04] << Composite transistor: first structure >>
In the overlapping region, the first active region is composed of the first A active region and the 1B active region overlapping the first A active region,
The 1A extension extends from the 1A active region,
The 1B extension extends from the 1B active region,
In the overlapping region, the second active region is composed of a second A active region and a second B active region overlapping the second A active region,
The second A extension extends from the second A active region;
The second B extending portion extends from the second B active region,
The energy value E _{V-1A at} the upper end of the valence band in the 1A active region and the energy value E _C-1A at the lower end of the conduction band are respectively the energy value E _{V-1A at} the upper end of the valence band in the 1B active region. Smaller than each of _V-1B and the energy value E _C-1B at the lower end of the conduction band,
The energy value E _{V-2A at} the upper end of the valence band in the 2A active region and the energy value E _C-2A at the lower end of the conduction band are respectively the energy value E at the upper end of the valence band in the 2B active region. The composite transistor according to any one of [A01] to [A03], which is larger than each of _V-2B and the energy value E _C-2B of the lower end of the conduction band.
[A05] The composite transistor according to [A04], in which a second insulating layer is provided between the first active region and the second active region.
[A06] A first interlayer insulating layer is provided between the first A active region and the first B active region,
The composite transistor according to [A05], in which a second interlayer insulating layer is provided between the second A active region and the second B active region.
[A07] << Composite transistor: second structure >>
In the overlapping region, the first active region is composed of a first A active region and a first B active region located in the same virtual plane as the first A active region and facing the first A active region,
The 1A extension extends from the 1A active region,
The 1B extension extends from the 1B active region,
In the overlapping region, the second active region is composed of the second A active region and the second B active region located in the same virtual plane as the second A active region and facing the second A active region,
The second A extension extends from the second A active region;
The second B extending portion extends from the second B active region,
The energy value E _{V-1A at} the upper end of the valence band in the 1A active region and the energy value E _C-1A at the lower end of the conduction band are respectively the energy value E _{V-1A at} the upper end of the valence band in the 1B active region. Smaller than each of _V-1B and the energy value E _C-1B at the lower end of the conduction band,
The energy value E _{V-2A at} the upper end of the valence band in the 2A active region and the energy value E _C-2A at the lower end of the conduction band are respectively the energy value E at the upper end of the valence band in the 2B active region. The composite transistor according to any one of [A01] to [A03], which is larger than each of _V-2B and the energy value E _C-2B of the lower end of the conduction band.
[A08] The composite transistor according to [A07], in which a second insulating layer is provided between the first active region and the second active region.
[A09] << Composite Transistor: Third Structure >>
In the overlapping region, the first active region comprises a first channel formation region,
The first A extending portion extends from one end of the first channel forming region,
The first B extension portion extends from the other end of the first channel formation region,
In the overlapping region, the second active region comprises a second channel forming region,
The second A extension portion extends from one end of the second channel formation region,
The second B extension portion extends from the other end of the second channel formation region,
When the first voltage is applied to the control electrode, the first transistor becomes conductive, the second transistor becomes non-conductive,
The composite transistor according to [A01], wherein when the second voltage higher than the first voltage is applied to the control electrode, the second transistor is turned on and the first transistor is turned off.
[A10] The composite transistor according to [A09], in which a second insulating layer is provided between the first active region and the second active region.
[A11] The composite transistor according to [A09] or [A10], in which the first active region and the second active region are made of a two-dimensional material or graphene.

11, 11 ', 11 "... 1st active region, 12, 12', 12" ... 2nd active region, 60, 60 '... Control electrode, 61 ... 1st electrode, 62. .. Second electrode, 63... Third electrode, 64, 65, 65 ′, 66, 67, 68... Connection part, 70... Silicon semiconductor substrate, 71. Second insulating layer 73 ... first interlayer insulating layer (first boundary region), 74 ... second interlayer insulating layer (second boundary region), 75 ... upper interlayer insulating layer 110, 210... 1A active region, 120 and 220... 1B active region, 130 and 230... 2A active region, 140 and 240... 2B active region, 310. Region, 330... Second channel formation region, 111, 211, 311... 1A extension portion, 121, 221, 3 21... 1B extension part, 131, 231, 331... 2A extension part, 141, 241 and 341... 2B extension part, 212. Second boundary region, TR ₁ ... first transistor, TR ₂ ... second transistor

Claims (11)

In the overlapping region, the first active region, the second active region and the control electrode overlap,
A first electrode, a second electrode and a third electrode;
An insulating layer is provided between the control electrode and one of the first active region and the second active region adjacent to the control electrode,
A first A extending portion extending from one end of the first active region, a first B extending portion extending from the other end of the first active region, a second A extending portion extending from one end of the second active region, and A second B extending portion extending from the other end of the second active region,
The first electrode is connected to the first A extending portion,
The second electrode is connected to the second A extension,
The third electrode is connected to the first B extension part and the second B extension part,
The control transistor, the first active region, the first A extension portion and the first B extension portion constitute a first transistor,
A composite transistor in which a second transistor is composed of a control electrode, a second active region, a second A extending portion, and a second B extending portion. A voltage higher than that of the second electrode is applied to the first electrode,
When the first voltage is applied to the control electrode, the first transistor becomes conductive, the second transistor becomes non-conductive,
2. The composite transistor according to claim 1, wherein when a second voltage higher than the first voltage is applied to the control electrode, the second transistor is turned on and the first transistor is turned off.   The composite transistor according to claim 1, wherein the first active region and the second active region are made of a two-dimensional material or graphene. In the overlapping region, the first active region is composed of the first A active region and the 1B active region overlapping the first A active region,
The 1A extension extends from the 1A active region,
The 1B extension extends from the 1B active region,
In the overlapping region, the second active region is composed of a second A active region and a second B active region overlapping the second A active region,
The second A extension extends from the second A active region;
The second B extending portion extends from the second B active region,
The energy value E _{V-1A at} the upper end of the valence band in the 1A active region and the energy value E _C-1A at the lower end of the conduction band are respectively the energy value E _{V-1A at} the upper end of the valence band in the 1B active region. Smaller than each of _V-1B and the energy value E _C-1B at the lower end of the conduction band,
The energy value E _{V-2A at} the upper end of the valence band in the 2A active region and the energy value E _C-2A at the lower end of the conduction band are respectively the energy value E at the upper end of the valence band in the 2B active region. _2. The composite transistor according to claim 1, wherein the composite transistor is larger than each of _V-2B and the energy value E _C-2B of the lower end of the conduction band.   The composite transistor according to claim 4, wherein a second insulating layer is provided between the first active region and the second active region. A first interlayer insulating layer is provided between the first A active region and the first B active region,
6. The composite transistor according to claim 5, wherein a second interlayer insulating layer is provided between the second A active region and the second B active region. In the overlapping region, the first active region is composed of a first A active region and a first B active region located in the same virtual plane as the first A active region and facing the first A active region,
The 1A extension extends from the 1A active region,
The 1B extension extends from the 1B active region,
In the overlapping region, the second active region is composed of the second A active region and the second B active region located in the same virtual plane as the second A active region and facing the second A active region,
The second A extension extends from the second A active region;
The second B extending portion extends from the second B active region,
The energy value E _{V-1A at} the upper end of the valence band in the 1A active region and the energy value E _C-1A at the lower end of the conduction band are respectively the energy value E _{V-1A at} the upper end of the valence band in the 1B active region. Smaller than each of _V-1B and the energy value E _C-1B at the lower end of the conduction band,
The energy value E _{V-2A at} the upper end of the valence band in the 2A active region and the energy value E _C-2A at the lower end of the conduction band are respectively the energy value E at the upper end of the valence band in the 2B active region. _2. The composite transistor according to claim 1, wherein the composite transistor is larger than each of _V-2B and the energy value E _C-2B of the lower end of the conduction band.   The composite transistor according to claim 7, wherein a second insulating layer is provided between the first active region and the second active region. In the overlapping region, the first active region comprises a first channel formation region,
The first A extending portion extends from one end of the first channel forming region,
The first B extension portion extends from the other end of the first channel formation region,
In the overlapping region, the second active region comprises a second channel forming region,
The second A extension portion extends from one end of the second channel formation region,
The second B extension portion extends from the other end of the second channel formation region,
When the first voltage is applied to the control electrode, the first transistor becomes conductive, the second transistor becomes non-conductive,
2. The composite transistor according to claim 1, wherein when a second voltage higher than the first voltage is applied to the control electrode, the second transistor is turned on and the first transistor is turned off.   The composite transistor according to claim 9, wherein a second insulating layer is provided between the first active region and the second active region.   The composite transistor according to claim 9, wherein the first active region and the second active region are made of a two-dimensional material or graphene.

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