JPWO2008032365A1 - Electronic device and manufacturing method thereof - Google Patents

Electronic device and manufacturing method thereof Download PDF

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JPWO2008032365A1
JPWO2008032365A1 JP2008534168A JP2008534168A JPWO2008032365A1 JP WO2008032365 A1 JPWO2008032365 A1 JP WO2008032365A1 JP 2008534168 A JP2008534168 A JP 2008534168A JP 2008534168 A JP2008534168 A JP 2008534168A JP WO2008032365 A1 JPWO2008032365 A1 JP WO2008032365A1
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solder
pattern
substrate
electrode
electrostatic discharge
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JP4847535B2 (en
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大輔 関
大輔 関
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Fujitsu Ltd
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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00Screening of apparatus or components against electric or magnetic fields
    • H05K9/0067Devices for protecting against damage from electrostatic discharge
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
    • H05K1/0257Overvoltage protection
    • H05K1/0259Electrostatic discharge [ESD] protection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof

Abstract

少なくとも電極を有する基板から構成された電子機器の製造方法において、前記電極近傍に静電気放電保護部のパターンを基板上に形成し、少なくとも前記パターンを除いた前記基板面上に前記ソルダーレジスト層を形成し、前記パターン上に半田を塗布し、前記半田を加熱し、半田の表面張力により前記半田を凝集させ、前記パターン上に静電気放電導電部を形成する。このように、半田で静電気放電導電部を形成することにより、部品点数の増加や工程の増加を招くことなく、該電子機器の基板上の回路をESDから保護できる。In a method of manufacturing an electronic device including at least a substrate having an electrode, a pattern of an electrostatic discharge protection portion is formed on the substrate in the vicinity of the electrode, and the solder resist layer is formed on the substrate surface excluding at least the pattern Then, solder is applied onto the pattern, the solder is heated, the solder is aggregated by the surface tension of the solder, and an electrostatic discharge conductive portion is formed on the pattern. In this way, by forming the electrostatic discharge conductive portion with solder, the circuit on the substrate of the electronic device can be protected from ESD without increasing the number of components or increasing the number of processes.

Description

本発明は、素子を基板に実装する技術に関する。   The present invention relates to a technique for mounting an element on a substrate.

プリント基板に実装される素子、特にIC等の電子デバイスは、ESD(Electoric Static Discharge)、すなわち静電気の印加によって破壊に至ることがある。
このため筐体内に収められる電子デバイスを筐体の開口から一定以上離して配置するといった静電気対策が行われていた。
An element mounted on a printed circuit board, particularly an electronic device such as an IC, may be destroyed by ESD (Electoric Static Discharge), that is, application of static electricity.
For this reason, countermeasures against static electricity have been taken, such as disposing the electronic device housed in the housing at a certain distance from the opening of the housing.

また、本願発明に関連する先行技術として、例えば、下記の特許文献1,2に開示される技術がある。
特開2001−308586号公報 特開2004−342464号公報
Moreover, as a prior art relevant to this invention, there exists a technique disclosed by the following patent documents 1, 2, for example.
JP 2001-308586 A JP 2004-342464 A

しかし、装置の小型化や電子デバイスの多様化に伴い、電子デバイスを筐体表面に配置する場合が多くなってきている。
例えば、図15は、ノートパソコン等の表面に配置された指紋センサー101を示している。該指紋センサー101は、BGA(Ball Grid Array)方式でプリント基板102に実装され、指紋の読み取りのため読取面101Aが筐体103の外に露出するように配置されている。
指紋センサー101等の電子デバイスの表面は、一般に導電性の低い材質でパッケージング(モールドも含む)されている場合が多く、ESDを受ける可能性は低い。またそうでない場合でも、デバイス表面に受けたESDをグランドに流す等のなんらかの対策がなされており、仮にデバイス表面にESDを受けても内部回路が損傷する可能性は低い。
しかし、デバイスの裏面側には、内部の回路を外部と接続するための端子(BGA端子)104が存在しており、図15に示すように、指紋センサー101と筐体103との隙間を介してESDがBGA端子104に達してしまうと、当該デバイス内部の回路や当該デバイス周辺の回路(以下単に内部回路とも称する)に定格よりも遥かに高い電圧がかかることになり、損傷を招くことがある。
この内部回路の損傷を防ぐためには、図16に示すように指紋センサー101と筐体103との間に導電性部材105を配置し、プリント基板102のグランドライン106と接続すればよい。これによりESDは、導電性部材105に吸収されるため、BGA端子104を保護できる。
しかし、図16の構成としたのでは、図15の構成と比べて導電性部材105が増加すると共に、該導電性部材105をグランドライン106に接続する工程も増えるため、製造性の悪化や製造コストの増大を招くことになる。
そこで、本発明は、電子機器を製造する際、半田で静電気放電導電部を形成することにより、部品点数の増加や工程の増加を招くことなく、該電子機器の基板上の回路をESDから保護する技術を提供する。
However, with the miniaturization of devices and the diversification of electronic devices, electronic devices are often placed on the surface of a housing.
For example, FIG. 15 shows a fingerprint sensor 101 arranged on the surface of a notebook computer or the like. The fingerprint sensor 101 is mounted on a printed circuit board 102 by a BGA (Ball Grid Array) method, and is arranged such that a reading surface 101A is exposed outside the housing 103 for reading a fingerprint.
In general, the surface of an electronic device such as the fingerprint sensor 101 is often packaged (including a mold) with a material having low conductivity, and is unlikely to be subjected to ESD. Even if this is not the case, some countermeasures such as flowing ESD received on the device surface to the ground have been taken, and even if ESD is applied to the device surface, the possibility of damage to the internal circuit is low.
However, a terminal (BGA terminal) 104 for connecting an internal circuit to the outside is present on the back side of the device, and a gap between the fingerprint sensor 101 and the housing 103 is interposed as shown in FIG. If the ESD reaches the BGA terminal 104, a voltage much higher than the rating is applied to the circuit inside the device and the circuit around the device (hereinafter also simply referred to as an internal circuit), which may cause damage. is there.
In order to prevent damage to the internal circuit, a conductive member 105 may be disposed between the fingerprint sensor 101 and the housing 103 and connected to the ground line 106 of the printed circuit board 102 as shown in FIG. Thereby, since ESD is absorbed by the conductive member 105, the BGA terminal 104 can be protected.
However, with the configuration shown in FIG. 16, the number of conductive members 105 is increased and the number of steps for connecting the conductive members 105 to the ground line 106 is increased compared to the configuration shown in FIG. This will increase the cost.
Therefore, according to the present invention, when an electronic device is manufactured, by forming the electrostatic discharge conductive portion with solder, the circuit on the substrate of the electronic device is protected from ESD without causing an increase in the number of parts or an increase in the number of processes. Provide technology to do.

上記課題を解決するため、本発明は、以下の構成を採用した。
即ち、本発明の電子機器は、
少なくとも基板から構成された電子機器において、
前記基板上に形成された電極と、
前記基板上の前記電極の近傍に形成されたパターンと、
前記パターン上に形成された、山形形状の半田からなる静電気放電導電部とを備えることを特徴とする。
In order to solve the above problems, the present invention employs the following configuration.
That is, the electronic device of the present invention
At least in electronic equipment composed of substrates
An electrode formed on the substrate;
A pattern formed in the vicinity of the electrode on the substrate;
And an electrostatic discharge conductive portion made of chevron-shaped solder formed on the pattern.

前記静電気放電導電部の最頂部は、前記電極から離れるように前記パターン幅中央よりずれていても良い。   The topmost part of the electrostatic discharge conductive part may be shifted from the center of the pattern width so as to be away from the electrode.

前記電極には、前記電子機器の筐体外部に露出する電子部品の端子が接合され、
前記電子部品と前記筐体との間隙と静電気放電導電部間の距離が、前記間隙と前記端子間の距離よりも近くなるように構成しても良い。
A terminal of an electronic component exposed outside the casing of the electronic device is joined to the electrode,
The distance between the gap between the electronic component and the housing and the electrostatic discharge conductive part may be configured to be closer than the distance between the gap and the terminal.

また、本発明の電子機器の製造方法は、
少なくとも電極を有する基板から構成された電子機器の製造方法において、
前記電極近傍に静電気放電保護部のパターンを基板上に形成する基板形成ステップと、
少なくとも前記パターンを除いた前記基板面上に前記ソルダーレジスト層を形成するソルダートレジスト形成ステップと、
前記パターン上に半田を塗布する半田塗布ステップと、
前記半田を加熱し、半田の表面張力により前記半田を凝集させ、前記パターン上に静電気放電導電部を形成する加熱ステップとを備える。
In addition, the method for manufacturing the electronic device of the present invention includes:
In a method of manufacturing an electronic device composed of a substrate having at least an electrode,
A substrate forming step of forming an electrostatic discharge protection portion pattern on the substrate in the vicinity of the electrode;
A solder resist forming step of forming the solder resist layer on the substrate surface excluding at least the pattern;
A solder application step of applying solder on the pattern;
Heating the solder, aggregating the solder by the surface tension of the solder, and forming an electrostatic discharge conductive portion on the pattern.

前記半田塗布ステップにおいて、前記パターンよりも広く前記基板上に半田を塗布しても良い。   In the solder application step, solder may be applied to the substrate wider than the pattern.

前記加熱ステップにおいて、前記電極へ素子を装着するための半田への加熱を前記静電気放電導電部の形成と同時に行っても良い。   In the heating step, the heating of the solder for mounting the element on the electrode may be performed simultaneously with the formation of the electrostatic discharge conductive portion.

本発明によれば、電子機器を製造する際、半田で静電気放電導電部を形成することにより、部品点数の増加や工程の増加を招くことなく、該電子機器の基板上の回路をESDから保護する技術を提供できる。   According to the present invention, when an electronic device is manufactured, by forming the electrostatic discharge conductive portion with solder, the circuit on the substrate of the electronic device is protected from ESD without increasing the number of components or increasing the number of processes. Technology can be provided.

本発明に係る電子機器の外観図External view of electronic apparatus according to the present invention 本発明の要部概略図Main part schematic diagram of the present invention 電極及び保護壁用パターンの平面図Plan view of electrode and protective wall pattern 素子の実装方法のフローチャートFlow chart of device mounting method 表面配線パターン作成の説明図Illustration of surface wiring pattern creation ソルダーレジスト作成の説明図Illustration of creating solder resist 素子の実装システムの説明図Illustration of element mounting system 半田ペースト印刷の説明図Illustration of solder paste printing 半田ペースト印刷の説明図Illustration of solder paste printing 素子の載置の説明図Illustration of device placement リフロー処理の説明図Explanatory diagram of reflow processing 半田ペースト印刷幅の説明図Illustration of solder paste printing width 保護壁形成位置の説明図Illustration of protective wall formation position 半田ペースト塗布位置の説明図Illustration of solder paste application position 関連技術の説明図Illustration of related technology 関連技術の説明図Illustration of related technology

以下、図面を参照して本発明を実施するための最良の形態について説明する。以下の実施の形態の構成は例示であり、本発明は実施の形態の構成に限定されない。
図1は、本発明に係る電子機器の外観図、図2は本発明の要部説明図である。
本例の電子機器10は、ノート型のパーソナルコンピュータ(ノートPC)であり、指紋センサー1をBGA(Ball Grid Array)方式で基板2に実装し、指紋の読み取りのため指紋センサー1の読取面1Aを筐体3の外に露出させている。
The best mode for carrying out the present invention will be described below with reference to the drawings. The configuration of the following embodiment is an exemplification, and the present invention is not limited to the configuration of the embodiment.
FIG. 1 is an external view of an electronic apparatus according to the present invention, and FIG. 2 is an explanatory view of a main part of the present invention.
The electronic device 10 of this example is a notebook personal computer (notebook PC), and the fingerprint sensor 1 is mounted on the substrate 2 by the BGA (Ball Grid Array) method, and the reading surface 1A of the fingerprint sensor 1 is used for reading the fingerprint. Is exposed outside the housing 3.

指紋センサー1は、非導電性の材質でパッケージングされ、そのパッケージ1Bの表面側に読取面1Aを備えている。また、パッケージ1Bの内部に該読取面1Aで読み取った指紋情報を所定形式の電気信号として出力するための回路(内部回路)1Dを備え、パッケージ1Bの裏面側に該電気信号を外部へ出力する端子1Cを備えている。本例の端子1Cは、パッケージ1Bの裏面に50mil程度の間隔で格子状に並べたパッドに半田ボールを接続したBGAとなっている。   The fingerprint sensor 1 is packaged with a non-conductive material, and includes a reading surface 1A on the surface side of the package 1B. In addition, a circuit (internal circuit) 1D for outputting fingerprint information read on the reading surface 1A as an electric signal of a predetermined format is provided inside the package 1B, and the electric signal is output to the outside on the back side of the package 1B. A terminal 1C is provided. The terminal 1C of this example is a BGA in which solder balls are connected to pads arranged in a grid pattern at intervals of about 50 mil on the back surface of the package 1B.

基板2は、セラミック、ガラスエポキシ樹脂等の絶縁材料からなり、図には省略されているが、その内部に所定回路網を形成するための内部配線パターン及びビアホール導体が形成されている。また、基板2の表面には、ビアホール導体からのランド電極などを含む表面配線パターン4が形成されている。この表面配線パターン4の一部は、指紋センサー1の端子1Cが接合されるため、図3に示すように格子状に配列された電極5となっている。また、該表面配線パターン4の他の一部は、電極5を囲む形に形成された保護壁用パターン6となっている。該保護壁用パターン6は、不図示のビアホール導体や表面配線パターン4を介してグランドと接続している。   The substrate 2 is made of an insulating material such as ceramic or glass epoxy resin, and although not shown in the drawing, an internal wiring pattern and a via-hole conductor for forming a predetermined circuit network are formed therein. A surface wiring pattern 4 including land electrodes from via-hole conductors is formed on the surface of the substrate 2. A part of the surface wiring pattern 4 is an electrode 5 arranged in a grid as shown in FIG. 3 because the terminal 1C of the fingerprint sensor 1 is joined. Another part of the surface wiring pattern 4 is a protective wall pattern 6 formed so as to surround the electrode 5. The protective wall pattern 6 is connected to the ground via a via hole conductor (not shown) and the surface wiring pattern 4.

該電極5等のランド電極及び保護壁用パターン6の周囲には、ソルダーレジスト8の層が形成されている。図示例では、該電極5等のランド電極及び保護壁用パターン6上を開口とし、それ以外の表面配線パターン4上には、ソルダーレジスト8が形成されている。該ソルダーレジスト8は半田付けの不要な箇所に半田が付着してショート等が起きないように表面配線パターンを被覆する耐熱性のコーティング材である。   A layer of solder resist 8 is formed around the land electrode such as the electrode 5 and the protective wall pattern 6. In the illustrated example, the land electrode such as the electrode 5 and the protective wall pattern 6 are opened, and a solder resist 8 is formed on the other surface wiring pattern 4. The solder resist 8 is a heat-resistant coating material that covers the surface wiring pattern so that the solder does not adhere to a portion where soldering is unnecessary and a short circuit or the like does not occur.

該ソルダーレジスト8は、スクリーン印刷により形成してもよいし、カーテンコートやスプレーコートにより一様に形成したレジスト膜を現像工程或はエッチングを経て不要部分を除去するものでも良い。また、該ソルダーレジスト8の材質は、一般に用いられている半田が付着しない材質であれば良く、特に限定されるものではない。例えば、エポキシ樹脂、スチレン、アクリル酸、メタクリル酸、マレイン酸等の重合体または共重合体等のカルボキシル基含有重合体類や、フェノール樹脂類、キシレン系樹脂類、尿素系樹脂類、メラミン系樹脂類、アルキッド系樹脂類、ビニル系樹脂類、アクリル系樹脂類、塩化ゴム系樹脂類、ポリアミド系樹脂類、脂肪酸または芳香族の多塩基性酸やその無水物のヒドロキシアルキルアクリレート(又はメタクリレート)ハーフエステル樹脂類等が利用可能である。   The solder resist 8 may be formed by screen printing, or may be a resist film uniformly formed by curtain coating or spray coating to remove unnecessary portions through a development process or etching. The material of the solder resist 8 is not particularly limited as long as it is a material to which generally used solder does not adhere. For example, carboxyl group-containing polymers such as epoxy resins, polymers such as styrene, acrylic acid, methacrylic acid, maleic acid or copolymers, phenol resins, xylene resins, urea resins, melamine resins , Alkyd resins, vinyl resins, acrylic resins, chlorinated rubber resins, polyamide resins, fatty acid or aromatic polybasic acids and anhydride hydroxyalkyl acrylate (or methacrylate) halves Ester resins can be used.

そして、保護壁用パターン6上には、半田による保護壁(静電気放電導電部)7が形成されている。この保護壁7は、指紋センサー1を基板2に実装する際に、電極5と共に保護壁用パターン6上に塗布され、表面張力によって凝集した半田が固化したものである。   A protective wall (electrostatic discharge conductive portion) 7 made of solder is formed on the protective wall pattern 6. When the fingerprint sensor 1 is mounted on the substrate 2, the protective wall 7 is applied onto the protective wall pattern 6 together with the electrodes 5, and the agglomerated solder is solidified by surface tension.

この指紋センサー(電子デバイス)1の実装方法について説明する。図4は、該実装方法のフローチャートである。
先ず、図5に示すように基板2に所定の配線パターンを形成する。このとき基板表面に形成される表面配線パターン4の一部として、指紋センサー1が接続される電極5を囲むように保護壁用のパターン6を形成する。なお、この配線パターンは、一般的な基板製造装置によって形成可能である(S1)。
A method for mounting the fingerprint sensor (electronic device) 1 will be described. FIG. 4 is a flowchart of the mounting method.
First, a predetermined wiring pattern is formed on the substrate 2 as shown in FIG. At this time, as a part of the surface wiring pattern 4 formed on the substrate surface, the protective wall pattern 6 is formed so as to surround the electrode 5 to which the fingerprint sensor 1 is connected. This wiring pattern can be formed by a general substrate manufacturing apparatus (S1).

また、スクリーン印刷装置によって該基板表面にソルダーレジスト8をスクリーン印刷し、図6のように電極5等のランド電極及び保護壁用配線パターン6以外を被覆する(S2)。   Further, the solder resist 8 is screen-printed on the surface of the substrate by a screen printing apparatus, and the parts other than the land electrodes such as the electrodes 5 and the protective wall wiring pattern 6 are coated as shown in FIG. 6 (S2).

このように、所定の表面配線パターン4及びソルダーレジスト8を形成した基板2を用意し、該基板2に対して指紋センサー1を実装する。図7は、該指紋センサー1の実装を行う製造ライン(素子の実装システム)の一例である。
半田印刷機21は、該基板表面にメタルマスク9を重ね(図8,S3)、半田ペースト11を塗布後、メタルマスク9を除いて図9のように電極5及び保護壁用パターン6上に半田ペースト11を印刷する(S4)。このとき保護壁用パターン6上の半田ペーストが、図8,9の如く保護壁用配線パターン6よりも広い幅で塗布されるように、メタルマスク9の印刷パターンが形成されている。
In this way, the substrate 2 on which the predetermined surface wiring pattern 4 and the solder resist 8 are formed is prepared, and the fingerprint sensor 1 is mounted on the substrate 2. FIG. 7 is an example of a production line (element mounting system) for mounting the fingerprint sensor 1.
The solder printer 21 superimposes the metal mask 9 on the substrate surface (FIG. 8, S3), and after applying the solder paste 11, the metal mask 9 is removed and the electrode 5 and the protective wall pattern 6 as shown in FIG. The solder paste 11 is printed (S4). At this time, the printed pattern of the metal mask 9 is formed so that the solder paste on the protective wall pattern 6 is applied with a width wider than that of the protective wall wiring pattern 6 as shown in FIGS.

半田膜厚測定装置22により、半田の膜厚を測定し(S5)、該膜厚が適切であればチップ搭載機23により指紋センサー1の端子1Cが電極5と接するように該指紋センサー1を載置する(図10,S6)。   The solder film thickness measuring device 22 measures the solder film thickness (S5), and if the film thickness is appropriate, the chip mounting machine 23 controls the fingerprint sensor 1 so that the terminal 1C of the fingerprint sensor 1 is in contact with the electrode 5. Place (FIG. 10, S6).

また、他の素子(不図示)についても異型部品搭載機24により基板2の電極上に載置する(S7)。   Other elements (not shown) are also placed on the electrodes of the substrate 2 by the atypical component mounting machine 24 (S7).

そして、リフローオーブン25により、上記基板を所定温度に加熱してリフロー処理し、半田ペースト11を溶融させて端子1Cと電極5を接続する。このとき、保護壁用パターン6上の半田ペースト11も溶融して、ソルダーレジスト上に印刷されていた半田がはじかれ、表面張力によって保護壁用パターン6上に凝集する(S8)。この凝集した状態で自然冷却させ、該半田を固化させて保護壁7とする(図11,S9)。   Then, the substrate is heated to a predetermined temperature by a reflow oven 25 and subjected to a reflow process, the solder paste 11 is melted, and the terminal 1C and the electrode 5 are connected. At this time, the solder paste 11 on the protective wall pattern 6 is also melted, the solder printed on the solder resist is repelled, and agglomerates on the protective wall pattern 6 due to surface tension (S8). In this aggregated state, it is naturally cooled, and the solder is solidified to form the protective wall 7 (FIG. 11, S9).

このように指紋センサー1の接続部(端子1Cと電極5)を囲む保護壁7を形成したことにより、図12に示すように筐体3とパッケージ1Bとの隙間9を介してESDが入っても、ESDはグランドに接続された保護壁7に吸収され、指紋センサー1の接続部に達することが防止される。即ち指紋センサー内の回路及び筐体内で該指紋センサー周辺に設けられた回路といった内部回路をESDから保護できる。   By forming the protective wall 7 surrounding the connection portion (terminal 1C and electrode 5) of the fingerprint sensor 1 in this way, ESD enters through the gap 9 between the housing 3 and the package 1B as shown in FIG. However, the ESD is absorbed by the protective wall 7 connected to the ground and is prevented from reaching the connection portion of the fingerprint sensor 1. That is, an internal circuit such as a circuit in the fingerprint sensor and a circuit provided around the fingerprint sensor in the casing can be protected from ESD.

このとき、図12に示すように保護壁用パターン6の幅W1よりも保護壁用パターン上に塗布する半田ペーストの幅、即ち該半田ペーストを印刷するメタルマスクの開口の幅W2を大きくしている。   At this time, as shown in FIG. 12, the width of the solder paste applied on the protective wall pattern, that is, the width W2 of the opening of the metal mask for printing the solder paste is made larger than the width W1 of the protective wall pattern 6. Yes.

従って、半田ペースト11は保護壁用パターン6上だけでなくソルダーレジスト8上にも塗布される。しかしソルダーレジスト8は、半田が付着しない材質、即ち溶融した状態の半田をはじく材質であるため、ソルダーレジスト上の半田ペースト11はリフロー処理によって溶融すると保護壁用パターン上に移動し、表面張力によって凝集することになる。即ち、溶融した半田は、保護壁用パターン6を底面とし、鉛直断面が山形に盛り上がることになる。   Therefore, the solder paste 11 is applied not only on the protective wall pattern 6 but also on the solder resist 8. However, since the solder resist 8 is a material to which solder does not adhere, that is, a material that repels molten solder, the solder paste 11 on the solder resist moves onto the protective wall pattern when melted by the reflow process, and is caused by surface tension. Aggregate. That is, the molten solder has the protective wall pattern 6 as the bottom surface, and the vertical cross section rises in a mountain shape.

このため保護壁7を高く形成したい場合には、幅W1とW2の差を大きくし、保護壁7を低くするためには幅W1とW2の差を少なく設定する(但しW1<W2)。   Therefore, when the protective wall 7 is desired to be formed high, the difference between the widths W1 and W2 is increased, and in order to reduce the protective wall 7, the difference between the widths W1 and W2 is set small (W1 <W2).

即ち、保護壁7として必要な幅及び高さが得られるように保護壁用パターン6の幅W1や半田ペーストの幅W2、ソルダーレジスト8の材質、半田ペースト11の材質を予め設定する。   That is, the width W1 of the protective wall pattern 6, the width W2 of the solder paste, the material of the solder resist 8, and the material of the solder paste 11 are set in advance so that the width and height necessary for the protective wall 7 can be obtained.

このように指紋センサー1を実装した基板面よりも高い保護壁7を設けたことにより、指紋センサー1を接続した配線パターン4にESDが達することを防止し、該配線パターン4に接続している内部回路を保護することができる。また、半田の表面張力により高さを出せるので、保護壁用パターン及び電極5上に印刷する際、一つのメタルマスクで一度に印刷可能であり、製造性が良い。   By providing the protective wall 7 higher than the substrate surface on which the fingerprint sensor 1 is mounted in this way, ESD is prevented from reaching the wiring pattern 4 to which the fingerprint sensor 1 is connected, and the wiring pattern 4 is connected. The internal circuit can be protected. Further, since the height can be increased by the surface tension of the solder, when printing on the protective wall pattern and the electrode 5, printing can be performed at one time with one metal mask, and the productivity is good.

また、図13に示すように筐体3とパッケージ1Bとの隙間9から保護壁7への距離、本例ではパッケージ1Bの外周部(図示例では外周面B1の下端B2)からの最短距離L1が、該隙間9から指紋センサー1の接続部1Cへの距離L2より短くなるように、配線パターン4の位置及び保護壁7の高さを設定している。これにより隙間9からのESDが、高い確度で保護壁7へ吸収される。   Further, as shown in FIG. 13, the distance from the gap 9 between the housing 3 and the package 1B to the protective wall 7, in this example, the shortest distance L1 from the outer peripheral portion of the package 1B (the lower end B2 of the outer peripheral surface B1 in the illustrated example). However, the position of the wiring pattern 4 and the height of the protective wall 7 are set so as to be shorter than the distance L2 from the gap 9 to the connection portion 1C of the fingerprint sensor 1. Thereby, ESD from the gap 9 is absorbed into the protective wall 7 with high accuracy.

また、図14に示すように鉛直断面内において、保護壁用パターン6上に塗布された半田ペースト11の中心P1を保護壁用パターン6の中心P2の外側、即ち保護壁用パターン6が囲む電極5と反対側に形成している。このように塗布された半田ペーストから生成される保護壁7は、その最頂部が中心P2の外側となる。この結果、最頂部は、基板面上において中心P2より前記電極5から離れることになる。   Further, as shown in FIG. 14, in the vertical cross section, the electrode P surrounds the center P1 of the solder paste 11 applied on the protective wall pattern 6 outside the central P2 of the protective wall pattern 6, that is, the protective wall pattern 6 surrounds. 5 on the opposite side. The protective wall 7 generated from the solder paste applied in this way has its topmost portion outside the center P2. As a result, the topmost part is separated from the electrode 5 from the center P2 on the substrate surface.

これにより上記幅W1とW2の差を大きくしても、保護壁用パターン6よりも指紋センサー1側に塗布される半田ペースト11の幅WAが抑えられ、保護壁7の最頂部を指紋センサー1あるいは指紋センサー1の電極から離して形成できる。従って指紋センサー1の接続部1CへのESDをより確実に防止できるようになる。   Thereby, even if the difference between the widths W1 and W2 is increased, the width WA of the solder paste 11 applied to the fingerprint sensor 1 side with respect to the protective wall pattern 6 is suppressed, and the topmost portion of the protective wall 7 is placed on the top of the fingerprint sensor 1. Alternatively, it can be formed away from the electrode of the fingerprint sensor 1. Therefore, ESD to the connection part 1C of the fingerprint sensor 1 can be prevented more reliably.

この中心P1と中心P2の差ΔPは、前記距離L1等に応じて任意に設定でき、指紋センサー1に対し保護壁7を最も近づけて形成するためには、図12のように保護壁6及び半田ペースト11の指紋センサー1側の端部を一致させれば良い。
なお、上記保護壁に係る設定は、可能な限り組み合わせて用いることができる。
The difference ΔP between the center P1 and the center P2 can be arbitrarily set according to the distance L1 and the like. In order to form the protective wall 7 closest to the fingerprint sensor 1, the protective wall 6 and the protective wall 6 and the center P2 are formed as shown in FIG. What is necessary is just to make the edge part by the side of the fingerprint sensor 1 of the solder paste 11 correspond.
In addition, the setting which concerns on the said protective wall can be used combining as much as possible.

本実施例では、保護壁7を指紋センサー1を囲む形に形成しているが、指紋センサー1や隙間9の形状の応じて様々な形態をとることが考えられる。特定方向からのESDを防ぐ必要があるならば、特定方向のみ保護壁7を形成すればよい。また、指紋センサー1を囲う形だけでなく、複数の保護壁7を指紋センサー1近傍に形成してもよい。   In this embodiment, the protective wall 7 is formed so as to surround the fingerprint sensor 1, but various forms may be considered depending on the shape of the fingerprint sensor 1 and the gap 9. If it is necessary to prevent ESD from a specific direction, the protective wall 7 may be formed only in the specific direction. In addition to the shape surrounding the fingerprint sensor 1, a plurality of protective walls 7 may be formed in the vicinity of the fingerprint sensor 1.

Claims (6)

少なくとも基板から構成された電子機器において、
前記基板上に形成された電極と、
前記基板上の前記電極の近傍に形成されたパターンと、
前記パターン上に形成された、山形形状の半田からなる静電気放電導電部とを備えることを特徴とする電子機器。
At least in electronic equipment composed of substrates
An electrode formed on the substrate;
A pattern formed in the vicinity of the electrode on the substrate;
An electronic apparatus comprising: an electrostatic discharge conductive portion made of a chevron-shaped solder formed on the pattern.
前記静電気放電導電部の最頂部は、前記電極から離れるように前記パターン幅中央よりずれていることを特徴とする請求項1記載の電子機器。   The electronic device according to claim 1, wherein an uppermost portion of the electrostatic discharge conductive portion is shifted from a center of the pattern width so as to be separated from the electrode. 前記電極には、前記電子機器の筐体外部に露出する電子部品の端子が接合され、
前記電子部品と前記筐体との間隙と静電気放電導電部間の距離が、前記間隙と前記端子間の距離よりも近いことを特徴とする請求項1もしくは2に記載の電子機器。
A terminal of an electronic component exposed outside the casing of the electronic device is joined to the electrode,
The electronic apparatus according to claim 1, wherein a distance between the gap between the electronic component and the housing and the electrostatic discharge conductive portion is shorter than a distance between the gap and the terminal.
少なくとも電極を有する基板から構成された電子機器の製造方法において、
前記電極近傍に静電気放電保護部のパターンを基板上に形成する基板形成ステップと、
少なくとも前記パターンを除いた前記基板面上に前記ソルダーレジスト層を形成するソルダートレジスト形成ステップと、
前記パターン上に半田を塗布する半田塗布ステップと、
前記半田を加熱し、半田の表面張力により前記半田を凝集させ、前記パターン上に静電気放電導電部を形成する加熱ステップとを備える製造方法。
In a method of manufacturing an electronic device composed of a substrate having at least an electrode,
A substrate forming step of forming an electrostatic discharge protection portion pattern on the substrate in the vicinity of the electrode;
A solder resist forming step of forming the solder resist layer on the substrate surface excluding at least the pattern;
A solder application step of applying solder on the pattern;
A heating step of heating the solder, aggregating the solder by a surface tension of the solder, and forming an electrostatic discharge conductive portion on the pattern.
前記半田塗布ステップにおいて、前記パターンよりも広く前記基板上に半田を塗布することを特徴とする請求項4記載の製造方法。   The manufacturing method according to claim 4, wherein, in the solder application step, solder is applied to the substrate wider than the pattern. 前記加熱ステップにおいて、前記電極へ素子を装着するための半田への加熱を前記静電気放電導電部の形成と同時に行うことを特徴とする請求項4記載の製造方法。   5. The manufacturing method according to claim 4, wherein, in the heating step, heating of the solder for mounting the element on the electrode is performed simultaneously with the formation of the electrostatic discharge conductive portion.
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