JPWO2007058113A1 - Digital broadcast receiving signal processing apparatus, signal processing method, signal processing program, and digital broadcast receiving apparatus - Google Patents

Abstract

A signal processing apparatus capable of generating a display image that is as high as possible and as natural as possible from a plurality of digital broadcast reception signals provided by simulcast is disclosed. The signal processing apparatus includes a first decoder, a second decoder, and a signal output unit. The first decoder detects an error in units of a pixel block including a predetermined number of pixels in the decoding process of the received signal. When the error is not detected, the signal output unit outputs the pixel block of the decoded image signal supplied from the first decoder, and when the error is detected, the signal output unit outputs the second block supplied from the second decoder. An output image signal is generated by outputting a pixel block in the decoded image signal.

Description

  The present invention relates to a technique for processing a plurality of digital broadcast reception signals, and particularly to a technique for processing two types of digital broadcast reception signals transmitted by simulcast.

Japanese terrestrial digital broadcasting is defined by the ISDB-T (Integrated Services Digital Broadcasting Terrestrial) standard, and employs OFDM (Orthogonal Frequency Division Multiplexing) modulation and hierarchical transmission schemes. According to the ISDB-T standard, as schematically shown in FIG. 1, the transmission bandwidth of one channel (about 5.6 MHz) is divided into ₁₃ subbands, that is, OFDM segments S _{1 to} S ₁₃ , These OFDM segments S _{1 to} S ₁₃ can be further divided into a maximum of three groups or layers. Different transmission characteristics such as carrier modulation scheme, inner code coding rate, and time interleave length can be set for each layer, and different broadcast programs can be transmitted for each layer. For example, 12 OFDM segments S _{1 to} S ₆ and S _{8 to} S ₁₃ are used to provide high-quality high-definition television (High Definition Television) for fixed receivers, or 12 OFDM segments S _{1 to} S ₆ , S _{8 to} S ₁₃ are divided into three layers to provide a standard definition television for a fixed receiver for each layer, or using only one segment S ₇ arranged in the center. Digital broadcasting (simple video broadcasting) for mobiles can be provided. In digital broadcasting for fixed receivers, MPEG2 (Moving Picture Experts Group phase 2) is adopted as an image compression method, and in digital broadcasting for mobiles, H.264 is used as an image compression method. H.264 (MPEG4 AVC) is employed.

  At the beginning of full-scale digital terrestrial broadcasting, so-called simulcast (simultaneous broadcasting), in which broadcasters provide programs with the same content on both fixed receiver digital broadcasting and mobile digital broadcasting simultaneously. Broadcasting) is scheduled. Thus, several techniques have been proposed for receiving high-quality digital broadcasting as much as possible using a simulcast in a moving body such as a vehicle. For example, in Patent Document 1 (Japanese Patent Application Laid-Open No. 2004-312361) and Patent Document 2 (Japanese Patent Application Laid-Open No. 2004-166173), depending on reception quality, digital broadcasting for a mobile unit and digital broadcasting for a fixed receiver are used. A receiving device that automatically switches between receiving broadcasts is disclosed.

  However, in the receiving apparatuses of Patent Documents 1 and 2, the image quality of the image frame suddenly changes when the reception broadcast is switched from one of the digital broadcast for the mobile body and the digital broadcast for the fixed receiver to the other. Therefore, there is a problem that an unnatural image is displayed, and it gives a strange feeling to those who listen to the broadcast program.

Moreover, even if the digital broadcast for mobile units and the digital broadcast for fixed receivers are provided by simulcast, the contents of both broadcasts are not always synchronized accurately in time. In such a case, when the received broadcast is switched from the digital broadcast for the mobile body to the digital broadcast for the fixed receiver, an unnatural image is displayed, which may give a strange feeling to the viewer of the broadcast program.
Japanese Patent Laid-Open No. 2004-312361 JP 2004-166173 A

  In view of the above, an object of the present invention is to provide a signal processing apparatus and a signal processing method for receiving digital broadcasts that can generate a display image that is as high as possible and as natural as possible from a plurality of digital broadcast reception signals provided by simulcast. And a signal processing program and a digital broadcast receiving apparatus.

  A signal processing apparatus according to an aspect of the present invention is a signal processing apparatus for receiving digital broadcasts that processes both first digital broadcast and second digital broadcast reception signals transmitted by simulcast. The signal processing apparatus is different from the first coding standard, and a first decoder that decodes the received signal of the first digital broadcast according to a first coding standard to generate a first decoded image signal. A second decoder for decoding a received signal of the second digital broadcast in accordance with a second encoding standard to generate a second decoded image signal; the first decoded image signal; and the second decoded image signal; A signal output unit that generates an output image signal based on the output signal and outputs the output image signal, wherein the first decoder detects an error in a unit of a pixel block including a predetermined number of pixels in the decoding process of the received signal, When the error is not detected, the signal output unit outputs a pixel block of the first decoded image signal.When the error is detected, the signal output unit replaces the pixel block in which the error is detected. in front And it generates the output image signal by outputting a corresponding pixel block in the second decoded image signal.

  A digital broadcast receiving apparatus according to an aspect of the present invention is a digital broadcast receiving apparatus that receives a first digital broadcast and a second digital broadcast transmitted by simulcast. The digital broadcast receiving apparatus includes: a reception circuit that supplies reception signals of the first and second digital broadcasts; and a first decoding by decoding the reception signals of the first digital broadcast according to a first encoding standard. A first decoder for generating an image signal; and a second decoding image signal for generating a second decoded image signal by decoding the received signal of the second digital broadcast according to a second encoding standard different from the first encoding standard. 2 decoder, and a signal output unit that generates an output image signal based on the first decoded image signal and the second decoded image signal and outputs the output image signal, and the first decoder includes the received signal In the decoding process, an error is detected in units of a pixel block including a predetermined number of pixels, and when the error is not detected, the signal output unit outputs a pixel block of the first decoded image signal, while When error is detected, instead of the pixel block in which the error is detected, and generates the output image signal by outputting a corresponding pixel block in the second decoded image signal.

  A signal processing method according to an aspect of the present invention is a signal processing method for digital broadcast reception that processes reception signals of both a first digital broadcast and a second digital broadcast transmitted by simulcast. The signal processing method includes: (a) decoding a reception signal of the first digital broadcast according to a first encoding standard to generate a first decoded image signal; and (b) the first encoding. Decoding a received signal of the second digital broadcast according to a second encoding standard different from the standard to generate a second decoded image signal; and (c) predetermined in the decoding process of the step (a) A step of detecting an error in a pixel block unit consisting of a number of pixels; and (d) when the error is not detected, the pixel block of the first decoded image signal is output, while when the error is detected And generating a output image signal by outputting a corresponding pixel block in the second decoded image signal instead of the pixel block in which the error is detected.

  A signal processing program according to an aspect of the present invention is a signal processing program for receiving a digital broadcast that causes a processor to process the received signals of both the first digital broadcast and the second digital broadcast transmitted by simulcast. . The signal processing program includes: (a) a first decoding process for decoding a received signal of the first digital broadcast according to a first encoding standard to generate a first decoded image signal; b) a second decoding process for decoding a received signal of the second digital broadcast according to a second encoding standard different from the first encoding standard to generate a second decoded image signal; ) An error detection process for detecting an error in a unit of a pixel block composed of a predetermined number of pixels in the second decoding process; and (d) a pixel block of the first decoded image signal when the error is not detected When the error is detected, an output image signal is generated by outputting a corresponding pixel block in the second decoded image signal instead of the pixel block in which the error is detected. Trust And output process, is intended to include.

FIG. 1 is a diagram illustrating 13 OFDM segments. FIG. 2 is a functional block diagram schematically showing the configuration of the digital broadcast receiving apparatus according to the embodiment of the present invention. FIG. 3 is a functional block diagram illustrating an example of a schematic configuration of the delay detection unit. FIG. 4 is a functional block diagram illustrating another example of the schematic configuration of the delay detection unit. FIG. 5 is a flowchart for explaining the delay amount detection processing. FIG. 6 is a flowchart for explaining the delay amount detection processing. FIG. 7 is a diagram for explaining the delay amount detection processing. FIG. 8 is a functional block diagram illustrating a schematic configuration of the signal output unit. FIG. 9 is a diagram schematically showing an output image. FIG. 10 is a flowchart for explaining the motion detection process.

Explanation of symbols

1 Digital broadcast receiver 2 Receiver circuit (front end)
3 Signal Processing Circuit 10 Antenna 11 Tuner 12 Demodulation Circuit 13 First Decoder 14 First Delay Unit 15 Second Decoder 16 Second Delay Unit 17 Delay Detection Unit 18 Signal Output Unit 19 Motion Detection Unit

BEST MODE FOR CARRYING OUT THE INVENTION

  This application uses Japanese Patent Application No. 2005-335651 as a basis for claiming priority, and the content of the basic application is incorporated herein.

  Hereinafter, various embodiments according to the present invention will be described.

  FIG. 2 is a functional block diagram schematically showing the configuration of the digital broadcast receiver 1 according to the embodiment of the present invention. The digital broadcast receiving apparatus 1 includes an antenna 10, a receiving circuit (front end) 2, and a signal processing circuit 3. The reception circuit 2 includes a tuner 11 and a demodulation circuit 12. The signal processing circuit 3 includes a demultiplexer (DMUX), a first decoder 13, a second decoder 15, delay units 14 and 15, a delay detection unit 17, and a signal output unit 18.

  Referring to FIG. 2, the tuner 11 selects a broadcast wave to be received by the antenna 10 and frequency-converts the received broadcast wave to generate an OFDM signal. The demodulation circuit 12 performs an FFT (Fast Fourier Transform) on the OFDM signal from the tuner 11 to generate an OFDM demodulated signal, and further performs decoding processing such as deinterleaving, demapping, and error correction on the OFDM demodulated signal. To generate a transport stream TS. The demultiplexer (DMUX) separates the first elementary stream ES1, the second elementary stream ES2, and the TS error information TSe from the transport stream TS, and supplies the first elementary stream ES1 to the first decoder 13. The second elementary stream ES2 is supplied to the second decoder 15. The first elementary stream ES1 is a bit string compliant with the MPEG2 standard, and the second elementary stream ES2 is H.264. It is a bit string compliant with the H.264 standard.

  Further, the demodulation circuit 12 detects an uncorrectable error in units of TS packets in the course of error correction processing, includes TS error information TSe indicating the position where this error occurs in the transport stream TS, and demultiplexer ( DMUX).

  The first decoder 13 decodes the first elementary stream ES1 according to the MPEG2 coding standard to generate a decoded image signal DS1. Here, the first decoder 13 generates macroblock error information MBe using the TS error information TSe, and supplies this information MBe to the signal output unit 18. The macro block error information MBe is information indicating the presence / absence of an error for each macro block. A macroblock is usually composed of 16 × 16 or 8 × 8 pixels. The pixel block of the present invention may be the macroblock itself or a subblock obtained by further dividing the macroblock. The first decoder 13 supplies the motion detection unit 19 with motion amount information MV1 including data indicating the presence or absence of a skipped macroblock and a motion vector.

  On the other hand, the second decoder 15 converts the second elementary stream ES2 to H.264. The decoded image signal DS2 is generated by decoding according to the H.264 coding standard. In addition, the second decoder 15 supplies the motion detection unit 19 with motion amount information MV2 including data indicating the presence or absence of a skip macroblock and a motion vector.

  Further, the first decoder 13 and the second decoder 15 are images such as a frame rate of the decoded image signal DS1 and the decoded image signal DS2, an image size (horizontal resolution and vertical resolution), and a pan scan (PANSCAN) designation flag, respectively. The parameters PA1 and PA2 are supplied to the delay detection unit 17 and the signal output unit 18.

  The first delay unit 14 delays the decoded image signal DS1 from the first decoder 13 by the first delay amount DV1 supplied from the delay detection unit 17 to generate a delayed image signal LS1, and outputs the signal LS1 as a signal. Supply to unit 18. On the other hand, the second delay unit 16 delays the decoded image signal DS2 from the second decoder 15 by the first delay amount DV2 supplied from the delay detection unit 17 to generate a delayed image signal LS2, and this signal LS2 is generated. The signal output unit 18 is supplied. The signal output unit 18 generates an output image signal CS based on the delayed image signal LS1 and the delayed image signal LS2 in accordance with the macroblock error information MBe. The configuration of the signal output unit 18 will be described later.

  The motion detection unit 19 calculates the motion amount of an image (hereinafter referred to as an MPEG image) represented by the decoded image signal DS1 and the motion amount of an image (hereinafter referred to as an H.264 image) represented by the decoded image signal DS2. The detection result MD is supplied to the delay detection unit 17. The delay detection unit 17 detects a synchronization shift between the decoded image signal DS1 and the decoded image signal DS2 using the detection result MD, and a first delay amount DV1 and a second delay for compensating for the synchronization shift. The quantity DV2 is generated. Each configuration of the motion detector 19 and the delay detector 17 will be described later.

  FIG. 3 is a functional block diagram illustrating an example of a schematic configuration of the delay detection unit 17. Referring to FIG. 3, the delay detection unit 17 includes an image size detection unit 20, a down converter (resolution conversion unit) 21, a first image extraction unit 22, a second image extraction unit 23, a coincidence detection unit 24, and a frame rate detection unit. 25 and a delay amount table 26.

  The image size detection unit 20 calculates the image size (vertical resolution and horizontal resolution) of the MPEG image from the image parameters PA1 and PA2, and H.264. The image size of the H.264 image is detected, and a conversion ratio DR that is a ratio of these image sizes is given to the down converter 21. The down-converter 21 converts the resolution of the decoded image signal DS1 at the magnification of the conversion ratio DR, that is, generates the converted image signal DC1 by thinning out the decoded image signal DS1. As a result, the image size of the converted image signal DC1 matches that of the decoded image signal DS2. For example, the high resolution 1920 × 1080 of an MPEG image is H.264. The resolution of the H.264 image is converted to 320 × 180.

  Further, the image size detection unit 20 calculates the MPEG image aspect ratio and the H.264 from the image parameters PA1 and PA2. Information AR indicating the aspect ratio of the H.264 image is acquired, and this information AR is supplied to the coincidence detection unit 24.

  On the other hand, the frame rate detection unit 25 calculates the frame rate (= fs1) of the MPEG image from the image parameters PA1 and PA2 and H.264. H.264 image frame rate (= fs2). A frame rate ratio FR which is a ratio of the frame rate of the MPEG image to the frame rate of the H.264 image (= fs1 / fs2) is calculated. The data of the frame rate ratio FR is supplied to the first image extraction unit 22 and the coincidence detection unit 24, respectively. For example, the frame rate of an MPEG image is 60 fps (frames per second) or 30 fps. When the frame rate of the H.264 image is 15 fps, the frame rate ratio FR is an integer of 4 or 2.

  The first image extraction unit 22 extracts a number of reference frames corresponding to the frame rate ratio FR from a series of image frames constituting the converted image signal DC1, and matches one or a plurality of reference frames SD1 with the coincidence detection unit 24. To supply. On the other hand, the second image extraction unit 23 uses the delay information TB supplied from the delay amount table 26 to extract a plurality of reference frames from a series of image frames constituting the decoded image signal DS1, and these reference frames SD2 is given to the coincidence detector 24.

  By the way, digital broadcasts for fixed receivers and simulcasts that are simulcast using the same channel are not always synchronized in time with each other, and the synchronization gap between the two broadcasts is digital. It differs depending on the system of the broadcasting station that transmits the broadcast, and is unique to the system. The delay amount table 26 stores data of delay time corresponding to such synchronization loss occurring in each broadcasting station. The delay amount table 26 is supplied with reception channel information CH indicating the currently selected channel from a control circuit (not shown), and the delay amount table 26 is a delay corresponding to the reception channel information CH. Time data TB is supplied to the second image extraction unit 23.

  The coincidence detection unit 24 compares the reference frames SD1 and SD2, and searches for a combination of reference frames that minimizes the difference in information amount between the reference frames SD1 and SD2. It is determined that the images represented by the two reference frames obtained as a result of this search are substantially the same. For example, if the number of reference frames SD1 is 2 and the number of reference frames SD2 is 3, there are 2 × 3 (= 6) combinations. A combination that minimizes the difference in the amount of information between frames is searched. In addition, the coincidence detection unit 24 calculates delay amounts DV1 and DV2 based on the time difference between the reference frames obtained as a result of the search. The coincidence detection unit 24 selects the MPEG image and the H.264 according to the detection result MD by the motion detection unit 19. It can be determined whether or not there is movement in both of the H.264 images. The coincidence detection unit 24 is configured to detect MPEG images and H.264. When there is almost no motion in both of the H.264 images, the matching accuracy of the reference frame is lowered, so that the search process is interrupted.

  FIG. 4 is a functional block diagram illustrating another example of the schematic configuration of the delay detection unit 17. In the delay detection unit 17 shown in FIG. The delay detection unit 17 shown in FIG. The resolution of the H.264 image is converted to that of the MPEG image. For this reason, the first image extraction unit 22A extracts the reference frame SD1 from a series of image frames constituting the decoded image signal DS1, and the second image extraction unit 23B converts the converted image signal supplied from the upconverter 27. A reference frame SD2 is extracted from a series of image frames constituting the DC1. Further, the coincidence detection unit 24A executes the search process using the reference frames SD1 and SD2 having high resolution of the MPEG image. The other configuration is the same as that of the delay detection unit 17 shown in FIG.

  Next, the delay amount detection processing mainly by the delay detection unit 17 (FIG. 3) will be described below with reference to the flowcharts of FIGS. The flowcharts of FIGS. 5 and 6 are connected to each other via connectors C1 and C2.

  Referring to FIG. 5, in step S <b> 1, a control circuit (not shown) determines whether or not simulcast is received. If simulcast is not received, the delay amount detection process is terminated. For example, a control circuit (not shown) decodes the data transport stream separated by the demodulation circuit 12 to acquire EPG (electronic program guide) information, and receives a simulcast based on the EPG information. It can be determined whether or not. When the simulcast is received, the image size detection unit 20 calculates the MPEG image size and H.264 from the image parameters PA1 and PA2. The image size of the H.264 image is acquired, and the ratio of these image sizes is calculated (step S2). The image size detection unit 20 supplies the conversion ratio DR, which is the ratio of the image sizes, to the down converter 21, and the down converter 21 sets the resolution of the MPEG image (decoded image signal DS1) to H at a magnification according to the conversion ratio DR. . The converted image signal DC1 is generated by converting to the resolution of the H.264 image (step S3).

  Furthermore, the image size detection unit 20 calculates the MPEG image aspect ratio and H.264 from the image parameters PA1 and PA2. The aspect ratio of the H.264 image is acquired (step S4), and the data of the aspect ratio AR is given to the coincidence detection unit 24. The coincidence detection unit 24 determines whether or not these aspect ratios are the same (step S5). If the aspect ratios are not the same, the delay amount detection process is terminated.

  MPEG image aspect ratio and H.264 When it is determined that the aspect ratio of the H.264 image is the same (step S5), the frame rate detection unit 25 determines the MPEG image frame rate and the H.264 image from the image parameters PA1 and PA2. The frame rate of the H.264 image is detected (step S6). The frame rate detection unit 25 further includes It is determined whether or not the frame rate of the H.264 image is a fixed rate (step S7). H. If the frame rate of the H.264 image is a variable rate, the delay amount detection process ends.

  H. When it is determined that the frame rate of the H.264 image is a fixed rate (step S7), the frame rate detection unit 25 calculates the frame rate of the MPEG image and the H.264 image. A ratio FR to the frame rate of the H.264 image is calculated (step S8), and this frame rate ratio FR is supplied to the first image extraction unit 22 and the coincidence detection unit 24. The coincidence detection unit 24 determines whether or not the frame rate ratio FR is an integer ratio (step S9). If the frame rate ratio FR is not an integer ratio, the delay amount detection process is terminated.

  In subsequent step S10 (FIG. 6), the motion detector 19 (FIG. 2) detects the motion amount of the MPEG image based on the motion amount information MV1 or the decoded image signal DS1 supplied from the first decoder 13. Next, the motion detection unit 19 determines whether or not the motion amount of the MPEG image is outside the predetermined range, that is, whether or not there is sufficient motion in the MPEG image to detect the delay amount (step S11). . When the motion amount of the MPEG image is not outside the predetermined range, the motion detection unit 19 returns the process to step S10. On the other hand, when the motion amount of the MPEG image exceeds the predetermined range, the motion detection unit 19 further determines the H.264 based on the motion amount information MV2 or the decoded image signal DS2 supplied from the second decoder 15. The amount of motion of the H.264 image is detected (step S12). Next, the motion detection unit 19 performs H.264. H.264 image motion amount is outside the predetermined range, that is, motion sufficient to detect the delay amount is H.264. It is determined whether or not the image is in the H.264 image (step S13). The motion detection unit 19 is an H.264. If the amount of motion of the H.264 image is not outside the predetermined range, the process returns to step S10, When the motion amount of the H.264 image exceeds the predetermined range, the process proceeds to the next step S14. The detection result MD by the motion detector 19 is supplied to the coincidence detector 24 (FIG. 3).

  In this way, the motion detection unit 19 detects MPEG images and H.264 in order to detect an accurate delay amount. When both motion amounts of the H.264 image are monitored and both motion amounts exceed a certain range, the processing is shifted to the next step S14. However, the present invention is not limited to this case. MPEG images and H.264 It is also possible to monitor the amount of motion of only one of the H.264 images and shift the processing to the next step S14 when the amount of motion of the one exceeds a predetermined range.

  In subsequent step S <b> 14, the first image extraction unit 22 extracts M (M is a positive integer) reference frames SD <b> 1 from the MPEG image, and provides these reference frames SD <b> 1 to the coincidence detection unit 24. The number M of the reference frames SD1 includes MPEG images and H.264. It is determined based on the frame rate ratio FR with the H.264 image. For example, when the frame rate ratio FR is “2”, 2 × k (k is a positive integer) reference frames SD1 can be extracted.

Next, the second image extraction unit 23 performs H.264. In order to extract the reference frame SD2 from the H.264 image, delay information TB indicating the delay amount Δt specific to the selected broadcast station is acquired from the delay amount table 26 (step S15). Subsequently, the second image extraction unit 23 sets a time window (sampling window) having a length T around the time t ₁ delayed by the delay amount Δt from the current time t ₀ (step S16). The time window will be described with reference to FIG. FIG. 7 shows a series of image frames M0, M1, M2,. A series of image frames H0, H1, H2,... Constituting a H.264 image are shown. These MPEG images and H.264 H.264 images are not synchronized with each other. Further, in the vicinity of the current time t _0, the reference frame M5, M6 of two sheets constituting the MPEG image is sampled. At this time, the time window of length T is set around a time t ₁ delayed by a delay amount Δt from the current time t ₀ .

  Next, the second image extraction unit 23 extracts N (N is a positive integer) image frames included in the time window as reference frames, and supplies these reference frames to the coincidence detection unit 24 (step S17). In the example of FIG. 7, three reference frames H1, H2, and H3 included in the time window of length T are extracted.

  Next, the coincidence detection unit 24 searches for a combination that minimizes the difference between the reference frame SD1 from the first image extraction unit 22 and the reference frame SD2 from the second image extraction unit 23 (step S18). In the example of FIG. The combinations (Mx, Hx) of the H.264 image with the reference frame Hx are (M5, H1), (M5, H2), (M5, H3), (M6, H1), (M6, H2), (M6, H3). 6). Of these combinations, the combination that minimizes the difference in the amount of information between the reference frames is searched. Specifically, for example, the luminance difference between the reference frames for each combination may be calculated for each pixel, and the sum of these luminance differences may be calculated to search for a combination that minimizes the sum. Alternatively, it is possible to search for a combination that maximizes the correlation between the reference frames.

  Furthermore, the coincidence detection unit 24 determines whether the search is successful (step S19). For example, if the sum of the luminance differences exceeds a predetermined threshold value or the correlation is less than a predetermined threshold value, it is possible to determine that the matching between the reference frames is low and the search has failed. When the search is not successful, the coincidence detection unit 24 enlarges the time window length T in order to increase the number N of reference frames (step S21), and then returns the process to step S17. On the other hand, when the search is successful, the match detection unit 24 determines that the two reference frames of the combination obtained as a result of the search match, and calculates the delay amounts DV1 and DV2 based on the time difference between these reference frames ( Step S20). In the example of FIG. 7, when a combination of two reference frames M5 and H2 is searched, a time difference between the reference frames M5 and H2 is obtained. The delay amounts DV1 and DV2 may be set as appropriate so as to compensate for the time difference between the reference frames. Thus, the delay calculation process ends.

  Note that the coincidence detection unit 24 performs a process of obtaining a difference between the reference frames by calculating a luminance difference or correlation for all the pixels between the reference frames. Instead of this process, the coincidence accuracy is improved. Accordingly, the luminance difference or correlation may be calculated only for the pixels in the central region excluding the edge image regions at the upper and lower ends or the left and right ends of the image of the reference frame.

  The delay amounts DV1 and DV2 calculated as described above are supplied to the first delay unit 14 and the second delay unit 16, respectively. The first delay unit 14 adds the first delay amount DV1 to the time stamp value of the MPEG image, and supplies the delayed image signal LS1 to the signal output unit 18 at the timing of the added value. Similarly, the second delay unit 16 is connected to the H.264. The second delay amount DV2 is added to the time stamp value of the H.264 image, and the delayed image signal LS2 is supplied to the signal output unit 18 at the timing based on the added value. The time stamp includes MPEG2 standard and H.264 standard. PTS (Presentation Time Stamp) respectively defined by the H.264 standard can be used.

  As shown in FIG. 2, the delay units 14 and 16 delay the decoded image signals DS1 and DS2 according to the delay amounts DV1 and DV2, respectively, and the delay units 14 and 16 are arranged at a later stage than the decoders 13 and 15. Although arranged, it is not necessary to limit to such an arrangement. For example, the delay unit 14 may be arranged before the first decoder 13 to adjust the time for decoding the elementary stream ES1, or the delay unit 16 may be arranged before the second decoder 15. The time during which the elementary stream ES2 is decoded may be adjusted. Alternatively, a configuration may be adopted in which the delay units 14 and 16 are removed from the signal processing circuit 3 and the delay detection unit 17 adjusts the decoding times of the decoders 13 and 15 respectively.

  Note that if the delay amounts DV1 and DV2 are calculated once when simultaneous reception of the digital broadcast for fixed receivers and the digital broadcast for mobile objects that are simulcast is started, in principle, the delay detection unit 17 then delays. There is no need to calculate the amounts DV1 and DV2. However, the delay amounts DV1 and DV2 may be calculated periodically in a reception environment where the synchronization shift between the decoded image signals DS1 and DS2 may fluctuate.

  FIG. 8 is a functional block diagram showing a schematic configuration of the signal output unit 18. The signal output unit 18 includes an up converter 30, a frame interpolation unit 31, an image division unit 32, and a pixel block selection unit 33. Image parameters PA1 and PA2 are supplied from the first decoder 13 and the second decoder 15 to the up-converter (resolution conversion unit) 30, the frame interpolation unit 31, and the image division unit 32, respectively.

  The up-converter 30 is a pixel interpolation block that converts the resolution of the delayed image signal LS2 to the resolution of the delayed image signal LS1, and matches the image size of the delayed image signal LS2 with the image size of the delayed image signal LS1. The frame interpolation unit 31 is a frame rate conversion block that interpolates the output of the up-converter 30 and converts the frame rate of the delayed image signal LS2 to the frame rate of the delayed image signal LS1. Then, the image division unit 32 divides the output of the frame interpolation unit 31 into macro blocks and supplies the macro blocks to the pixel block selection unit 33.

  The pixel block selection unit 33 selects one of the output signal of the image division unit 32 and the delayed image signal LS1 in units of macro blocks according to the macro block error information MBe, and the selected signal is used as the output image signal CS. Supply. Specifically, the pixel block selection unit 33 selects and outputs the macro block of the delayed image signal LS1 when no error has occurred in the macro block of the delayed image signal LS1, while the macro of the delayed image signal LS1. When an error has occurred in a block, a corresponding macro block in the output signal of the image dividing unit 32 is selected and output instead of the macro block in which the error has occurred.

  In this way, since only the macro block in which an error has occurred is replaced with the corresponding macro block in the output signal of the image dividing unit 32, it is possible to obtain an output image signal CS that is as high as possible and as natural as possible. When an error occurs, as shown in FIG. 9, the picture 40 represented by the output image signal CS is a high-quality first macroblock group 41, 41, 41 for broadcasting for a fixed receiver, and low for broadcasting for a mobile unit. Since the picture is composed of high-quality macroblock groups 42a and 42b and no error occurs at all, the picture is composed of only high-quality macroblocks for broadcasting to a fixed receiver. It is possible to supply a good display image.

  Further, the delay detection unit 17 performs MPEG image and H.264 transmission. 264 images are detected, and delay amounts DV1 and DV2 for compensating for the synchronization error are supplied to the delay units 14 and 16, so that the delay units 14 and 16 are synchronized with each other. H.264 images can be supplied to the signal output unit 18.

  Further, the motion detection unit 19 (FIG. 2) is configured to detect MPEG images and H.264. It is detected whether or not the H.264 image has enough motion to calculate the delay amount, and the detection result MD is supplied to the coincidence detection unit 24. Since the coincidence detection unit 24 generates the delay amounts DV1 and DV2 only when the detection result MD is positive, it is possible to reliably avoid the generation of the erroneous delay amounts DV1 and DV2.

Next, some examples of specific methods for calculating the amount of motion detected by the motion detector 19 (FIG. 2) will be described below. The first calculation method is a method of calculating a sum of luminance differences between a plurality of temporally continuous image frames as a motion amount. Specifically, when three image frames P ₀ , P ₁ , and P ₂ that are temporally continuous are monitored, the motion detection unit 19 calculates the sum of luminance differences between the image frames P ₀ and P _1. DB1 and the sum DB2 of luminance differences between the image frames P ₁ and P ₂ are calculated as motion amounts. Only when the motion amount DB1 is greater than or equal to the predetermined threshold value TH1 and the motion amount DB1 is greater than or equal to the predetermined threshold value TH2, the motion detection unit 19 has the motion amounts DB1 and DB2 outside the predetermined range, and the motion is It is possible to determine that there is (steps S11 and S13; FIG. 6).

  The second calculation method of the motion amount is a method using the number of skip macroblocks. MPEG2 standard and H.264 standard. According to the H.264 standard, for example, in the process of encoding a P picture, the macroblock of the current image (current image) to be encoded is the same as the macroblock of the image temporally prior to the current image, If the motion vector is zero, the macroblock is not encoded and is skipped. Such skip macroblock information is acquired by the first decoder 13 and the second decoder 15. For this reason, the motion detection unit 19 can acquire information on skip macroblocks from the image parameters PA1 and PA2 supplied from the first decoder 13 and the second decoder 15, and calculate the number of skip macroblocks as a motion amount. it can. For example, when the number of skip macroblocks in one image frame is smaller than a predetermined threshold, the motion detection unit 19 determines that the motion amount is out of the predetermined range and the image has motion (step S11, S13; FIG. 6) is possible.

The third calculation method of the motion amount is a method using a motion vector. This third calculation method will be described below with reference to the flowchart of FIG. The motion detector 19 can acquire motion vector information from the image parameters PA1 and PA2. Referring to FIG. 10, in step S30, the motion detection unit 19 searches for a macro block in which the norm of the motion vector exceeds the threshold value V _TH in one image frame. If a macroblock whose norm exceeds the threshold cannot be found, the motion detection unit 19 determines that the search has failed (step S31), and further determines that the motion amount of the image is within a predetermined range (step S37). ), The motion detection process is terminated. On the other hand, when the macro detecting unit 19 finds a macroblock whose norm exceeds the threshold, the motion detecting unit 19 determines that the search is successful (step S31), and sets a local region centered on the searched macroblock (step S32). ). This local area may be set to an area including several to several hundred macroblocks. Furthermore, the motion detection unit 19 counts the number of macroblocks whose motion vector norm exceeds the threshold value V _TH among the macroblocks in the local region (step S33). The motion detection unit 19 determines whether or not the count value is greater than or equal to the set value (step S34).

  When it is determined that the count value is equal to or greater than the set value (step S34), the motion detection unit 19 determines that there is a moving object (for example, an image of an object moving in a background that does not change) in the local region. Then, the process proceeds to the next step S35. On the other hand, when it is determined that the count value is less than the set value (step S34), the motion detection unit 19 determines that there is no moving object in the local region, and the amount of motion of the image is within a predetermined range. Is determined (step S37), and the motion detection process is terminated.

  In step S35, the motion detection unit 19 determines whether or not the angles of the motion vectors of all macroblocks in the local region are within a predetermined angle range (for example, within a range of about ± 15 degrees). If the angles of the motion vectors of all the macroblocks are not within the predetermined angle range, the motion detection unit 19 determines that the image motion amount is within the predetermined range (step S37), and ends the motion detection process. On the other hand, if the angles of the motion vectors of all the macroblocks are within a predetermined angle range, the motion detection unit 19 determines that the moving object has moved in approximately one direction, and the amount of motion of the image is predetermined. It is determined that the range is exceeded (step S36), and the motion detection process is terminated.

  In the search process in step S18 (FIG. 6), the match detection unit 24 may search for a combination that minimizes the difference in information amount between reference frames for only the local region set in step S32. . As a result, it is not necessary to calculate the difference between the reference frames for regions other than the local region, so that the processing speed can be improved.

  The various embodiments according to the present invention have been described above. The configuration of the signal processing circuit 3 may be realized by hardware, or may be realized by a program or program code recorded on a recording medium such as an optical disk. Such a program or program code causes a processor such as a CPU to execute all or a part of the functions of the signal processing circuit 3.

Claims (13)

A signal processing apparatus for digital broadcast reception that processes both first digital broadcast and second digital broadcast received signals transmitted by simulcast,
A first decoder for decoding a received signal of the first digital broadcast according to a first encoding standard to generate a first decoded image signal;
A second decoder for decoding the received signal of the second digital broadcast according to a second encoding standard different from the first encoding standard to generate a second decoded image signal;
A signal output unit that generates an output image signal based on the first decoded image signal and the second decoded image signal and outputs the output image signal;
The first decoder detects an error in a pixel block unit including a predetermined number of pixels in a decoding process of the received signal,
When the error is not detected, the signal output unit outputs a pixel block of the first decoded image signal.When the error is detected, the signal output unit replaces the pixel block in which the error is detected. The signal processing apparatus, wherein the output image signal is generated by outputting a corresponding pixel block in the second decoded image signal.   2. The signal processing apparatus according to claim 1, wherein the first digital broadcast is a higher quality digital broadcast than the second digital broadcast.   3. The signal processing apparatus according to claim 1, wherein the signal output unit includes a resolution conversion unit that converts the resolution of the second decoded image signal into the resolution of the first decoded image signal. A signal processing device.   4. The signal processing device according to claim 1, wherein the signal output unit interpolates an image frame of the second decoded image signal and outputs the second decoded image signal. 5. A signal processing apparatus comprising: a frame interpolation unit that converts a frame rate into a frame rate of the first decoded image signal. The signal processing device according to any one of claims 1 to 4,
A delay detection unit that detects a delay amount corresponding to a synchronization shift between the first decoded image signal and the second decoded image signal;
And a delay unit that delays at least one of the first and second decoded image signals in accordance with the delay amount to synchronize the first and second decoded image signals with each other. Processing equipment. The signal processing apparatus according to claim 5, further comprising a motion detection unit that detects whether or not a motion amount of an image represented by at least one of the first and second decoded image signals is outside a predetermined range,
The signal processing apparatus according to claim 1, wherein the delay detection unit detects the delay amount only when the motion detection unit detects that the motion amount is outside a predetermined range. The signal processing device according to claim 5 or 6, comprising:
The delay detection unit
A resolution converter that converts the resolution of the first decoded image signal to the resolution of the second decoded image signal;
A first reference frame is extracted from a series of image frames constituting the first decoded image signal whose resolution has been converted by the resolution converter, and a second one is extracted from the series of image frames constituting the second decoded image signal. An image extraction unit for extracting a reference frame of
A match detection unit that searches for a combination of two reference frames that minimizes a difference between the first and second reference frames, and calculates the delay amount based on a time difference between the searched reference frames;
A signal processing apparatus comprising: The signal processing device according to claim 5 or 6, comprising:
The delay detection unit
A resolution converter that converts the resolution of the first decoded image signal to the resolution of the second decoded image signal;
A first reference frame is extracted from a series of image frames constituting the first decoded image signal, and second from a series of image frames constituting the second decoded image signal subjected to resolution conversion by the resolution converter. An image extraction unit for extracting a reference frame of
A match detection unit that searches for a combination of two reference frames that minimizes a difference between the first and second reference frames, and calculates the delay amount based on a time difference between the searched reference frames;
A signal processing apparatus comprising:   9. The signal processing apparatus according to claim 7, wherein the image extraction unit extracts an image frame within a preset time window as the second reference frame, and searches for a combination of the reference frames. The signal extraction device is characterized in that the image extraction unit expands the time window and extracts the second reference frame when it fails.   10. The signal processing apparatus according to claim 1, wherein the first digital broadcast is a digital broadcast for a fixed receiver, and the second digital broadcast is for a mobile unit. A signal processing apparatus characterized by being a digital broadcast. A digital broadcast receiver for receiving a first digital broadcast and a second digital broadcast transmitted by simulcast,
A receiving circuit for supplying reception signals of the first and second digital broadcasts;
A signal processing device according to any one of claims 1 to 10,
A digital broadcast receiving apparatus comprising: A signal processing method for digital broadcast reception for processing received signals of both the first digital broadcast and the second digital broadcast transmitted by simulcast,
(A) decoding a reception signal of the first digital broadcast according to a first encoding standard to generate a first decoded image signal;
(B) decoding a received signal of the second digital broadcast according to a second encoding standard different from the first encoding standard to generate a second decoded image signal;
(C) detecting an error in units of a pixel block including a predetermined number of pixels in the decoding process of the step (a);
(D) When the error is not detected, the pixel block of the first decoded image signal is output. On the other hand, when the error is detected, the second block is used instead of the pixel block in which the error is detected. Generating an output image signal by outputting a corresponding pixel block in the decoded image signal;
A signal processing method comprising: A signal processing program for digital broadcast reception that causes a processor to execute processing of received signals of both the first digital broadcast and the second digital broadcast transmitted by simulcast,
(A) a first decoding process for decoding a received signal of the first digital broadcast according to a first encoding standard to generate a first decoded image signal;
(B) a second decoding process for generating a second decoded image signal by decoding the received signal of the second digital broadcast in accordance with a second encoding standard different from the first encoding standard;
(C) an error detection process for detecting an error in a pixel block unit including a predetermined number of pixels in the course of the second decoding process;
(D) When the error is not detected, the pixel block of the first decoded image signal is output. On the other hand, when the error is detected, the second block is used instead of the pixel block in which the error is detected. A signal output process for generating an output image signal by outputting a corresponding pixel block in the decoded image signal;
A signal processing program comprising:

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