JPH0879641A - Television receiver - Google Patents

Abstract

PURPOSE: To suppress the increase of a circuit scale, to cope with plural broadcast services and to improve extendability. CONSTITUTION: At the time of receiving digital broadcast, a de-packet processing module 305, an MPEG video module 307 and an MPEG audio module 308 are used. Even at the time of receiving digital CATV broadcasting, the de-packet processing module 305, the MPEG video module 307 and the MPEG audio module 308 are used. A de-packet processing and an MPEG decoding processing are made into modules and they are connected by a bus 302 to share them. Thus, the increase of the circuit scale is suppressed. Furthermore, a function can easily be extended/changed by the additional change of the module.

Description

Detailed Description of the Invention

[Object of the Invention]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver capable of receiving a plurality of broadcast waves and bidirectionally communicating.

[0002]

2. Description of the Related Art At present, in Japan, NTSC color broadcasting is being performed. Aiming to improve the image quality and sound quality of this current NTSC broadcast, the second-generation EDTV (Extended Defini) using digital technology is used.
tion TV) broadcasting is scheduled to start in 1995. In the current NTSC broadcasting, digital data of teletext is multiplexed during the vertical blanking period of the broadcast wave, so that not only ordinary broadcasting but also teletext can be viewed. Further, in recent years, new broadcasting such as data broadcasting and fax broadcasting using BS (satellite broadcasting) audio channels has been performed.

Conventionally, it has been difficult to carry out these various broadcasting services because memories and digital LSIs are expensive. However, with the progress of memory technology, it has become easy to display digital data on a display, and various broadcasting services can be used in addition to normal broadcasting. Advances in digital and semiconductor technologies are significant and have a major impact on the fields of broadcasting and communications. As digitalization of images has advanced, digital television (TV) broadcasting has begun to be considered.

A compression technique is indispensable for digitizing an image, and various standardization plans have been studied. For example,
International standardization of the MPEG (Moving Picture Experts Group) 2 system is progressing as a digital compression encoding system for compressing and transmitting a moving image. In MPEG2, D
A video signal is encoded by compositely using CT (Discrete Cosine Transform) conversion, interframe predictive encoding, run length encoding, and entropy encoding. Image compression based on this MPEG2 is also considered in digital TV broadcasting. MPEG2 is also used in CATV and the like. In a digital CATV system that performs bidirectional data transmission, a moving image is MPEG2.
By compressing by the method, it is possible to simultaneously serve using a large number of channels. MPEG
The compression based on the two standards enables compression encoding while maintaining high sound quality and high image quality.

By the way, in recent years, with the establishment of an image compression technique such as MPEG2, a multimedia service has been developed which can handle audio and video in an integrated manner and can also provide various information services by image according to a user's request. Trying to. For example, a broadcasting system that handles images, sounds, and various data in a unified manner, bidirectional CATV, and the like are under study. It is conceivable to use a television receiver as a terminal device for enjoying these various services at home.

FIG. 21 is a block diagram showing a conventional television receiver capable of receiving the current NTSC broadcast. Also, FIG. 22 is a block diagram showing an encoder for generating an NTSC signal.

For NTSC broadcasting, "broadcast system"
It is described in detail on pages 138 to 141 of the Japan Broadcast Publishing Association. The input terminals 1 to 3 of the encoder shown in FIG. 22 are supplied with R, G, and B signals of source images obtained by a television camera, a VTR, or the like, respectively. The input R, G, B signals are output by the matrix circuit 4.
Luminance signal (Y signal) and color difference signal (I signal, Q signal) respectively
Is converted to. The Y signal is delayed by the delay line 5 and given to the adder circuit 7. The I signal is delayed by the delay line 6 and supplied to the I signal low pass filter (LPF) 8. The Q signal is supplied to the Q signal LPF 9.

The I-signal LPF 8 band-limits the input I-signal and outputs it to the I-signal modulator 10. LPF for Q signal
9 limits the band of the input Q signal and outputs it to the Q signal modulator 11. The delay line 6 has an LPF 9 rather than an LPF 8.
Absorbs the difference in delay caused by the lower cutoff frequency. Further, the delay line 5 absorbs the time required for processing the I and Q signals and adjusts the timing. LPF
The output signals of 8 and 9 are respectively modulated by the modulators 10 and 11 and supplied to the adder circuit 7, where they are added to the Y signal.

The carrier used by the modulators 10 and 11 is 3.58.
It is created based on the output of the MHz oscillator 12. 3.58M
The Hz oscillator 12 has an oscillation output of a frequency of 3.58 MHz.
It is applied to the 57 ° phase shifter 13. I by the -57 ° phase shifter 13
Axial carriers are created and provided to modulator 10. Also, the I-axis carrier is moved by -90 ° phase shifter 14
A Q-axis carrier is created by 90 ° phase shift and is supplied to the modulator 11.

Further, the oscillation output of the 3.58 MHz oscillator 12 is supplied to the synchronizing signal generator 15. The sync signal generator 15 creates a composite sync signal by dividing the oscillation output of the oscillator 12 and outputs the composite sync signal to the adder circuit 7 and also generates a horizontal cycle timing signal and outputs it to the burst modulator 16.
The burst modulator 16 is provided with an oscillation output of 3.58 MHz from the oscillator 12, generates a burst signal at the timing of the timing signal, and outputs the burst signal to the adder circuit 7.

The adder circuit 7 adds the burst signal and the composite synchronizing signal to the composite signal of the Y signal and the I and Q signals to add NTS.
The C signal is generated and output via the output terminal 17. The NTSC signal thus encoded is transmitted to each home as a high frequency television signal by using a terrestrial wave, a BS wave, a CS (satellite communication) wave or the like.

On the other hand, on the receiving side, the received high frequency television signal is given to a tuner (not shown) to select a video signal of a predetermined channel, which is converted to an intermediate frequency signal and input to an input terminal 21 of FIG. Is entered. The video detector 22 detects the selected intermediate frequency signal and outputs the baseband video signal to the color subcarrier trap 23 and the band amplifier 24.
Output to. The color component is removed from the video signal by the color subcarrier trap 23 and the Y signal is extracted. This Y signal is applied to the matrix circuit 26 via the delay line 25.

On the other hand, the band amplifier 24 separates the color signal from the video signal and supplies it to the I signal synchronous detector 27, the Q signal synchronous detector 28 and the burst removing circuit 29. The burst removal circuit 29 extracts the burst signal from the input signal and outputs it to the phase comparator 30. The oscillation output of 3.58 MHz from the voltage controlled crystal oscillator 31 is also input to the phase comparator 30. The phase comparator 30 compares the phases of two inputs and outputs an error signal based on the phase difference to the voltage controlled crystal oscillator 31. As a result, the oscillation output of the voltage-controlled crystal oscillator 31 changes so that the error signal becomes zero, and the voltage-controlled crystal oscillator 31 outputs a reproduction burst signal phase-synchronized with the burst signal. This reproduced burst signal is output to the I signal synchronous detector 27 as an I axis carrier. The reproduced burst signal is phase-shifted by 90 ° by the -90 ° phase shifter 32 and is output to the Q signal synchronous detector 28 as a Q-axis carrier.

I signal synchronous detector 27 and Q signal synchronous detector
28 performs detection using the I-axis carrier or the Q-axis carrier, respectively, and obtains an I signal and a Q signal. The I signal and the Q signal are band-limited by the I signal LPF 33 and the Q signal LPF 34, respectively. The band-limited Q signal is supplied to the matrix circuit 26, and the I signal is supplied to the matrix circuit 26 via the delay line 35. Delay lines 25 and 35 are Y respectively
By delaying the signal and the I signal, the timings of the Y signal, the I signal, and the Q signal are matched and supplied to the matrix circuit 26. The matrix circuit 26 performs matrix processing on the input signal to obtain R, G, B signals. In this way, the NTSC signal is decoded.

As described above, in NTSC broadcasting, images are transmitted as analog signals. On the other hand, in the character multiplex broadcasting, a digital signal is multiplexed in the vertical blanking period of the NTSC signal, and information is transmitted by digital data. "Broadcast system"
(Japanese Broadcast Publishing Association pages 244 to 251).

FIG. 23 is a block diagram showing a conventional television receiver capable of receiving character multiplex broadcasting. FIG. 24 is a block diagram showing an encoder that generates a character multiplex broadcast signal.

The video signal output from the television program transmitting device 41 of the encoder shown in FIG. 24 is supplied to the multiplexing device 42. Also, a text program production device for creating a teletext program
The digital signal from 43 is provided to the mass memory 44. The digital signal stored in the large-capacity memory 44 is read by the character program sending device 45 and sent to the multiplexing device 42 as digital data for character multiplex broadcasting. The multiplexing device 42 multiplexes the digital data of the character multiplex broadcasting during the vertical blanking period of the video signal from the television program sending device 41 and outputs it to the television transmitter 46. The television transmitter 46 transmits, from the antenna 47, a video signal in which the character multiplex broadcast signal is multiplexed and an audio signal from the television program transmission device 41 as a broadcast wave.

On the receiving side, the broadcast wave received by the antenna 51 of FIG. 23 is supplied to the high frequency receiving section 52. The broadcast wave is tuned by the high frequency receiving unit 52, converted into an intermediate frequency signal, and then demodulated by the video demodulating unit 53 into a baseband signal. The video demodulation unit 53 and the color signal demodulation unit 54 have the same configuration as the decoder of FIG. 21, and the baseband video signal is converted into R, G, B signals by the video demodulation unit 53 and the color signal demodulation unit 54. The R, G, B signals are supplied to the picture tube 57 via the switching / mixing unit 56 of the character decoding unit 55. In this way, an image based on the image signal from the television program transmitting device 41 on the transmitting side is displayed on the display screen of the picture tube 57.

On the other hand, the output signal of the video demodulation unit 53 is also given to the character signal processing unit 58 of the sentence decoding unit 55. The character signal processing unit 58 separates and decodes the character broadcasting digital data. The character generator 59 generates dot data of a character based on the decoded data and gives it to the display memory 60. The display memory 60 arranges the dot data from the character generator 59 on the basis of the decoded data, and the switching / mixing unit
Output to the picture tube 57 via 56. This allows the picture tube 57
Characters based on the output of the character program production device 43 on the transmitting side are displayed on the display screen of. It is also possible to display only characters on the display screen of the picture tube 57.
It is also possible to superimpose the characters of the teletext on the video.

Further, the electronic sound generator 61 includes a character signal processing section 58.
An acoustic signal is generated based on the decoded data from and is given to the speaker 62 for acoustic output. The character signal processing unit 58 is controlled based on the user operation of the keypad 63.

By the way, in the above-mentioned NTSC color broadcast, the aspect ratio of the screen is 4: 3. However, in the course of research on HDTV (High Definition TV), the aspect ratio of the screen is 16:
It has been clarified that the presence of 9 can improve the sense of presence. Therefore, a second generation EDTV broadcast that transmits a wide image with an aspect ratio of 16: 9 while maintaining compatibility with the current broadcast is under study.

The effective scanning line of the second generation EDTV signal corresponds to the 16: 9 portion in the vertical center of the current NTSC signal having an aspect ratio of 4: 3. Therefore, for example, when a second-generation EDTV broadcast is displayed by a television receiver for current broadcasting having an aspect ratio of 4: 3, a letterbox display having a non-image portion at the top and bottom of the screen and a main image portion at the center is displayed. Will be done. By adopting the letterbox display, there is an advantage that the program material is not cut even if it is played back by an NTSC television receiver.

The second generation EDTV has an aspect ratio of 4:
Since only the central 16: 9 portion of the current NTSC signal of No. 3 is the effective scanning line, the number of effective scanning lines of the current NTSC signal is 480, whereas the second generation ED for transmission
The number of effective scanning lines for TV signals is 360. Second generation E
In a television receiver compatible with the DTV system,
At the time of decoding, these effective scanning lines of 360 lines are converted into 3 to 4 scanning lines and returned to 480 lines. By simply converting the scan lines,
Since the resolution of the second-generation EDTV signal is lower than that of the current NTSC signal, it has been decided to multiplex and transmit horizontal and vertical reinforcement signals for improving resolution at the time of transmission.

Regarding the encoder for generating such a second generation EDTV signal, Technical Report Vol.
The system described in 17, No. 65, pp 19-24, BCS'93-42 (Dec.1993) has been proposed. FIG. 25 is a block diagram showing this encoder.

In this example, 480 lines / screen height (lp
The progressive scanning signal of (h) is converted from 4 to 3 scanning lines and is converted into an interlaced scanning signal to be transmitted as a main screen signal in the main screen period. Then, the component VH lost due to band limitation for preventing the generation of aliasing distortion due to scan line conversion and the component LD lost due to band limitation during interlaced scan conversion are transmitted as vertical reinforcement signals in the upper and lower non-image part periods. It has become.

In FIG. 25, the R, G and B signals of the source image are input to the input terminals 71 to 73, respectively. These R, G, B signals are Y signals by the matrix circuit 74,
It is converted into an I signal and a Q signal. Y signal is vertical processing unit 75
Is applied to the 4 → 3 conversion circuit 76 and the scanning line is converted from the 480 lph signal to the 360 lph signal. Vertical processing unit
SSKF (Symmetric Short Kernel Filte) that constitutes 75
r) 77 and 78 function as a vertical LPF and a vertical HPF, respectively, and separate the scan line converted luminance signal into a vertical low band component and a vertical high band component. The PI conversion circuit 79 of the vertical processing unit 75 converts the vertical low-frequency component into an interlaced scanning signal and outputs 180 lph.
It is supplied to the letterbox conversion circuit 81 as the main screen signal of. In addition, the PI conversion circuit 80 of the vertical processing unit 75 converts the vertical high frequency component into the interlaced scanning signal to convert 180 to 360 lph.
And is supplied to the multiplex circuit 82 as the vertical time high-frequency component LD.

On the other hand, the Y signal from the matrix circuit 74, I
The signal and the Q signal are provided to the prefilter 83. The pre-filter 83 band-limits the input signal. The Y signal from the prefilter 83 is provided to the vertical high frequency component processing unit 84. The vertical high frequency component processing section 84 is composed of a V shifter 85, a 4 → 3 conversion circuit 86 and a PI conversion circuit 87. The vertical high frequency component of the Y signal is frequency-shifted to the vertical low frequency band by the V shifter 85, and then converted into the vertical high frequency component of 360 to 480 lph by the 4 → 3 conversion circuit 86.
It is converted into an interlaced scanning signal by the conversion circuit 87. The vertical high frequency component of 60 lph per field is VH '.
The signal is supplied to the multiplexing circuit 82 as a signal.

The Y signal from the matrix circuit 74 is also given to the motion detection circuit 88. The motion detection circuit 88 detects the motion of the image and outputs a motion detection signal to the multiplexing circuit 82.
If the motion detection signal from the motion detection circuit 88 indicates that the image is a still image, the multiplexing circuit 82 outputs VH '.
Signal and LD signal are multiplexed and letterbox conversion circuit 81
When it is shown that the image is a moving image, only the LD signal is output to the letterbox conversion circuit 81.

The letterbox conversion circuit 81 is a PI conversion circuit.
The main screen signal from 79 is assigned to the main screen period in the center of the screen,
The output of the multiplexing circuit 82 is assigned as a vertical reinforcement signal to the upper and lower non-image part periods of the screen and multiplexed. Letterbox conversion circuit 81
The main screen signal from the pre-combing circuit 88 is precombed by the precombing circuit 88, and then the LPF 89 outputs 0 to 4.
Bandwidth limited to 2MHz and switched through multiplex circuit 90
Applied to terminal a of 92. The precombing process is for forming a hole in the multiple frequency region of the HH 'signal described later. Further, the vertical reinforcement signal (LD / VH ') from the letterbox conversion circuit 81 is given to the fsc modulation circuit 91, and the fsc modulation circuit 91 modulates the vertical reinforcement signal by using the color subcarrier and the terminal b of the switch 92. Output to. The vertical reinforcement signal is compressed in the letterbox conversion circuit 81 to 1/3 in the time axis direction.

In the second-generation EDTV broadcasting, in order to improve the resolution in the horizontal direction, components of 4.2 MHz or higher, which cannot be transmitted in the current broadcasting band, are also transmitted. That is, the luminance signal horizontal high-frequency component from the prefilter 83 is converted into a scanning line by the 4 → 3 conversion circuit 93, and then converted into an interlaced scanning signal by the PI conversion circuit 94 to obtain a luminance signal horizontal high-frequency component of 180 lph. The HH signal is output to the letterbox conversion circuit 81. The letter box conversion circuit 81 allocates the HH signal to the main screen period and supplies it to the hall multiplexing circuit 95. The hall multiplexing circuit 93 frequency-shifts the HH signal to the blow-out hall, which is a frequency region conjugate with the color subcarrier, and supplies it as a HH 'signal to the multiplexing circuit 90 to multiplex it with the main screen signal.

On the other hand, the I and Q signals from the prefilter 83 are supplied to the 4 → 3 conversion circuits 96 and 98, respectively. The 4 → 3 conversion circuits 96 and 98 convert the I and Q signals into scanning lines and output them to the PI conversion circuits 97 and 99, respectively. Further, the I and Q signals are converted into interlaced scanning signals by PI conversion circuits 97 and 99, respectively, and are supplied to LPFs 100 and 101 via a letter box conversion circuit 81. The LPFs 100 and 101 respectively send I and Q signals to 1.
The band is limited to a low frequency band of 5 MHz or 0.5 MHz and output to the IQ modulation circuit 102. The I and Q signals are the IQ modulation circuit 102.
Is quadrature-modulated by the
Similar to the C signal, the multiplexing circuit 90 multiplexes the Y signal of the main screen.

The main screen signal from the multiplexing circuit 90 and the vertical reinforcement signal from the fsc modulating circuit 91 are switched by the switch 92 between the main screen period and the non-image part period, and the second generation EDTV is displayed.
The signal is output from the output terminal 103.

When a conventional television receiver compatible with the current system is used as a receiving side device for receiving the second-generation EDTV signal, as described above, it has a non-image part at the top and bottom and a screen center. The main screen is displayed in a letterbox format to ensure compatibility. Further, in a conventional television receiver compatible with the second generation EDTV system, high resolution display is performed by using the multiplexed horizontal and vertical reinforcement signals.

FIG. 26 is a block diagram showing a conventional television receiver compatible with the second generation EDTV system as described above. Technical Report of the Institute of Television Engineers of Japan Vol. 17, No. 65, pp19-
24, BCS'93-42 (Dec. 1993).
The decoder shown in FIG. 26 decodes the second generation EDTV signal obtained by the encoder shown in FIG.

The second generation EDTV signal is supplied to the switch 112 via the input terminal 111. The main picture signal in the main picture period is given to the three-dimensional Y / C / HH 'separation circuit 113 and the motion detection circuit 114 by the switch 112, and the vertical reinforcement signal in the upper and lower non-picture area is given to the fsc demodulation circuit 115. The motion detection circuit 114 detects the motion of the main screen signal and outputs a motion detection signal. Three-dimensional Y / C / HH 'separation circuit 113
Has a frame memory (not shown), and based on the motion detection signal, a Y signal and a color signal (I,
Q signal) and a horizontal reinforcement signal (HH 'signal).

The separated Y signal is supplied to the adder 116 as a horizontal low band luminance signal. Further, the HH 'signal is given to the HH demodulation circuit 117 and demodulated, and 4.2 to 6 MHz.
The HH signal which is the horizontal high-frequency component of The adder 116 improves the horizontal resolution of the main screen signal by adding the HH signal to the Y signal, and the adder 118,
It outputs to the high pass filter (HPF) 119, the LPF 120 and the motion detection circuit 121.

On the other hand, the vertical reinforcement signal from the switch 112 is demodulated by the fsc demodulation circuit 115 and the horizontal expansion circuit 122.
Is supplied to. The vertical reinforcement signal is time-expanded three times by the horizontal expansion circuit and is applied to the LD / VH ′ separation demodulation circuit 123. The motion detection circuit 121 detects the motion of the main screen signal and outputs the motion detection signal, and the LD / VH 'separation demodulation circuit 123 converts the vertical reinforcement signal into the LD signal and the VH' signal based on the motion detection signal. To separate. LD signal is SS
The VH 'signal is given to the KFVHPF 124 and is given to the 3 → 4 conversion circuit 125.

The demodulated LD and VH 'signals are used to improve the vertical resolution of the main screen signal. SSKFVHPF124
Outputs the vertical time high frequency component of the luminance signal to the adder 118 by the inverse filter processing. The adder 118 is the adder 116
The vertical time high frequency component is added to the main screen signal from to correct the resolution decrease at the time of interlaced scanning conversion. The output of the adder 118 is given to the 3 → 4 conversion circuit 130.

By the way, since the LD signal is modulated using the color subcarrier on the transmitting side, it is 1.2 MH.
It does not contain z or more components. Therefore, for components of 1.2 MHz or more of the main screen signal, the resolution cannot be improved by using the vertical reinforcement signal, and the motion adaptive scanning line interpolation is performed.

That is, the main screen signal from the adder 116 is H
The PF 119 band-limits the component of 1.2 MHz or more and supplies it to the motion adaptive scanning line interpolation circuit 126. The motion adaptive scanning line interpolation circuit 126 performs scanning line interpolation based on the motion detection signal and outputs it to the adder 127. In the actual hardware, since the processing speed becomes high when the interlaced scanning is converted into the sequential scanning by the motion adaptive scanning line interpolation circuit 126, the transmitted scanning line and the scanning line generated by the interpolation are The direct system and the interpolation system are separately processed. That is, the output of the adder 116 is supplied to the direct adder 118, and the output generated by the interpolation from the motion adaptive scanning line interpolation circuit 126 is supplied to the interpolation adder 127.

On the other hand, the components in the horizontal band of 1.2 MHz or less of the main screen signal are extracted by the LPF 120 to obtain SSKF.
Applied to VLP128. The SSKFVLPF 128 outputs the vertical low-frequency component of the horizontal low frequency of the main screen signal to the adder 129. The adder 129 adds the output of SSKFVLPF128 and the output of SSKFVHPF124 to obtain
Adder with improved resolution of horizontal low-frequency component in interpolation system
Output to 127. The adder 127 adds the horizontal low band component and the horizontal high band component of the interpolation system and outputs the result to the 3 → 4 conversion circuit 130.
The 3 → 4 conversion circuit 130 scans the input main screen signals of the direct system and the interpolation system into signals of 480 lph, and adds them.
Output to 132.

On the other hand, the VH 'signal from the LD / VH' separation demodulation circuit 123 is converted to 4/3 times the number of scanning lines by the 3 → 4 conversion circuit 125, and the V shifter 131 frequency shifts it to the original vertical high range. Then, it is supplied to the adder 132.
The adder 132 outputs 0 to 360 l from the 3 → 4 conversion circuit 130.
By adding the vertical high-frequency component of 360 to 480 lph to the vertical low-frequency component of ph, the resolution deterioration at the time of scanning line conversion is corrected. The 480 lph progressive scan signal from the adder 132 is applied to the matrix circuit 133.

On the other hand, the three-dimensional Y / C / HH 'separation circuit 113
The color signal separated by is supplied to the IC demodulation circuit 134 and is returned to the I signal and the Q signal. After the horizontal bands of the I signal and the Q signal are limited by the LPFs 135 and 136, respectively,
It is supplied to the 3 → 4 conversion circuits 137 and 138. The 3 → 4 conversion circuits 137 and 138 respectively convert the I signal and the Q signal into scanning lines to convert them into 480 progressive scanning signals, and the matrix circuit 13
Output to 3. The matrix circuit 133 generates and outputs R, G, B signals by matrix processing. By supplying the R, G, B signals to a display (not shown), a wide image with improved horizontal and vertical resolutions can be displayed.

By the way, for the above-mentioned current NTSC broadcasting,
Conventional television receivers for teletext and EDTV broadcasts have an analog configuration. On the other hand, in recent years, digital broadcasting in which a broadcast signal is digitized and transmitted has been studied. FIG. 27 is a block diagram showing a transmission / reception system for digitized television broadcasting. Fig. 27 is a technical report of the Television Society of Japan Vol15, No.35, pp.
It is an excerpt from the system described in 31-36, BCS'91-38 (Dec. 1991). The system shown in FIG. 27 is an ISDB (Integrated Service D) that uses 12 GHz band satellite broadcast waves.
igital Broadcasting).

The TV encoders 141 and 142 generate digital signals of the television images TV1 and TV2, respectively.
The still image encoder 143 produces a still image digital signal, and the fax encoder 144 produces a facsimile image digital signal. Digital signals from these encoders 141 to 144 and another encoder (not shown) are supplied to packet encoders 145 to 148 and another packet encoder (not shown), respectively. The packet encoders 145 to 148 and the packet encoder (not shown) packetize the input digital signal and output the digital bit stream to the multiplexer 149.

Each bitstream has a multiplexer 149
Are multiplexed, and a series of digital data is supplied to the digital modulator 150 and modulated. The modulated digital signal is up-converted by the up converter 151, and the antenna 152 is converted into a 14 GHz band signal.
Sent from. This transmitted wave is received by the satellite 153, converted into a 12 GHz band signal, and then transmitted to each home. At the receiver side, the broadcast wave from the satellite 153 is received via the antenna 154 and the BS converter 155 outputs it at 1 GHz. The frequency of the band signal is converted and supplied to the BS tuner 157 which constitutes the ISDB tuner 156. BS
The tuner 157 further frequency-converts the input signal and gives it to the digital demodulator 158. The output signal of the BS tuner 157 is demodulated by the digital demodulator 158, separated into each data stream by the demultiplexer 159, and supplied to the packet decoders 160 to 163 and other packet decoders.

The packet decoders 160 to 163 and other packet decoders convert the packetized data back into a normal bitstream and display devices 164 to 164 respectively.
166 and a facsimile device 167 and other devices not shown. Thus, the display devices 164-16
Television images TV1 and TV2 and a still image are displayed at 6, respectively, and a facsimile image is obtained from the facsimile device 167.

As described above, in the ISDB system, a plurality of television images can be converted into digital data and time-division multiplexed for transmission, and at the same time, other digital data can be transmitted. For example, it is possible to simultaneously transmit facsimile data and digital data such as game software.

ISDB is described in detail in the 1993 Television Society Annual Conference, ITE'93, 15-6, "ISDB Hierarchical Model", and 15-8, "Enhancement of Digital Television Service." As described above, the system is constructed using the layered structure.

FIG. 28 is an explanatory view showing the layer structure described in these documents.

Each layer shows a typical function of ISDB. The left column of the figure is an example of the transmitting side, and the right column of the figure is an example of the receiving side. Also, the center column of the figure shows an example of interface signals that connect the functions of layers. First,
The lower layers of the second and third layers define processing functions related to transmitting information to the receiver, and the upper layers of the fifth, sixth, and seventh layers specify processing functions related to services. Also, the fourth
The layer defines the function of matching the processes of the upper layer and the lower layer.

On the transmitting side, the seventh layer defines video, audio, character data, and the like. The sixth layer specifies coding, and the fifth layer specifies grouping of data. The fourth layer converts the bitstream speed, and the third layer defines packetization and time division multiplexing. The second layer specifies error correction coding and the first layer
Layers specify digital modulation.

For example, as shown in the center column of the figure, the program signal defined in the seventh layer is subjected to the encoding process based on the sixth layer. The coded data is grouped based on the fifth layer, subjected to speed conversion in the fourth layer, and converted into data of each channel. Next, packetization is performed based on the third layer, and error correction coding is performed on the second layer. The error correction coded bit stream is modulated based on the first layer, and the transmission signal is transmitted via the transmission path.

On the other hand, each layer on the receiving side is reverse processing of each layer on the transmitting side. On the receiving side, processing is performed from the first layer to the seventh layer, and the program signal is reproduced.

29 and 30 are block diagrams showing an ISDB decoder and encoder based on the layer structure of FIG. 28, respectively.

In FIG. 30, digital signals of image A and audio A of television broadcast A are input to input terminals 171 and 172, respectively. Further, the digital signals of the image B and the sound B of the television broadcast B are input to the input terminals 173 and 174, respectively. Further, digital data such as predetermined character data is input to the input terminal 175.

The digital data of the image A and the audio A are given to the MPEG video encoder 176 and the MPEG audio encoder 177, respectively, compressed, and supplied to the packet encoder 178. The packet encoder 178 packetizes the compressed image data and the compressed audio data into a FIFO (first-in first-out) memory.
Output to 179.

Similarly, the digital data of image B and audio B are MPEG video encoder 181 and MPEG, respectively.
It is supplied to the audio encoder 182, compressed, and supplied to the packet encoder 183. Packet encoder
183 packetizes the compressed image data and the compressed audio data and outputs the packetized data to the FIFO memory 184. Further, the digital data from the input terminal 175 is converted into a predetermined digital bit stream by the converter 185, packetized by the packet encoder 186 and supplied to the FIFO memory 187.

The bit streams read from the FIFO memories 179, 184 and 187 are multiplexers (hereinafter referred to as MUs).
180). MUX180
The digital stream from is added with a correction code by the error correction circuit 188, digitally modulated by the QPSK modulation circuit 189, and then given to the up converter 190. The up-converter 190 frequency-converts the digital modulation data and outputs it from the output terminal 191.

On the other hand, on the receiving side shown in FIG. 29, the transmission signal is given to the down converter 196 via the input terminal 195. The down converter 196 frequency-converts the transmission signal, and the QPSK demodulation circuit 197 demodulates the original data. The demodulated data is error-corrected by an error correction circuit 198 and then applied to a demultiplexer (hereinafter referred to as DEMUX) 199.

The demultiplexer 199 is controlled by the depacket control circuit 204 to separate the input digital stream into packet streams. The packet stream based on the image A is given to the MPEG video decoder 205 via the FIFO memory 200, decoded, and then supplied to the synthesizing circuit 208. The packet stream based on the image B is given to the MPEG video decoder 206 via the FIFO memory 201, and is decoded and then synthesized.
Supplied to the 208. The packet stream based on the voices A and B is supplied to the MPEG audio decoder 207 via the FIFO memory 202. The MPEG audio decoder 207 decodes the input data and outputs it
Output from 209 as audio output.

A packet stream based on digital data is input from the DEMUX 199 to the FIFO memory 203. This packet stream is supplied to the bus 211 via an interface (hereinafter referred to as I / F) 210. The CPU 212 stores the data input via the I / F 210 in the memory 213 via the bus 211 and reads and decodes the data. The CPU 212 outputs the decoding result to the VRAM 215 via the graphic controller 214. VR
The AM 215 develops the decoded result into an image and outputs the image data to the synthesizing circuit 208 via the graphic controller 24.

The synthesizing circuit 208 synthesizes the image data of the images A and B, synthesizes the image data from the VRAM 215, and outputs it as an image output from the output terminal 216. By supplying this image output to a display device (not shown), the images based on the images A and B and the digital data can be simultaneously displayed on the screen.

Image display can be controlled by a remote controller. A signal from a remote controller not shown is a control microcomputer 217.
It is decoded by and supplied to the depacket control circuit 204. The depacket processing can be controlled by operating the remote controller, and, for example, the sound B can be selected as the sound output. It is also possible to display only one of the images A and B. The decoding result of the control microcomputer 217 is also supplied to the CPU 212 via the I / F 218. The CPU 212 controls image generation based on the decoding result. For example, it is possible to specify the display position of an image based on the image data from the VRAM 215 by operating the remote controller. As described above, the apparatus shown in FIGS. 29 and 30 can uniformly process image data, audio data, and other digital data.

Although the above-mentioned digital broadcasting carries out unidirectional data transmission, in recent years, in digital CATV, it is considered to provide more advanced services by bidirectional data communication. Such a digital C
About ATV system, Nikkei Electronics, 1
It is detailed on pages 23-89, May 23, 994.

According to this document, in the bidirectional CATV system, a digital bidirectional channel is provided in addition to the existing analog channel. FIG. 31 is an explanatory diagram showing a spectrum of a transmission signal adopted in a CATV system that enables such bidirectional communication.

As shown in FIG. 31, the existing downlink analog channel is assigned from 50 MHz to 450 MHz to enable transmission of about 50 channels. Also, the conventional expansion channel is allocated from 450 MHz to 500 MHz. And the digital bidirectional channel is 500MH
Bands of z or more are allocated. That is, the downlink control channel, the downlink digital transmission channel, and the uplink digital transmission channel are set in the band of 500 MHz to 1 GHz, and the band for the simplified mobile phone is also set.

The downlink control channel has a bandwidth of 1.
It is 5 MHz and transmits a QPSK modulated wave. The maximum number of downlink digital transmission channels is about 15, the bandwidth is 12 MHz, and the 64-value QAM method is used as the modulation method. These downlink channels are assigned from 500 MHz to 708 MHz. The upstream digital transmission channel is assigned from 900 MHz to 972 MHz, and a maximum of about 45 channels are provided. The bandwidth of each upstream channel is 1.5 MHz and transmits a QPSK modulated wave.

32 and 33 are block diagrams showing a decoder and an encoder of such a digital CATV system, respectively.

In FIG. 33, the signals of the analog transmission channels transmitted by about 50 analog transmission channels are input through the input terminal 221 to the band pass filter (hereinafter referred to as BPF).
That is, it is limited to the band of 50 to 450 MHz. The electric / optical conversion circuit 223 converts the signal of the analog transmission channel into an optical signal and outputs it to an optical fiber (not shown).

A video server 224 is provided to realize video-on-demand in real time in response to a video software request from a user to the center of the CATV system. Video server 224 is ATM
(Asynchronous transfer mode) Connected to the switch 225 via a plurality of transmission lines. The ATM switch 225 is connected to the downlink digital transmission channel transmitter 226, the uplink and downlink control channel modulator / demodulator 227, and the uplink digital transmission channel receiver 228.

The video server 224 stores a plurality of video software and outputs image data in response to a request from the user. Since this image data is transmitted by the downstream digital transmission channel, a maximum of 15 64-value QAM modulators of the transmitter 226 are transmitted through the ATM switch 225.
Supplied to 229. Each 64-value QAM modulation section corresponds to each transmission channel, and which 64-value QAM modulation section is to be supplied with data by the ATM switch 225, that is, which of the 15 downstream digital transmission channels is used for transmission. It is decided whether to do it. The 64-value QAM modulator 229 modulates the input image data and gives it to the BPF 230 as a signal to be transmitted on the downstream digital transmission channel. The signal of the downstream digital transmission channel is BP
The band is limited to 500 to 708 MHz by F230, converted into an optical signal by the electric / optical conversion circuit 231, and then transmitted through an optical fiber (not shown).

Up and down control channel modulation / demodulation unit 227 and up digital transmission channel reception unit 228
Has a multiplexer 232, and the multiplexer 232 is an AT
It is connected to the M switch 225. The multiplexer 232 is
The data transmitted at 1.5 Mbit / sec is multiplexed to 45 Mbit / sec and transmitted, and the data transmitted at 45 Mbit / sec is converted to 1.5 Mbit / sec data. The control data transmitted from the control circuit (not shown) on the downstream control channel is also the ATM switch 22.
This control data is supplied to the ATM.
It is provided to the multiplexer 232 by the switch 225. Further, the control data is transmitted from the multiplexer 232 to QPSK.
The signal is given to the modulator 233 and QPSK modulated, and the transmitter 226
Is supplied to the BPF 230 together with the signal of the downstream digital transmission channel.

On the other hand, the signal transmitted from the terminal (not shown) through the optical fiber is input to the optical / electrical conversion circuit 235, converted into an electric signal, and supplied to the upstream digital transmission channel receiving unit 228. BPF 236 of the receiver 228
The input upstream channel signal from 900 to 972M
About 45 QPSK demodulators with a band limitation to Hz at maximum 23
Supply to 7. The upstream data is demodulated in the QPSK demodulation unit 237, multiplexed in the multiplexer 232, and supplied to the control circuit and the like via the ATM switch 225. The upstream control data transmitted by the upstream digital transmission channel is changed from the BPF236.
It is given to the QPSK demodulation unit 234 of the demodulation unit 227 and demodulated. The demodulated control data is also multiplexed by the multiplexer 232 and supplied to the ATM switch 225.

As shown in FIG. 32, the decoder on the terminal side is composed of an analog decoding section 242, a modem section 243, a graphics section 244 and an image decoding section 245. The optical fiber (not shown) that is the transmission line is the terminal 24.
Connected to 1. A signal having the spectrum shown in FIG. 31 is input through the terminal 241. The received signal is supplied to the display device (not shown) and also to the analog decoding unit 242.

The analog decoding unit 242 decodes the current analog NTSC signal, and the analog signal from the terminal 241 is supplied to the analog tuner 246. The analog tuner 246 is controlled by the analog channel selection circuit 247 to select a signal of a predetermined channel,
The analog modulation signal is converted into a baseband video signal. The video signal is scrambled on the broadcast station side, and the descrambling circuit 248 descrambles the video signal and outputs it to the volume adjusting circuit 249. The volume of the video signal is adjusted by the volume adjusting circuit 249 and output to the video / audio signal mixing circuit 250. It should be noted that the mixing circuit 250 does not perform the decoding process of the NTSC signal, but the NTSC decoder of the display device (not shown) performs the decoding process.

On the other hand, the downstream digital transmission channel signal is supplied to the modem section 243. The modem section 243 demodulates downlink data and modulates uplink data. The downlink data is supplied to the 64-value QAM demodulation section 251, and the control data is supplied to the QPSK demodulation section 252. The downlink data is demodulated by the 64-value QAM demodulation unit 251 and given to the frame decomposition circuit 254 of the image decoding unit 245. Further, the control data is demodulated by the QPSK demodulation unit 252 and is transmitted via the RF circuit controller 253 to the VCI (Virtual Channel Identifi) of the image decoding unit 250.
er) is supplied to the extraction circuit 255.

The frame decomposing circuit 254 converts the demodulated downlink data into a digital stream and supplies it to the VCI extracting circuit 255, and the VCI extracting circuit 255 extracts only the image data of predetermined image software based on the control data. This image data is decoded by the MPEG decoding circuit 256 and mixed by a video and audio signal mixing circuit 250.
Is supplied to.

On the other hand, the CPU main board 258 of the graphics section 244 outputs graphic data for displaying a predetermined graphic on the display screen of the display device. The graphic data is converted into graphic image data by the graphic board 259 and supplied to the video / audio signal mixing circuit 250. It is also possible to print a graphic image by giving graphic data from the CPU main board 258 to, for example, a printer (not shown).

Video and audio signal mixing circuit 250
Outputs or outputs a video signal and an audio signal by synthesizing or switching the image data and audio data from the analog decoding unit 242, the modem unit 243 and the graphics unit 244. Thus, the video based on the analog video signal is output and the video of the video software requested by the user is displayed on the display screen of the display device. Furthermore, a predetermined graphic image generated at the terminal is also displayed.

The upstream data is created by a control circuit (not shown), supplied to the QPSK modulator 257 via the RF circuit control 253, QPSK modulated, and then sent out via the terminal 241. .

As described above, in addition to the normal broadcasting and the character multiplex broadcasting, various broadcasting services such as the second generation EDTV broadcasting, the digital broadcasting and the CATV based on the bidirectional communication are planned. FIG. 34 is a block diagram showing a conventional television receiver compatible with all of these broadcasting services.

The ISDB broadcasting station 261 has an encoder having the same structure as in FIG. 30, and transmits a broadcast wave via the antenna 152. This transmitted wave is transmitted to each home via the satellite 153. The terrestrial broadcasting station 262 has an encoder having the same configuration as in FIG. 22, and can send NTSC broadcast waves via the antenna 265. The data generator 263 is shown in FIG.
A character-multiplexed broadcast signal can be output by an encoder having the same configuration as that of No. 4, and the terrestrial broadcasting station 262 can multiplex the character-multiplexed broadcast signal generated by the data generator 263 into an NTSC broadcast wave and transmit it. Two-way CATV
The station 264 has an encoder having the same configuration as that in FIG. 33, and uses the data having the spectrum shown in FIG.
It can be transmitted via the ATV cable 266.

The television receiver 267 is an ISDB decoder 268, an NTSC decoder 269, a character multiplex broadcasting decoder.
270, CATV decoder 271 and screen control unit 273. The ISDB decoder 268 is a decoder having the same configuration as in FIG. 29, demodulates the received data from the antenna 154 and outputs an image output to the screen control unit 273. N
The TSC decoder 269 is a decoder having the same configuration as in FIG. 21, and demodulates the signal induced in the antenna 272 and outputs an image output based on NTSC broadcasting to the screen control unit 273. The character multiplex broadcast decoder 270 has the same configuration as that of FIG.
The image output based on the character multiplex broadcast signal extracted from the TSC broadcast signal is output to the screen control unit 273. The CATV decoder 271 is a decoder having the same configuration as in FIG. 32, demodulates downlink data and outputs an image output to the screen control unit 273.

The screen control unit 273 is controlled based on the user's operation, and synthesizes or switches the image outputs from the decoders 268 to 271 and outputs them. Thus, the display screen 27
A display based on these image outputs is displayed on the screen. In FIG. 34, ISDB broadcasting and NTSC are displayed on the display screen 274.
Images 275-277 based on broadcast and CATV broadcasts and a guide screen 278 are shown to be displayed.

As described above, in order to support a plurality of broadcasting services, it is necessary to provide a plurality of decoders corresponding to each broadcasting service, which causes a problem of high cost. In addition, in ISDB broadcasting and the like, multi-angle broadcasting in which a plurality of videos are simultaneously displayed is scheduled to be performed. In order to support this broadcasting service, it is necessary to provide a plurality of video decoders, which increases the cost. Further, in a broadcasting system such as ISDB which directly transmits digital data, it is considered to provide a service in which software data is transmitted together with video data and the software transmitted at the receiving side is used.
This allows the user to extend the functionality as desired. However, in this case, the decoding function must be changed in order to support the expansion of the service, and a relatively high cost is required when expanding the service.
There was the problem of hindering flexible expansion.

[0087]

As described above, in the above-mentioned conventional television receiver, it is necessary to provide decoders individually corresponding to various broadcasting services, which results in high cost. was there. In addition, it is necessary to change the decoding function as the service is expanded, which hinders flexible expansion.

The present invention has been made in view of the above problems, and by modularizing each function required for decoding and connecting each functional module with a bus structure, a wide variety of broadcasting can be performed at low cost. An object of the present invention is to provide a television receiver capable of supporting services.

It is another object of the present invention to provide a television receiver which can easily accommodate service expansion by modularizing each function required for decoding.

[Structure of the Invention]

A television receiver according to claim 1 of the present invention includes a plurality of functional modules for realizing a plurality of functions necessary for transmitting and receiving a plurality of broadcast waves and communication waves, and the plurality of function modules. A television structure according to claim 16 of the present invention comprises a reception module capable of receiving a plurality of broadcast waves and communication waves. A demodulation module that demodulates a received signal from the reception module and outputs demodulated data, a conversion module that converts the demodulated data into a predetermined data string, and a decoding module that decodes the data string from the conversion module And an image output module for displaying an image based on the decoded data from this decoding module, and based on the decoded data from this decoding module. A voice output module for outputting the Ku voice, a modulation module for modulating predetermined transmission data,
The processing contents of the transmission module that transmits the output of the modulation module as the broadcast wave or the communication wave, and the reception module, the demodulation module, the conversion module, the decoding module, the image output module, the audio output module, the modulation module, and the transmission module are described. And a control unit that changes according to the plurality of broadcast waves or communication waves.

[0091]

In the first aspect of the present invention, a plurality of functions required for transmitting and receiving a plurality of broadcast waves and communication waves are realized by a plurality of function modules. Each functional module is time-divisionally or independently used depending on the bus structure, and a plurality of broadcast waves and communication waves are transmitted and received. That is, one functional module can be used for transmitting and receiving a plurality of broadcast waves and communication waves.

In claim 16 of the present invention, the receiving module can receive a plurality of broadcast waves and communication waves. The received signal is demodulated by the demodulation module and converted into a predetermined data string by the conversion module. Further, the image data and the audio data are reproduced by being decoded by the decoding module. These image data and audio data are presented by the image output module and the audio output module, respectively. Also, the predetermined transmission data is modulated by the modulation module and transmitted by the transmission module. Then, by changing the processing contents of these modules in accordance with a plurality of broadcast waves or communication waves, various broadcast services can be supported.

[0093]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a television receiver according to the present invention. This embodiment is the current NT
In addition to SC system analog broadcasting, digital broadcasting can be received. As digital broadcasting, terrestrial broadcasting, satellite broadcasting and cable broadcasting are supposed to be performed.

Digital signals and television signals induced in the terrestrial broadcasting antenna 318 and the satellite broadcasting antenna 319 are supplied to a mixing circuit (hereinafter referred to as MIX) 320. The MIX 320 provides these signals to the television receiver 301.

The television receiver 301 includes an NTSC decoding module 303 and a digital broadcasting receiving module 30.
4, it has various modules such as a depacket processing module 305, a digital cable module 306, an MPEG video module 307, and an MPEG audio module 308, and a bus 302 connecting these modules. The modules 303 to 308 of this embodiment realize each function. Also, the television receiver 301
Is a DMA (Direct Memory Access Device) 312, CP
U313, main memory 314, VRAM310, backend processor 311, picture tube 317, amplifier 315, speaker
It has 316 and a remote controller 309.

The main memory 314 has a television receiver.
The program for controlling 301 is stored.
The PU 313 controls the entire system by performing processing based on this program. Further, the CPU 313 can set the parameter data for each of the modules 303 to 308 and can change the set parameter data. DMA312 is CPU31
3 controls the data transfer by the bus 302, and enables data transmission / reception to / from each module 303 to 308.

The NTSC decoding module 303 is composed of processing units such as a high-frequency receiving unit, a video demodulating unit and a color signal demodulating unit, which are not shown, and decodes an NTSC television signal input from the MIX320 to obtain a digital signal. And then output via the bus 302.
The digital broadcast receiving module 304 receives the digital signal input from the MIX 320 and outputs digital data of a predetermined channel via the bus 302. The depacket processing module 305 receives the packetized data via the bus 302, depacketizes the data, converts the data into a digital stream, and outputs the data to the bus 30.
Output to 2. MPEG video module 307 is bus 30
Video data encoded by the MPEG system is input via 2 and is decoded to output image data to the bus 302. Also, the MPEG audio module 308 is a bus 30
Audio data encoded by the MPEG system is input via 2 and is decoded to output audio data to the bus 302. The MPEG video module 307 and MPE
The audio module 308 is an MPEG1 system or MPE
It is compatible with G2 system.

Also, the digital cable module 306
Has a tuner for CATV, receives a digital CATV signal through a cable (not shown), selects a predetermined channel, and outputs packet data to the bus 302.

In this embodiment, these modules
303 to 308 are functional modules. That is, these modules 303 to 308 are each for realizing a predetermined function, and each module does not individually support a predetermined broadcasting service. Each module 303 to 308 is connected by a bus 302, and DMA312
The transmission and reception of data is controlled by and is shared by a plurality of broadcasting services. In addition, each module 303 to 30
8 can be used in a time-division manner under the control of DMA312 or can be used independently. Furthermore, by changing the parameters of these modules 303 to 308,
It is also possible to make each module correspond to a plurality of broadcasting services. Since each of the modules 303 to 308 is modularized, it can be easily configured to be detachable from the main body of the television receiver 301.

The VRAM 310 is adapted to receive and hold image data via the bus 302. The back-end processor 311 reads the image data of the VRAM 310, performs a predetermined process on the read image data based on the control data input via the bus 302, and then executes the VRAM 310.
And to supply it to the picture tube 317. Picture tube 317
Displays an image based on the image data from the backend processor 311 on the display screen. The amplifier 315 amplifies the audio data input via the bus 302 and outputs it to the speaker 316. The speaker 316 acoustically outputs the supplied voice data. Remote controller
309 outputs data based on a user's operation on a remote control device (not shown) to the bus 302.

Next, the operation of the embodiment thus constructed will be described.

Now, assume that the current NTSC analog broadcast is received. When the user operates the remote control key to receive analog broadcast, the remote control data based on this operation is transferred from the remote control controller 309 to the bus 30.
Output to 2. When the CPU 313 receives the remote control data via the DMA 312, it transfers the parameters necessary for receiving the analog broadcast to the NTSC decoding module 303 via the bus 312 via the DMA 312.

On the other hand, the analog television signal induced in the antenna 318 is input to the NTSC decoding module 303 via the MIX320. The reception channel is designated by the remote controller 309, and the NTSC decoding module 303 selects a predetermined channel from the NTSC signal and decodes it to obtain a baseband video signal. This video signal is NTSC decoding module 30
It is converted to digital image data and audio data by 3 and then output to the bus 302. The DMA312 transfers the image data to the VRAM310 and the audio data to the amplifier 315.
Transfer to.

The video data is the backend processor 311.
Is read out, subjected to predetermined processing, and supplied to the picture tube 317. The audio data is amplified by the amplifier 315 and then supplied to the speaker 316. In this way, the image of NTSC broadcast is displayed on the display screen of the picture tube 317, and the sound output thereof is output from the speaker 316.

Next, it is assumed that digital broadcasting using satellites is received. This digital broadcasting is MPE
It is assumed to be encoded by the G system. When remote control data based on a user's key operation is input to the CPU 313, the CPU 313 sends each parameter required for receiving the digital broadcast via the DMA 312 to the digital broadcast receiving module 304, the depacket processing module 305, the MPEG via the bus 302. Video module 307 and MPEG
Transfer to audio module 308.

On the other hand, the satellite broadcast wave received by the antenna 319 is input to the digital broadcast receiving module 304 via the MIX 320. The digital broadcast receiving module 304 selects a channel based on the remote control operation of the user from the satellite broadcast wave, and outputs a digital bit stream to the bus 302. This digital bit stream is processed by the DMA312 in the depacket processing module 30.
Transferred to 5. The depacket processing module 305 converts the digital bit stream into a data stream of the MPEG system and outputs it to the bus 302. The DMA312 transfers the data string of the video data out of the data string of the MPE method output to the bus 302 to the MPEG video module 307 and transfers the data string of the audio data to the MPEG audio module 308.

MPEG Video Module 307 and MPE
The G audio module 308 decodes the MPEG data sequence of video and audio, respectively, and restores image data and audio data. The DMA312 stores the restored image data and audio data in the VRAM via the bus 302.
Transfer to 310 and amplifier 315. Thus, the picture tube 317
An image based on digital broadcasting is displayed on the display screen of, and its acoustic output is output from the speaker 316.

Next, assume that a digital CATV broadcast is received. When the user operates a remote control key for selecting a predetermined CATV channel, remote control data based on this operation is input to the CPU 313. CPU
Reference numeral 313 is a digital cable module 306 and a depacket processing module 30 via the DMA 302 via the bus 302 and the parameters necessary for receiving the digital CATV.
5, transfer to MPEG video module 307 and MPEG audio module 308.

A digital CATV signal from a CATV cable (not shown) is sent to the digital cable module 306.
The digital cable module 306 selects a channel based on the user's remote control operation. The digital bitstream from digital cable module 306 is transferred by DMA 312 to depacket processing module 305. The depacket processing module 305 converts the cable digital bit stream into an MPEG data stream and outputs it to the bus 302. The DMA312 supplies the video data of the MPEG data string to the MPE video module 307 and sends the audio data to the MPEG audio module.
Supply to 308.

MPEG Video Module 307 and MPE
The G audio module 308 decodes the MPEG data sequence of video and audio, respectively, and restores image data and audio data. The DMA312 stores the restored image data and audio data in the VRAM via the bus 302.
Transfer to 310 and amplifier 315. Thus, the picture tube 317
An image based on the digital CATV broadcast is displayed on the display screen of, and the sound output from the speaker 316 is output.

As described above, in this embodiment, the depacket processing is performed by the depacket processing module 306 and the MPEG decoding processing is performed by the MPEG video module both when receiving the digital broadcast and when receiving the digital CATV broadcast. 307 and MPEG
The audio module 308 is used to share the hardware.

That is, in this embodiment, the NTSC decoding module 303 and the digital broadcast receiving module 30
4, functional modules such as a depacket processing module 305, a digital cable module 306, an MPEG video module 307, and an MPEG audio module 308 are provided, and data can be transferred between the functional modules via the bus 312 by the DMA312. Due to the modularization of each function and the bus structure, each function module can be shared by a plurality of broadcasting services. In this way, functional modules are shared to support multiple broadcast services without providing a decoder for each broadcast service, and the hardware scale increases even when supporting a wide variety of broadcast services. Can be suppressed, and the scale of hardware can be significantly reduced as compared with the related art.

Further, since it is modularized, it is easy to change the function by changing the module. Furthermore, for example, the module is configured to be connected to the television receiver main body through a common terminal, and the extra terminal is provided, whereby expansion is extremely easy. For example,
By adding a module, it is easy to support multi-channel display in which a plurality of images based on different broadcasting services are simultaneously displayed on the screen.

FIG. 2 is a block diagram showing another embodiment of the present invention, which corresponds to multi-channelization.
2, the same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted.

The television receiver 321 of this embodiment is shown in FIG.
This television receiver 301 is provided with an extended MPEG video module 322, an extended MPEG audio module 323, and a synchronous phase control processing section 324.

The extended MPEG video module 322 and the extended MPEG audio module 323 are MPEG
It has the same configuration as the video module 307 and the MPEG audio module 308, and receives video data or audio data encoded by the MPEG system via the bus 302 and decodes the image data or audio data into a bus.
Output to 302. The synchronous phase control processing unit 324 is the VRAM 31.
Read / write to 0 can be performed asynchronously, and V
The image data stored in the RAM310 is read out and the PIP
By the (Picture In Picture) processing, a multi-screen composed of screens of multiple channels is composed.

Next, the operation of the embodiment thus constructed will be described.

On the display screen of the picture tube 317, a digital broadcast and a digital C signal are displayed on the basis of the user's remote control operation.
Images based on ATV broadcasting shall be displayed simultaneously.
Remote control data from the remote control controller 309
It is supplied to the CPU 313 via 302. The CPU 313 reads the information stored in the main memory 314 based on the remote control data and sets various parameters to each module 30.
4 to 308, 322, 323. The parameters include, for example, the data length of the packet and the window size for displaying each channel. CPU31
After transferring these parameter data to each module, 3 initializes the function of each module and starts processing.

The digital broadcast wave induced in the antenna 319 is transmitted via the MIX320 to the digital broadcast receiving module 30.
Entered in 4. Digital broadcast receiving module 304
Selects the channel specified by the user and outputs the digital bit stream to the bus 302. On the other hand, a digital CATV signal from a cable (not shown) is supplied to the digital cable module 306 to select a channel based on remote control operation. The digital bitstream from digital cable module 306 is also output on bus 302. The DMA 312 transfers the digital bit stream from the digital broadcast receiving module 304 and the digital bit stream from the digital cable module 306 in a time division manner to the depacket processing module 305 via the bus 302.

The depacket processing module 305 converts the broadcasting digital bit stream from the digital broadcasting receiving module 304 into an MPEG data string, and
The cable type digital bit stream from the digital cable module 306 is converted into an MPEG data string. In this case, the depacket processing module 305
The depacket processing is performed on each input in a time division manner while changing the parameters for the broadcast digital bit stream and the cable digital bit stream to be input.

Of the broadcast MPEG data stream from the depacket processing module 305, the video data is transferred to the MPEG video module 307 by the DMA 312, and the audio data is transferred to the MPEG audio module 308. Further, the DMA 312 transfers video data of the cable MPEG data string to the extended MPEG video module 322 and transfers audio data to the extended MPEG audio module 323.

MPEG Video Module 307 and MPE
The G audio module 308 decodes the video data and audio data of the broadcasting system coded by the MPEG method, respectively, and restores the image data and the audio data. On the other hand, the extended MPEG video module 322 and the extended MPEG audio module 323 decode cable-type video data and audio data encoded by the MPEG system, respectively, to restore image data and audio data. MPEG video module 307 and extended MP
The image data restored by the EG video module 322 is transferred to and stored in the VRAM 310 by the DMA 312.

The broadcast image data and the cable image data stored in the VRAM 310 are asynchronously read by the synchronous phase control processing unit 324, subjected to PIP processing, combined, and stored in the VRAM 310. The back-end processor 311 reads out the multi-screen image data stored in the VRAM 310 and performs a predetermined process, and then the picture tube 31.
Supply to 7. Thus, two screens based on digital broadcasting and digital CATV broadcasting are displayed on the display screen of the picture tube 317 by PIP display.

On the other hand, the MPEG audio module 308
Broadcast and cable audio data from the extended MPEG audio module 323 is transferred to the amplifier 315 by the DMA 312, amplified and converted into an analog signal, and then acoustically output from the speaker 316. Note that it is possible to simultaneously output the audio outputs of the broadcasting system and the cable system in stereo, and it is also possible to select and output only one of them.

As described above, according to the present embodiment, the parameter of the depacket processing module 305 is changed to time division, and the depacket processing for receiving the digital broadcast and the digital CATV broadcast is performed. Even when displaying a multi-screen based on CATV broadcasting, decoding can be performed only by the depacket processing module 305, and an increase in hardware scale can be suppressed. For decoding the MPEG data string, in consideration of the current processing speed of the MPEG chip, the extended MPEG video module 322 and the extended MPEG audio module 323 are used in addition to the MPEG video module 307 and the MPEG audio module 308. However, if the processing speed of the MPEG chip will be improved in the future, sharing will be possible by the time division processing of the MPEG video module 307 and the MPEG audio module 308 like the depacket processing module without the need for an expansion module. It is fully possible to achieve this.

FIG. 3 is a block diagram showing another embodiment of the present invention. In FIG. 3, the same components as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. This embodiment is a digital C
The ATV bidirectional communication function is added. The two-way communication function is VOD (Video On D) of digital CATV.
emand) is what you need.

This embodiment is different from FIG. 1 in that a bidirectional communication module 332 is adopted instead of the digital cable module 306 and a graphics controller 333 is adopted. The bidirectional communication module 332 receives digital bidirectional CATV broadcast digital data from a cable (not shown), demodulates the digital data, and outputs packet data to the bus 302. Further, the bidirectional communication module 332 has, for example, an RF circuit controller and a QPSK modulator, and can also modulate upstream data and send it out via a cable (not shown). Graphics controller 333
Data input via the bus 302 is transferred to a GUI (Grahphic
s User Interface) is converted to graphics data and output.

Next, the operation of the embodiment thus constructed will be described.

It is assumed that the user operates the remote controller for viewing the digital CATV broadcast. The spectrum of the digital CATV broadcast signal is as shown in FIG. Remote control data from the remote control controller 309 is supplied to the CPU 313, and the CPU 313 reads out the data in the main memory 314, and the DMA 312 reads each module 305, 307, 30.
8, 332, the graphics controller 333, and the back-end processor 311 are caused to transfer parameters according to the CATV broadcast reception function. The parameter data is set in an internal register (not shown) of each module or the like, and the function of each module or the like is changed for CATV reception.

The graphics controller 333 transfers the GUI graphics data indicating channel selection, program content, etc. to the VRAM 310. The graphics data stored in the VRAM 310 is read by the back-end processor 311 and supplied to the picture tube 317 for display. While viewing this display, the user uses the remote control device to perform, for example, a program selection operation.

When the remote control data based on the user's selection operation is transferred from the remote control controller 309 to the CPU 313, the CPU 313 transfers the parameter data corresponding to the transferred data to the bidirectional communication module 332. The bidirectional communication module 332 creates communication data based on the remote control data, QPSK-modulates the data, and sends the data to the cable.

Data from the television receiver 331 is transmitted to a CATV base station (not shown) via a cable. The base station starts supplying digital data of the program based on the data indicating the selection of the program.

The bidirectional communication module 332 starts reception of digital data, and at the same time, transmits to the CPU 313 a command indicating that reception of a program has started. As a result, the CPU 313 issues a command for stopping the output of graphics data to the graphics controller 333 to stop the display based on the graphics data of the GUI.

The bidirectional communication module 332 demodulates the received data and outputs the digital bit stream to the bus 302. This digital bit stream is DMA312
Transferred to the depacket processing module 305 by the M
Converted to a PEG data string. The video data of the MPEG data stream from the depacket processing module 305 is supplied by the DMA 312 to the MPEG video module 307 via the bus 302, and the audio data is MP
It is supplied to the EG audio module 308. MPEG
The video module 307 and the MPEG audio module 308 decode the MPEG encoded video data and audio data to restore image data and audio data.

The restored image data and audio data are
The data is transferred to the VRAM 310 or the amplifier 315 by the DMA 312, respectively. The image data is read from the VRAM 310 to the back-end processor 311 and subjected to predetermined processing, and then supplied to the picture tube 317. On the other hand, the audio data is supplied to the amplifier 315, amplified, and then given to the speaker 316. In this way, the image and sound based on the CATV broadcast are presented from the picture tube 317 and the speaker 316, respectively.

As described above, in the present embodiment, the bus 30
Bidirectional communication becomes possible by changing the digital cable module connected to 2 to a bidirectional communication module. Even if a new broadcasting service is launched,
Hardware can be shared, and an increase in hardware scale can be suppressed as in the embodiment of FIG.

FIG. 4 is a block diagram showing another embodiment of the present invention. The television receiver 341 of this embodiment is similar to that shown in FIG.
Through further subdividing the function of each module in FIG.
Group functional modules of the same type together,
Each functional module group is connected by a bus.

The input terminals 342 to 344 are respectively provided with the current NTS.
Downstream signals such as C signal, digital broadcast signal or CATV signal are input. The NTSC tuner 345 has its tuning controlled by a tuning control signal output from a bus controller 348 described later, and selects a signal of a predetermined channel to obtain a baseband video signal. ISDB tuner 346
Tuning is controlled by a tuning control signal output from the bus controller 348, and a signal of a predetermined channel is selected to obtain broadcasting digital data. Also, CAT
Tuning of the V tuner 347 is controlled by a tuning control signal output from the bus controller 348, and a signal of a predetermined channel is selected to obtain cable system digital data. The CATV modulator 350 modulates the upstream data and outputs it from the output terminal 351.

An analog video signal from the tuner 345, I
Broadcast system digital data from the SDB tuner 346 and cable system digital data from the CATV 347 are output to the analog switch box 349. The analog switch box 349 is controlled by the bus controller 348 to switch the input / output destination, and outputs the outputs of the tuners 345 to 347 to the QPSK demodulation unit 351 of the modulation / demodulation module group.
, 64QAM demodulation section 352 or A / D conversion and clock recovery section 354, and the output of QPSK modulation section 353 to CATV modulator 350. The demodulator 351
, 352, the modulator 353, and the A / D converter and clock regenerator 354 are controlled by the I / F bus 356 for control and data.
It is connected to the. Further, the demodulation units 351, 352 and the modulation unit 35
3 and the A / D conversion and clock recovery unit 354 are connected to the bus 356
It is designed to be controlled by a control signal output from.

FIG. 5 is a block diagram showing a specific configuration of the QPSK modulator 353 shown in FIG.

Digital data from the bus 356 is I / F
It is supplied to the serial / parallel conversion circuit 376 via 375. The serial-parallel conversion circuit 376 alternately outputs the input serial data to the multipliers 377 and 378. Carriers having an orthogonal relationship are input to the multipliers 377 and 378 via a phase shifter 379, which will be described later, and perform modulation by multiplying the data from the serial-parallel conversion circuit 376 and each carrier. The carrier generation circuit 380 outputs an oscillation output of a predetermined frequency to the phase shifter 379. The phase shifter 379 shifts the phase of the oscillation output,
One carrier having an orthogonal relationship is generated. Multiplier 377
, 378 outputs are supplied to the adder 381, and the adder 381 synthesizes the data from the multipliers 377, 378 and outputs it to the analog switch box 349.

In the QPSK modulator configured as described above, the serial data from the I / F 375 is alternately supplied to the multipliers 377 and 378 by the serial / parallel conversion circuit 376. On the other hand, the carrier of the predetermined frequency from the carrier generation circuit 380 is phase-shifted by the phase shifter 379, and the carriers having a mutually orthogonal relationship are supplied to the multipliers 377 and 378.

The multiplier 377 has a phase which is 4 times that of the input data.
Multiply with a carrier of 5 degrees. Further, the multiplier 378 multiplies the input data by the carrier whose phase is 45 + 90 degrees. FIG. 6 shows the phases of the signals output from the multipliers 377 and 378. When the digital data input to the multiplier 377 is “1”, the multiplier 377 outputs the data shown in FIG.
When the signal 1 is output and is “0”, the multiplier 377
Outputs the signal 2 in FIG. When the digital data input to the multiplier 378 is "1", the multiplier 378 outputs the signal 3 in FIG. 6, and when the digital data is "0", the signal 4 is output. Adder 381 is multiplier 377
, 378 outputs are combined and analog switch box 379
Output to.

FIG. 7 is a block diagram showing a specific structure of the QPSK demodulation unit 351 in FIG.

Digital data from the analog switch box 349 is supplied to the two-way divider 361. 2 distributor 36
1 distributes the input digital data to multiply 362
, 363 is output. A voltage controlled oscillator (hereinafter referred to as VCO) 365 has its oscillation output frequency controlled by a control signal from a carrier regeneration circuit 366 described later, and outputs an oscillation output (regenerated carrier) to a phase shifter 364. Phase shifter 364
Phase shifts the oscillation output so that the phase is, for example, 45
And a reproduction carrier having a phase of 45 + 90 degrees are output to multipliers 362 and 363, respectively.

Multipliers 362 and 363 perform detection by multiplying each reproduction carrier having an orthogonal relationship by the digital data from the two-way divider 361. Multipliers 362 and 363
The respective detection outputs from are supplied to LPFs 367 and 368, respectively. The LPFs 367 and 368 band-limit the input data and output it to the comparators 369 and 370. Comparator 36
9, 370 obtains a binarized digital data string by comparing the input signal with a predetermined threshold value. I / F37
1, the digital data strings from the comparators 369 and 370 are time-division multiplexed and output to the bus 356.

The carrier reproducing circuit 366 is an LPF 367, 368.
The carrier is reproduced based on the output of the carrier and the control signal based on the frequency and phase shift of the reproduced carrier is output to the VCO 365 to obtain carrier synchronization.

In the QPSK demodulation section thus constructed, the two-way divider 361 divides the digital data into two and gives them to the multipliers 362 and 363. Multiplier 362,
Reproduced carriers having a mutually orthogonal relationship are supplied to 363, and the multipliers 362 and 363 demodulate the data by multiplying the input data and the reproduced carrier. For example, the multiplier
When the signal 1 of FIG. 6 is input to the 362, the multiplier 362
Outputs "1" to the comparator 369, and outputs "0" to the comparator 369 when the signal 2 is input. Further, the multiplier 363 receives “1” when the signal 3 in FIG. 6 is input.
When the signal 4 is input, “0” is output to the comparator 370. Comparators 369 and 370 binarize the input signal and output digital data. comparator
Digital data from 369 and 370 is output to the bus 356 via the I / F 371.

FIG. 8 is a block diagram showing a specific structure of the 64QAM demodulation section 352 shown in FIG. In FIG.
The same components as those of the above are denoted by the same reference numerals and the description thereof will be omitted. Further, FIG. 9 is an explanatory diagram for explaining 64QAM symbol data.

The 64QAM demodulation section 352 of FIG.
In place of the comparators 369 and 370 of the PSK demodulation unit 351, eight-value → binary conversion circuits 372 and 373 are provided. 8
The value-to-binary conversion circuits 372 and 373 are adapted to convert octal digital data into binary digital data and output it to the I / F 371.

In the 64QAM demodulator thus constructed, the multipliers 362 and 363 perform demodulation by multiplying the reproduction carrier having an orthogonal relationship with each other and the output of the two-way divider 361. FIG. 9 shows a vector of 64QAM symbol data. 64QAM symbol data is formed by modulating a carrier having an orthogonal relationship into eight levels in the amplitude direction. Therefore, as shown by the black circles in FIG. 9, 64-bit information can be transmitted by 1-symbol data.

LPFs 367 and 368 are multipliers 362 and 36, respectively.
The band of the 8-value digital data from 3 is limited and output to the 8-value → binary conversion circuits 372 and 373. The 8-value to 2-value conversion circuits 372 and 373 convert the 8-value digital data from the LPFs 367 and 368 into binary values and supply them to the I / F 371.

FIG. 10 is a block diagram showing a specific structure of the A / D conversion and clock recovery unit 354 in FIG.

An NTSC analog signal from the analog switch box 349 is input to the input terminal 385. This analog signal is applied to A / D converters 386 and 389, a clock generation circuit 390 and a sync separation circuit 391.
The sync separation circuit 391 separates the horizontal and vertical sync signals from the input analog video signal and outputs the burst gate signal to the clock generation circuits 390 and 392. The clock generation circuit 390 extracts the burst signal using the burst gate signal, generates a clock having a frequency four times as high as the color subcarrier frequency (fsc), which is suitable for decoding the NTSC signal, and generates the A / D converter 386. Output to. The A / D converter 386 is
The analog video signal is digitized using the clock from the clock generation circuit 390 and output to the I / F 387.

On the other hand, the clock generation circuit 392 generates a clock having a frequency of 8 / 5fsc suitable for a digital signal of character multiplex broadcasting and outputs it to the A / D converter 389. The A / D converter 389 converts the character multiplex broadcasting signal into a digital signal and outputs it to the waveform equalizing circuit 393. Waveform equalizer 393 is A /
Data slicing circuit by equalizing waveform of D converter 389 output
The data slicing circuit 394 is applied to the waveform equalizing circuit 39.
The output of 3 is sliced at a predetermined level and output to the I / F395. The I / D 387 and 395 output the input digital data to the bus 356.

According to the A / D conversion and clock recovery section thus constructed, the clock generation circuit 390
A clock having a frequency suitable for digital processing of a video signal is generated. The A / D converter 386 digitizes the analog video signal using this clock and outputs it to the bus 356 via the I / F 387.

On the other hand, the clock generation circuit 392 generates a clock suitable for the digital signal of the character multiplex broadcasting. The A / D converter 389 digitizes the character multiplex broadcast signal using this clock. The output of the A / D converter 389 is waveform equalized by the waveform equalization circuit 393 and then sliced by the data slice circuit 394 to obtain the I / F 395.
To the bus 356 via.

In this way, the NTSC digital video signal and the character multiplex broadcast data are supplied to the bus 356 in a time division manner, and these signals can be processed at the same time.

In FIG. 4, a bus 356 connects each module of the modulation / demodulation module group to each module of the packet depacket / descramble module group. The packet / depacket and descramble module group is the depacket / descramble unit 401.
, Descramble or through section 402 and packet section 404
It is composed by. The depacket descrambling unit 401, descrambling or through unit 402 and packet unit 404 are connected to the buses 356 and 404 via the I / F.

FIG. 11 is a block diagram showing a specific structure of the depacket descrambling unit 401 shown in FIG.

The data from the bus 356 is supplied to the error correction circuit 407 and the synchronization control circuit 408 via the I / F 411. The control signal from the I / F 411 is supplied to the controller 109. The synchronization control circuit 408 synchronizes the input data stream, and the controller controls the error correction processing of the error correction circuit 407 based on the control signal. The error correction circuit 407 corrects a predetermined error in the input data stream and outputs it to the frame synchronization circuit 413. The frame synchronization circuit 413 synchronizes the frame of the input data. Frame synchronization circuit 41
The output of 3 is given to the FIFO memory 414, and the FIFO memory 414 outputs the stored data to the purging processing circuit 415. The purging processing circuit 415 analyzes the input data string and outputs it to the memory control circuit 417. Further, the descramble processing circuit 416 reads out the data string from the purging processing circuit 415, performs descramble processing on the scrambled data, and supplies the scrambled data to the purging processing circuit 415.

The memory control circuit 417 separates the data sequence into data such as image data, audio data graphic data and computer program by writing and reading the data sequence into the memory 418 based on the result of the purging, and I Output to / F419.

The frame synchronizing circuit 413, purging processing circuit 415 and descramble processing circuit 416 are controlled by the controller 412. That is, the I / F 411 supplies the control signal from the bus 356 to the controller 412. The controller 412 adjusts the frame synchronization timing by the frame synchronization circuit 413 and changes the processing content of the descramble processing circuit 416 based on the input control signal. In addition, the controller 41
2 outputs a control signal to the purging processing circuit 415,
A predetermined parsing process such as header analysis is set according to the received format.

According to the depacket descrambling unit configured as described above, the packet data or the scrambled data is input to the frame synchronization circuit 413 via the I / F 411 to be frame synchronized. The frame-synchronized data is supplied to the purging processing circuit 415 via the FIFO memory 414 to be subjected to the purging processing. Further, the descramble processing circuit 416 performs descramble processing on the scramble data of the purging processing circuit 415.

The descrambled and analyzed data is written and read in the memory 418 by the memory control circuit 417 and is read out, separated into image data, audio data, graphic data and other various data, and I / F.
Output to bus 404 via 419.

In this way, it becomes possible to decode the data strings of different formats.

In FIG. 4, the descrambling or through processing section 402 descrambles or through-processes the digital bit string input from the bus 356 through the I / F and outputs it to the bus 404 through the I / F. To do. The packet unit 403 packetizes the digital data input from the bus 404 via the I / F, and transmits the packetized data to the bus 356 via the I / F.
Output to. These depacket descrambling units 40
1, the descramble or through processing unit 402 and the packet unit 403 are controlled by a control signal input from the bus controller 348 via the bus 404.

The bus 404 is adapted to connect each module of the packet depacket and descramble module group and each module of the decode / encode module group. The decoding / encoding module group is an MPEG2 video decoding unit 421, M
PEG2 audio decoding unit 422, NTSC and ED
TV horizontal decoding unit 423, EDTV vertical decoding unit 424
, MPEG2 video decoding unit 425, MPEG2 video encoding unit 426, and MPEG2 audio encoding unit 427. The decoding units 421 to 425 and the encoding units 426 and 427 are connected to the buses 404 and 428 via the I / F. In addition, the decoding unit 421
To 425 and the encoding units 426 and 427, the internal parameters are changed based on the control signal input from the bus controller 348 via the bus 428.

FIG. 12 is a block diagram showing a concrete structure of the MPEG2 video decoding units 421 and 425 in FIG. The basic structure of the MPEG video decoder is described in "Nikkei Electronics, March 14, issue, pages 77 to 92, and further," Interface 199.
It is described in detail in the August 2 issue, pages 125 to 145. The decoder of FIG. 12 is adapted to this embodiment based on these descriptions.

The MPEG data stream from the bus 404 is an I / F
It is supplied to the reception buffer 452 via 451. The reception buffer 452 temporarily holds the input MPEG data sequence and then outputs it to the variable length decoder 453 at a predetermined decoding rate.
The variable length decoder 453 subjects the MPEG data string to variable length decoding and supplies it to the inverse quantization circuit 454, and the inverse quantization circuit 454 inversely quantizes the input data and outputs it to the inverse DCT circuit 455. The inverse DCT circuit 455 performs inverse DCT processing on the input inverse quantized output, and returns frequency axis data to spatial coordinate axis data. The output of the inverse DCT circuit 455 is given to the adder 457 and the switch 456. The variable length decoder 453
Outputs to the switch 456 data indicating whether the input data string is intra-frame coded or inter-frame coded, and indicates the prediction direction in inter-frame predictive coding. Switch data 464
Output.

When the input data is intra-frame coded, the switch 456 selects the output of the inverse DCT circuit 455 and outputs it to the bus 428 via the I / F 458. Further, the switch 456 selects the output of the adder 457 and outputs it to the frame memory 459 and the I / F 458 when the input data is inter-frame coded.

The frame memory 459 delays the reproduction data from the switch 456 for one frame period and
460, forward predictor 463 and bidirectional predictor 462. The frame memory 460 delays the output of the frame memory 459 for one frame period and outputs it to the backward predictor 461. The forward predictor 463 obtains a predicted image by motion-compensated prediction using decoded data one frame before for the decoded frame and outputs the predicted image to the switch 464, and the backward predictor 461 outputs 1 for the decoded frame. A predicted image is obtained by motion compensation prediction using the decoded data after the frame and is output to the switch 464. Further, the bidirectional predictor 462 obtains a predicted image by motion compensation prediction using coded data of one frame before and after the decoded frame, and outputs the predicted image to the switch 464. Switch 464 is a variable length decoder 453.
The outputs of the predictors 461 to 463 are selected on the basis of the data indicating the prediction direction from and output to the adder 457.

In the MPEG decoding section having such a configuration, the MPEG data string input via the I / F 451 is temporarily held in the reception buffer 452 and then supplied to the variable length decoder 453 at a predetermined decoding rate. It MPE
The G data string is subjected to variable length decoding by the variable length decoder 453, inversely quantized by the inverse quantization circuit 454, and further inversely quantized by the inverse DCT circuit 455 to be returned to the original spatial coordinate axis data.

When the input MPEG data string is intra-frame coded, the output of the inverse DCT circuit 455 is supplied to the I / F 458 via the switch 456 and output from the bus 428.

Also, the reproduced image data from the switch 456 is delayed by the frame memories 459 and 460 and the predictor
461 to 463, and predictors 461 to 463 supply backward predictive images, bidirectional predictive images, and forward predictive predictive images to the switch 464, respectively. Input MPE
When the G data string is interframe predictive coded, the output of the inverse DCT circuit 455 is a prediction error. In this case, the switch 464 selects the prediction image from the predictors 461 to 463 based on the data indicating the prediction direction and supplies it to the adder 457. The adder 457 reproduces the frame image by adding the prediction image and the prediction error, and outputs the frame image via the switch 456. In this way, the MPEG data string is decoded and output to the bus 428 via the I / F 458.

In FIG. 4, the MPEG2 audio decoding unit 422 decodes the MPEG audio data input from the bus 404 via the I / F and outputs the audio data to the bus 428 via the I / F. It has become. The NTSC and EDTV horizontal decoding unit 423 is a bus
A main screen signal, which decodes the main screen signal of the NTSC signal or the second generation EDTV signal input from the I / F 404 and also decodes the horizontal reinforcement signal of the second generation EDTV signal to improve the horizontal resolution. Is output to the bus 428 via the I / F. Also, EDTV
The vertical decoding unit 424 decodes the vertical reinforcement signal of the second generation EDTV signal input from the bus 404 via the I / F, adds it to the main screen signal, and outputs it from the I / F to the bus 428. ing.

The MPEG2 video encoding unit 426 receives the image data from the bus 428 via the I / F,
Performs EG encoding to perform MPEG data string I / F
To the bus 404 via. Further, the MPEG2 audio encoding unit 427 receives audio data from the bus 428 via the I / F, performs MPEG encoding, and outputs an MPEG data string to the bus 404 via the I / F. Has become.

The bus 428 connects each module of the decoding / encoding module group to the amplifier 429, the graphics controller 431 and the A / D converters 434 and 436.

The amplifier 429 amplifies the audio data from the bus 428 and outputs an audio signal to the speaker (SP) 430.
The graphics controller 431 supplies the image data input via the bus 428 to the post-processing unit 432, and
Reference numeral 432 subjects the input image data to predetermined video processing and outputs an image signal to the monitor 433. The monitor 433 displays an image based on the input image signal, and the SP 430 outputs sound based on the input audio signal.

The camera 435 captures an image and outputs an image signal as A
The A / D converter 434 converts the input image signal into a digital signal and outputs the digital signal to the bus 428 via the I / F. The microphone 437 collects sound and gives a voice signal to the A / D conversion unit 436.
Converts a voice signal into a digital signal and outputs it to the bus 428 via the I / F.

The bus controller 348 is connected to the memory 438, the CPU 439 and the remote controller I / F 440 via the bus 442. The remote control device 41 outputs a command based on the user's remote control operation to the remote control I / F 440. The remote control I / F 440 sends a command from the remote control device 441 to C
Transfer to PU439. The memory 438 stores a program for controlling the decoding process of the television receiver 341. The CPU 439 executes the program of the memory 438, interprets the command based on the remote control operation, and determines the operation of the bus controller 348. The memory 43
8 also has an area for storing data from the bus 404. Further, the CPU 439 is capable of creating upstream data of CATV and outputting it to the QPSK modulator 353 via the bus controller 348 and the bus 356.

Next, the operation of the embodiment thus constructed will be described with reference to FIGS. 13 to 20. FIG.
20 to 20 are block diagrams for explaining the operation corresponding to each broadcasting service, and the modules used for each broadcasting service are shown by the diagonal lines.

First, the operation in the case of receiving the NTSC signal will be described with reference to FIG.

NTSC input through the input terminal 342
The signal wave is given to the NTSC tuner 345. A command based on the user's tuning operation to the remote control device 441 is interpreted by the CPU 439, and the CPU 439 outputs a control signal indicating the tuning channel to the NTSC tuner 345 via the bus controller 348. NTSC tuner
The 345 selects the signal of the selected channel and outputs the baseband video signal to the analog switch box 349.

In this case, under the control of the bus controller 348, the analog switch box 349 selects the output of the NTSC tuner 345 as the input destination and also selects the A / D conversion and clock recovery unit 354 as the output destination. The baseband video signal from the NTSC tuner 345 is output to the A / D conversion and clock reproduction unit 354. The A / D conversion and clock recovery unit 354 generates a clock based on the input analog signal, and uses this clock to convert an analog video signal into a digital signal.

The output of the A / D conversion and clock recovery unit 354 is supplied to the descramble or through unit 401 via the bus 356 by the bus controller 348.
NTSC and EDTV horizontal decoding unit 423 via 404
Is supplied to. The NTSC signal is decoded by the NTSC and EDTV horizontal decoding unit 423 and output to the bus 428. The bus controller 348 supplies image data to the graphics controller 431 and audio data to the amplifier 429.

Image data is a graphics controller
After being supplied to the post-processing unit 432 by the 431 and subjected to predetermined video processing, it is supplied to the monitor 433 as an image signal. Thus, an image based on NTSC broadcasting is displayed on the display screen of the monitor 433. On the other hand, the amplifier 429 amplifies the audio data and gives the audio signal to the SP430.
Sound based on NTSC broadcasting is output from P430.

Next, the operation at the time of receiving the character multiplex broadcast will be described with reference to FIG.

As shown by the slanted lines in FIG. 14, the bus controller 348 controls the analog switch box 349 even when the character multiplex broadcast is received, and the NTSC tuner 345.
Is supplied to the A / D conversion and clock recovery unit 354. The A / D conversion and clock reproduction unit 354 converts the character multiplex broadcast signal into a digital signal and outputs it to the bus 356.
The bus controller 348 is an A / D conversion and clock recovery unit.
The output of 354 is supplied to the depacket descrambling unit 401 via the bus 356.

The depacket descrambling unit 401 converts the character multiplex broadcasting digital signal from the character multiplex broadcasting format into a predetermined data string and outputs it to the bus 404. Further, the bus controller 348 transfers the data string from the depacket descrambling unit 401 to the memory 438 via the bus 442 and stores it. The CPU 439 reads the character data stored in the memory 438, converts it into image data, and transfers it to the graphics controller 431 via the bus controller 348 and the bus 428. Image data based on the character multiplex broadcasting is output to the post-processing unit 432 by the graphics controller 431, and the monitor 43
Characters based on the character multiplex broadcasting are displayed on the display screen of 3.

Next, with reference to FIG. 15, the operation in the case of simultaneously receiving the NTSC broadcast and the character multiplex broadcast will be described.

A module shown by hatching in FIG. 13 is used for the decoding operation of the NTSC signal, and a module shown by hatching in FIG. 14 is used in the decoding operation of the character multiplex broadcasting signal. The decoding of these is similar to the decoding operation described above. These decoding operations are performed in time division by the bus controller 348 transferring data in time division.

Image data based on NTSC broadcasting is NTS
The C and EDTV horizontal decoding unit 423 supplies it to the graphics controller 431 via the bus 428, and the image data based on the character multiplex broadcasting is sent from the memory 438 to the bus 42.
Supplied via 8 to the graphics controller 431. The graphics controller 431 synthesizes the two types of image data and supplies them to the post-processing unit 432. Thus, the images of NTSC broadcast and character multiplex broadcast are simultaneously displayed on the display screen of the monitor 433.

Next, referring to FIG. 16, a second generation EDTV
The operation at the time of receiving the broadcast will be described.

At the time of receiving the second generation EDTV broadcast,
As shown by the diagonal lines in FIG. 16, the EDTV vertical decoding unit 424 of the decoding / encoding module group is selected in addition to the module selected when the NTSC broadcast is received. NTSC and EDTV horizontal decoding unit 423 is bus 40
The horizontal resolution is improved by separating the horizontal reinforcement signal from the second generation EDTV signal input via 4 and demodulating and adding it to the main screen signal. On the other hand, the EDTV vertical decoding unit 424 improves the vertical resolution by separating the vertical reinforcement signal from the second generation EDTV signal, demodulating it, and adding it to the main screen signal. In this way, the main screen signal with improved horizontal and vertical resolutions is supplied to the graphics controller 431 to be synthesized and an image is reproduced.

Other operations are the same as when receiving the NTSC broadcast.

Next, the operation at the time of receiving the ISDB broadcast will be described with reference to FIG.

ISDB input through the input terminal 343
The signal is frequency converted by the ISDB tuner 346. The frequency-converted signal is supplied to the QPSK demodulator 351 via the analog switch box 349, demodulated, converted into a digital bit string, and output to the bus 356. The bus controller 348 selects the output of the QPSK demodulator 351 and transfers it to the depacket descrambler 401 via the bus 356.

The depacket processing unit 401 receives the control signal from the bus controller 348 via the bus 404,
The parameters are modified for the SDB signal format.
As a result, the ISDB digital data is converted into a predetermined data string and output to the bus 404. De-packet descrambling unit 401 by bus controller 348
Video data of the data stream from is supplied to the MPEG2 video decoder 421, and audio data is MPE.
It is supplied to the G2 audio decoder 422.

Video data and audio data are decoded by these decoders 421 and 422, respectively.
Image data is supplied to the graphics controller 431 via the bus 428, and audio data is supplied to the amplifier 429 via the bus 428.

On the other hand, in ISDB broadcasting, graphic image data is also transmitted. This graphic image data is sent from the depacket descrambling unit 401 to the bus 404.
And is stored in the memory 438 via the. CPU43
9 interprets the graphic image data stored in the memory 438 and transfers the image data to the graphics controller 43.
Output to 1. The image data from the MPEG2 video decoding unit 421 and the image data from the memory 438 are combined in the graphics controller 431, and the post-processing unit 43
Supplied to 2. Thus, the display based on the ISDB digital broadcast and graphics image data is displayed on the display screen of the monitor 433.

Next, the decoding operation corresponding to the multi-screen service in ISDB broadcasting will be described with reference to FIG.

In this case, the MPEG2 video decoding unit 425 of the decoding / encoding module group is added to the module used for receiving the ISDB broadcast. That is, a plurality of video data output from the depacket descrambling unit 401 is time-divisionally supplied to the MPEG2 video decoding units 421 and 425. These MPE
The G2 video decoding units 421 and 425 decode the input video data and supply the image data to the graphics controller 431 via the bus 428. The plurality of image data are combined by the graphics controller 431 and supplied to the post-processing unit 432, and a plurality of ISDB broadcast images are simultaneously displayed on the display screen of the monitor 433.

Next, referring to FIG. 19, the digital CAT
A decoding operation at the time of receiving an existing analog channel in V broadcasting will be described.

The analog signal input via the input terminal 344 is input to the CATV tuner 347. The analog video signal selected by the CATV tuner 347 is supplied to the A / D conversion and clock reproduction unit 354 via the analog switch box 349. Subsequent operation is NTSC
The same as when receiving the broadcast.

Next, referring to FIG. 20, the digital CAT
The operation of bidirectional communication in V will be described.

A down signal is input through the input terminal 344, and an up signal is output through the output terminal 351. The downlink signal input via the input terminal 344 is selected by the CATV tuner 347, and the analog switch box 349
QPSK demodulator 351 and 64QAM demodulator 352
Is supplied to.

The QPSK demodulator 351 demodulates the input control data, converts it into a digital bit string, and outputs it to the bus 356. Similarly, the 64QAM demodulator 352 demodulates the input digital signal to generate a digital bit string. The digital bit string output from the QPSK demodulator 351 and the 64QAM demodulator 352 is transferred to the bus 35.
It is supplied to the depacket descrambling unit 401 via 6 and converted into a predetermined data string.

Of the data string from the depacket descrambling unit 401, control data is transferred to the CPU 439 via the bus 404, video data is transferred to the MPEG2 video decoding unit 421, and audio data is MP.
It is transferred to the EG2 audio decoding unit 422. In addition,
The CPU 439 controls the decoding operation based on the control data.

The MPEG2 video decoding unit 421 decodes the video data, and the MPEG2 audio decoding unit 42
2 decodes the audio data and outputs it to the bus 428. Thus, the graphics controller 431 has a C
Image data based on ATV broadcasting is supplied to the amplifier 429.
Is supplied with the audio data.

The other operations are the same as when receiving the analog channel of CATV.

On the other hand, the upstream data based on the user's operation of the remote controller 441 is transferred from the CPU 439 to the bus controller.
It is supplied to the QPSK modulator 353 via 348. QP
The SK modulator 353 QPSK-modulates the upstream data. The modulated upstream data is supplied to the CATV modulator 350 via the analog switch box 349 and output from the output terminal 351.

Here, it is assumed that the image data is transmitted as upstream data of CATV. The image signal captured by the camera 435 is converted into a digital signal by the A / D converter 434 and output to the bus 428. Also, microphone 437
The audio signal obtained by collecting the sound is converted into a digital signal by the A / D converter 436 and supplied to the bus 428.

The image data input to the bus 428 is transferred to the MPEG2 video encoding unit by the bus control 348.
The audio data is supplied to the 426, and the audio data is supplied to the MPEG2 audio encoding unit 427. The image data and the audio data are MP-processed by the encoding units 426 and 427, respectively.
The packet unit 40 is encoded by the EG method and is transmitted via the bus 404.
Supplied to 3.

The packet unit 403 decodes the input image data and audio data into packets and transfers the packet data to the QPSK modulator 353 via the bus 356. The QPSK modulator 353 QPSK-modulates the packet data and uses the analog switch box 349 as upstream data.
To the CATV modulator 350 via. The upstream data is converted to a predetermined frequency by the CATV modulator 350 and sent to the cable (not shown) via the output terminal 351.

As described above, also in this embodiment, the same effect as that of the embodiment of FIG. 1 can be obtained. Furthermore, this embodiment has the advantage that each function is subdivided, and that it can be shared more than the embodiment of FIG.

[0219]

As described above, according to the present invention, each function required for decoding is modularized and each function module is connected by the bus structure.
The present invention has an effect that it is possible to support a wide variety of broadcasting services at low cost and easily support service expansion.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a television receiver according to the present invention.

FIG. 2 is a block diagram showing another embodiment of the present invention.

FIG. 3 is a block diagram showing another embodiment of the present invention.

FIG. 4 is a block diagram showing another embodiment of the present invention.

5 is a block diagram showing a specific configuration of a QPSK modulator 353 shown in FIG.

6 is an explanatory diagram for explaining the operation of a QPSK modulator 353 in FIG.

7 is a block diagram showing a specific configuration of a QPSK demodulation unit 351 in FIG.

8 is a block diagram showing a specific configuration of a 64QAM demodulation unit 352 in FIG.

FIG. 9 is an explanatory diagram for explaining symbol data of 64QAM.

10 is an A / D conversion and clock recovery unit 354 in FIG.
3 is a block diagram showing a specific configuration of FIG.

FIG. 11 is a depacket descrambling unit 401 in FIG.
3 is a block diagram showing a specific configuration of FIG.

12 is a diagram showing the MPEG video decoding units 421 and 42 in FIG.
5 is a block diagram showing a specific configuration of 5. FIG.

FIG. 13 is a block diagram for explaining the operation of the embodiment of FIG.

FIG. 14 is a block diagram for explaining the operation of the embodiment of FIG.

FIG. 15 is a block diagram for explaining the operation of the embodiment of FIG.

16 is a block diagram for explaining the operation of the embodiment of FIG.

FIG. 17 is a block diagram for explaining the operation of the embodiment of FIG.

FIG. 18 is a block diagram for explaining the operation of the embodiment of FIG.

FIG. 19 is a block diagram for explaining the operation of the embodiment of FIG.

FIG. 20 is a block diagram for explaining the operation of the embodiment of FIG.

FIG. 21 is a block diagram showing a conventional television receiver capable of receiving current NTSC broadcasting.

FIG. 22 is a block diagram showing an encoder that generates an NTSC signal.

FIG. 23 is a block diagram showing a conventional television receiver capable of receiving character multiplex broadcasting.

FIG. 24 is a block diagram showing an encoder that generates a character multiplex broadcast signal.

FIG. 25 is a block diagram illustrating an encoder that generates a second generation EDTV signal.

FIG. 26 is a block diagram showing a conventional television receiver compatible with the second generation EDTV system.

FIG. 27 is a block diagram showing an ISDB system.

FIG. 28 is an explanatory diagram showing a layer structure of ISDB.

FIG. 29 is a block diagram showing an ISDB decoder.

FIG. 30 is a block diagram showing an encoder of ISDB.

FIG. 31 is an explanatory diagram showing a spectrum of a transmission signal adopted in a CATV system that enables bidirectional communication.

FIG. 32 is a block diagram showing a decoder of a digital CATV system.

FIG. 33 is a block diagram showing an encoder of a digital CATV system.

FIG. 34 is a block diagram showing a conventional television receiver compatible with all broadcasting services.

[Explanation of symbols]

301… Television receiver, 302… Bus, 303… NTS
C decoding module, 304 ... digital broadcast receiving module, 305 ... depacket processing module, 306 ... digital cable module, 307 ... MPEG video module, 308 ... MPEG audio module, 312 ...
DMA, 313 ... CPU

Claims (21)

[Claims] 1. A plurality of function modules for realizing a plurality of functions required for transmitting and receiving a plurality of broadcast waves and communication waves, and a bus structure for using the plurality of function modules in a time-sharing or independent manner. A television receiver characterized in that 2. The functional module implements a processing function common to transmission and reception of two or more waves of the plurality of broadcast waves and communication waves.
Television receiver described in. 3. The television receiver according to claim 1, wherein the functional module is configured by a receiving unit that receives the plurality of broadcast waves or the communication waves. 4. The television receiver according to claim 1, wherein the functional module is configured by a transmitting unit that transmits the broadcast wave or the communication wave. 5. The functional module can be controlled by a host CPU.
The television receiver according to any one of 1. 6. The television receiver according to claim 1, wherein the functional module is capable of modulation / demodulation processing. 7. The television receiver according to claim 6, wherein the functional module is controllable by a host CPU and is capable of changing processing contents of the modulation / demodulation processing. 8. The television receiver according to claim 1, wherein the functional module is capable of error correction processing. 9. The television receiver according to claim 8, wherein the functional module is controllable by a host CPU and the processing content of the error correction processing is changeable. 10. The television receiver according to claim 1, wherein the functional module is configured by an MPEG decoding means. 11. The function module is a host CPU.
11. The television receiver according to claim 10, wherein the television receiver is controllable by means of and can change the processing content of the decoding processing. 12. The television receiver according to claim 1, wherein the functional module is capable of converting a digital bit string into a predetermined data string. 13. The function module is a host CPU.
13. The television receiver according to claim 12, wherein the television receiver is controllable by a control unit, and the processing content of the conversion processing into the predetermined data string can be changed. 14. The television receiver according to claim 1, wherein the functional module is constituted by an NTSC signal decoding / encoding means. 15. The functional module is a host CPU.
15. The television receiver according to claim 14, wherein the television receiver is controllable by, and the content of encoding / decoding processing can be changed. 16. A receiving module capable of receiving a plurality of broadcast waves and communication waves, a demodulation module for demodulating a received signal from the receiving module and outputting demodulated data, and converting the demodulated data into a predetermined data string. Conversion module, a decoding module that decodes the data string from this conversion module, an image output module that displays an image based on the decoded data from this decoding module, and a decoding from the decoding module A voice output module that outputs voice based on data, a modulation module that modulates predetermined transmission data, a transmission module that transmits the output of this modulation module as the broadcast wave or communication wave, the reception module, the demodulation module, and the conversion module. Module, decoding module, image output module, audio output module , Television receiver, characterized in that the processing contents of modulation module and transmission module and a control means for changing in response to the plurality of broadcast waves or communications waves. 17. The television receiver according to claim 16, wherein the reception module and the transmission module are connected to the image output module and the audio output module by a bus. 18. The television receiver according to claim 16, wherein the reception module and the transmission module are connected to the demodulation module and the modulation module by a bus. 19. The television receiver according to claim 16, wherein the demodulation module, the modulation module, and the conversion module are connected by a bus. 20. The television receiver according to claim 16, wherein the conversion module and the decoding module are connected by a bus. 21. The television receiver according to claim 16, wherein the decoding module and the image output module and the audio output module are connected by a bus.