WO2007058113A1

WO2007058113A1 - Signal processing device for receiving digital broadcast, signal processing method and signal processing program, and digital broadcast receiver

Info

Publication number: WO2007058113A1
Application number: PCT/JP2006/322366
Authority: WO
Inventors: Kenji Mito; Yoshitaka Tanaka
Original assignee: Pioneer Corporation
Priority date: 2005-11-21
Filing date: 2006-11-09
Publication date: 2007-05-24
Also published as: JPWO2007058113A1; JP4740955B2

Abstract

A signal processing device for generating as natural a displayed video as possible with as high a quality as possible from the received signals of digital broadcasts provided by simulcast. The signal processing device has first and second decoders and a signal output section. The first decoder detects an error in each pixel block composed of a predetermined number of pixels during decoding of the received signal. The signal output section outputs the pixel block of the decoded image signal supplied from the first decoder if no error is detected. If an error is detected, the signal output section outputs the pixel block of the second decoded image signal supplied from the second decoder, thus creating an output image signal.

Description

Specification

Digital broadcast reception signal processing apparatus, signal processing method, signal processing program, and digital broadcast reception apparatus

Technical field

TECHNICAL FIELD [0001] The present invention relates to a technique for processing a plurality of digital broadcast reception signals, and particularly to a technique for processing two types of digital broadcast reception signals transmitted by simulcast. Background art

[0002] Japanese terrestrial digital broadcasting is defined by ISDB_T (Integrated Services Digital Broadcasting Terrestrial) standard, and employs OFDM (Orthogonal Frequency Division Multiplexing) modulation and hierarchical transmission schemes. According to the ISDB-T standard, as schematically shown in Fig. 1, the transmission bandwidth of one channel (approximately 5.6 MHz) is divided into 13 subbands, that is, OFDM segments S to S. Segment

1 13

S to S can be further divided into a maximum of three gnoles or hierarchies. Every level

1 13

In addition, different transmission characteristics such as carrier modulation scheme, inner code coding rate, and time interleave length can be set, and different broadcast programs can be transmitted for each layer. For example, 12 OFDM segments S to S, S to S

1 6 8 13

High-definition television (High Definition Television) or 12 OFDM segments S to S and S to S divided into 3 layers for fixed receivers

1 6 8 13

Standard Definition Television, and can provide digital broadcasting for mobiles (simple video broadcasting) using only one segment S located in the center. In digital broadcasting for fixed receivers, MPEG2 (Moving Picture Experts Group phase 2) is adopted as the image compression method, and in digital broadcasting for mobiles, H.264 (MPEG4 AVC) is adopted as the image compression method. .

[0003] At the beginning of full-scale digital terrestrial broadcasting, so-called broadcasters provide programs with the same content on both fixed receiver digital broadcasts and mobile digital broadcasts at the same time. A simulcast (simal broadcast) is planned. For this reason, high-quality digital broadcasting is used as much as possible in mobile objects such as vehicles by using simulcast. Some technical skills to receive and send messages have been proposed. For example, in Patent Document 1 (Japanese Unexamined Patent Application Publication No. 2004-312361) and Patent Document 2 (Japanese Unexamined Patent Application Publication No. 2004-166173), depending on reception quality, digital broadcasts for mobile units and digital broadcasts for fixed receivers Has been disclosed which automatically switches between receiving and broadcasting.

[0004] However, in the receiving apparatuses of Patent Documents 1 and 2, when the received broadcast is switched from one of the digital broadcast for a mobile unit and the digital broadcast for a fixed receiver to the other, Since the picture quality changes suddenly, an unnatural image is displayed, and there is a problem in that it gives an uncomfortable feeling to those who listen to the broadcast program.

[0005] Also, even if a digital broadcast for a mobile unit and a digital broadcast for a fixed receiver are provided by simulcast, the contents of both broadcasts are not always accurately synchronized in time. In such a case, when the received broadcast is switched to a digital broadcast for a mobile unit and a digital broadcast for a fixed receiver, an unnatural image is displayed, which may give the viewer a sense of discomfort.

Patent Document 1: Japanese Unexamined Patent Application Publication No. 2004-312361

Patent Document 2: JP 2004-166173 A

Disclosure of the invention

In view of the above, an object of the present invention is to provide a signal processing device for digital transmission / reception capable of generating a display image as high as possible and as natural as possible from a plurality of digital broadcast reception signals provided by simulcast, A signal processing method, a signal processing program, and a digital broadcast receiving apparatus are provided.

[0007] A signal processing apparatus according to an aspect of the present invention is a digital broadcast reception signal processing apparatus that processes reception signals of both the first digital broadcast and the second digital broadcast transmitted by simulcast. . The signal processing apparatus includes: a first decoder that decodes a received signal of the first digital broadcast according to a first encoding standard to generate a first decoded image signal; and the first encoding standard. A second decoder that decodes a received signal of the second digital broadcast according to a different second encoding standard to generate a second decoded image signal; the first decoded image signal; and the second decoded image And a signal output unit that generates an output image signal based on the signal and outputs the output image signal, and the first decoder In the decoding process, an error is detected in units of a pixel block including a predetermined number of pixels, and the signal output unit outputs a pixel block of the first decoded image signal when the error is not detected. When the error is detected, the output image signal is generated by outputting the corresponding pixel block in the second decoded image signal instead of the pixel block in which the error is detected. is there.

[0008] A digital broadcast receiving apparatus according to an aspect of the present invention is a digital broadcast receiving apparatus that receives a first digital broadcast and a second digital broadcast transmitted by simulcast. The digital broadcast receiving apparatus includes: a reception circuit that supplies reception signals of the first and second digital broadcasts; and a reception circuit that decodes the reception signals of the first digital broadcast according to a first encoding standard. A first decoder that generates a decoded image signal and a second decoded image signal by decoding the received signal of the second digital broadcast according to a second encoding standard different from the first encoding standard And a signal output unit that generates an output image signal based on the first decoded image signal and the second decoded image signal and outputs the output image signal, and the first decoder In the decoding process of the received signal, an error is detected in units of pixel blocks including a predetermined number of pixels, and the signal output unit outputs the pixel block of the first decoded image signal when the error is not detected. While the above error When There is detected, instead of the pixel block in which the error is detected, and generates the output image signal by outputting a corresponding pixel block in the second decoded image signal.

[0009] A signal processing method according to an aspect of the present invention is a digital broadcast reception signal processing method for processing received signals of both the first digital broadcast and the second digital broadcast transmitted by simulcast. . The signal processing method includes: (a) a step of decoding a reception signal of the first digital broadcast according to a first coding standard to generate a first decoded image signal; and (b) the first decoding image signal. (C) decoding the received signal of the second digital broadcast according to a second encoding standard different from the encoding standard to generate a second decoded image signal; Detecting an error in a pixel block unit composed of a predetermined number of pixels in the conversion process, and (d) outputting the pixel block of the first decoded image signal while detecting the error when the error is not detected. Is detected, the error Generating an output image signal by outputting a corresponding pixel block in the second decoded image signal, instead of the pixel block in which is detected.

[0010] A signal processing program according to an aspect of the present invention is a signal for digital broadcast reception that causes a processor to execute processing of received signals of both the first digital broadcast and the second digital broadcast transmitted by simulcast. It is a processing program. In this signal processing program, the process is (a) a first decoding process for generating a first decoded image signal by decoding a received signal of the first digital broadcast in accordance with a first code standard. And (b) a second decoding that decodes the received signal of the second digital broadcast according to a second encoding standard different from the first encoding standard and generates a second decoded image signal. Processing, (c) error detection processing for detecting an error in a pixel block unit composed of a predetermined number of pixels in the course of the second decoding processing, and (d) when the error is not detected, the first detection While outputting the pixel block of the decoded image signal, when the error is detected, the corresponding pixel block in the second decoded image signal is output instead of the pixel block in which the error is detected. Output processing to generate output image signal And.

Brief Description of Drawings

FIG. 1 is a diagram showing 13 OFDM segments.

FIG. 2 is a functional block diagram schematically showing a configuration of a digital broadcast receiving apparatus according to an embodiment of the present invention.

FIG. 3 is a functional block diagram showing an example of a schematic configuration of a delay detection unit.

FIG. 4 is a functional block diagram showing another example of the schematic configuration of the delay detection unit.

FIG. 5 is a flowchart for explaining a delay amount detection process.

FIG. 6 is a flowchart for explaining a delay amount detection process.

FIG. 7 is a diagram for explaining a delay amount detection process.

FIG. 8 is a functional block diagram showing a schematic configuration of a signal output unit.

FIG. 9 is a diagram schematically showing an output image.

FIG. 10 is a flowchart for explaining motion detection processing.

Explanation of symbols

[0012] 1 Digital broadcast receiver 2 Receiver circuit (front end)

3 Signal processing circuit

10 Anana

11 Tuner

12 Demodulator circuit

13 First decoder

14 First delay section

15 Second decoder

16 Second delay section

17 Delay detector

18 Signal output section

19 Motion detector

BEST MODE FOR CARRYING OUT THE INVENTION

[0013] This application is based on Japanese Patent Application No. 2005-335651 for priority claim, and the contents of the basic application are incorporated herein by reference.

[0014] Various embodiments according to the present invention will be described below.

FIG. 2 is a functional block diagram schematically showing the configuration of the digital broadcast receiver 1 according to the embodiment of the present invention. This digital broadcast receiving apparatus 1 includes an antenna 10, a receiving circuit (front end) 2, and a signal processing circuit 3. The reception circuit 2 includes a tuner 11 and a demodulation circuit 12. The signal processing circuit 3 includes a demultiplexer (DMUX), a first decoder 13, a second decoder 15, delay units 14 and 15, a delay detection unit 17, and a signal output unit 18.

Referring to FIG. 2, tuner 11 selects a broadcast wave to be received by antenna 10 and frequency-converts the received broadcast wave to generate an OFDM signal. The demodulator circuit 12 generates an OFDM demodulated signal by performing FFT (Fast Fourier Transform) on the OFDM signal of the tuner 11 power, and further performs decoding processing such as deinterleaving, demapping and error correction on the OFDM demodulated signal. To generate a transport stream TS. The demultiplexer (DMUX) starts with the first elementary stream ES1 and second from the transport stream TS. The elementary stream ES2 and the TS error information TSe are separated, the first elementary stream ES1 is supplied to the first decoder 13, and the second elementary stream ES2 is supplied to the second decoder 15. The first elementary stream ES1 is a bit string compliant with the MPEG2 standard, and the second elementary stream ES2 is a bit string compliant with the H.264 standard.

[0017] Further, the demodulation circuit 12 detects an uncorrectable error in units of TS packets in the course of error correction processing, and includes TS error information TSe indicating the position where this error occurs in the transport stream TS. Supply to demultiplexer (DMUX).

[0018] The first decoder 13 decodes the first elementary stream ES1 according to the MPEG2 coding standard to generate a decoded image signal DS1. Here, the first decoder 13 generates macroblock error information MBe using the TS error information TSe, and supplies this information MBe to the signal output unit 18. Macroblock error information MBe is information indicating the presence or absence of an error for each macroblock. A macroblock usually consists of 16 x 16 or 8 x 8 pixels. The pixel block of the present invention may be a macroblock itself or a subblock obtained by further dividing the macroblock. The first decoder 13 supplies the motion detection unit 19 with motion amount information MV1 including data indicating the presence or absence of skipped macroblocks and motion vectors.

On the other hand, the second decoder 15 decodes the second elementary stream ES2 in accordance with the H.264 coding standard to generate a decoded image signal DS2. Further, the second decoder 15 supplies motion amount information MV2 including data indicating the presence / absence of a skip macroblock and a motion vector to the motion detection unit 19.

[0020] Further, the first decoder 13 and the second decoder 15 respectively have a frame rate, an image size (horizontal resolution and vertical resolution), and a pan scan (PANSCAN) of the decoded image signal DS1 and the decoded image signal DS2. Image parameters PA1 and PA2 such as a designation flag are supplied to the delay detection unit 17 and the signal output unit 18.

The first delay unit 14 delays the decoded image signal DS1 from the first decoder 13 by the first delay amount DV1 supplied from the delay detection unit 17, and generates a delayed image signal LSI. The LSI is supplied to the signal output unit 18. On the other hand, the second delay unit 16 delays the decoded image signal DS2 from the second decoder 15 by the first delay amount DV2 supplied from the delay detection unit 17. A delayed image signal LS2 is generated, and this signal LS2 is supplied to the signal output unit 18. The signal output unit 18 generates an output image signal CS based on the delayed image signal LSI and the delayed image signal LS2 in accordance with the macroblock error information MBe. The configuration of the signal output unit 18 will be described later.

[0022] The motion detector 19 moves the amount of motion of the image (hereinafter referred to as MPEG image) represented by the decoded image signal DS1 and the motion of the image (hereinafter referred to as H.264 image) represented by the decoded image signal DS2. The detection result MD is supplied to the delay detection unit 17. The delay detection unit 17 uses the detection result MD to detect a synchronization shift between the decoded image signal DS1 and the decoded image signal DS2, and compensates for the synchronization shift by using the first delay amount DV1 and the second delay amount. Delay amount DV2 is generated. Each configuration of the motion detector 19 and the delay detector 17 will be described later.

FIG. 3 is a functional block diagram illustrating an example of a schematic configuration of the delay detection unit 17. Referring to FIG. 3, the delay detection unit 17 includes an image size detection unit 20, a down converter (resolution conversion unit) 21, a first image extraction unit 22, a second image extraction unit 23, a match detection unit 24, and a frame rate detection. Part 25 and a delay amount table 26.

[0024] The image size detection unit 20 calculates the image size of the MPEG image from the image parameters PA1 and PA2.

(Vertical resolution and horizontal resolution) and the image size of the H.264 image are detected, and a conversion ratio DR which is a ratio of these image sizes is supplied to the down converter 21. The down-converter 21 converts the resolution of the decoded image signal DS1 at a conversion ratio DR, that is, thins out the decoded image signal DS1 to generate a converted image signal DC1. As a result, the image size of the converted image signal DC1 matches that of the decoded image signal DS2. For example, MPEG image is converted to high angle rate image 1920 × 1080 power H.264 image angle image 320 × 180.

In addition, the image size detection unit 20 acquires information AR indicating the aspect ratio of the MPEG image and the aspect ratio of the H.264 image, such as the image parameters PA1 and PA2, and the information AR. Supplied to match detection unit 24.

On the other hand, the frame rate detection unit 25 obtains the frame rate (= fsl) of the MPEG image and the frame rate (= fs2) of the H.264 image from the image parameters PA1 and PA2, and obtains the H.264 image. The frame rate ratio FR, which is the ratio of the frame rate of the MPEG image to the frame rate (= fslZfs2), is calculated. The data of this frame rate ratio FR It is supplied to the outlet 22 and the coincidence detector 24, respectively. For example, if the frame rate of an MPEG image is 60 fps (frames per second) or 30 fps, and the frame rate of an H.264 image is 15 fps, the frame rate ratio FR is an integer of 4 or 2.

[0027] The first image extraction unit 22 extracts a number of reference frames corresponding to the frame rate ratio FR from a series of image frames constituting the converted image signal DC1, and extracts one or more reference frames SD1. Supplied to the coincidence detector 24. On the other hand, the second image extraction unit 23 uses the delay information TB supplied from the delay amount table 26 to extract a plurality of reference frames from the middle force of a series of image frames constituting the decoded image signal DS1. These reference frames SD2 are given to the coincidence detection unit 24.

[0028] By the way, digital broadcasting for fixed receivers that are simulcast using the same channel and digital broadcasting for mobile units are not necessarily synchronized in time with each other. The deviation differs depending on the system of the broadcasting station that transmits the digital broadcast, and is specific to the system. The delay amount table 26 stores data of delay times corresponding to such synchronization loss occurring at each broadcasting station. The delay amount table 26 is supplied with a reception channel information CH indicating a currently selected channel from a control circuit (not shown). The delay amount table 26 corresponds to the reception channel information CH. The data TB of the delay time is supplied to the second image extraction unit 23.

The coincidence detection unit 24 compares the reference frames SD1 and SD2, and searches for a combination of reference frames that minimizes the information amount difference between the reference frames SD1 and SD2. The images represented by the two reference frames obtained as a result of this search are judged to be nearly identical. For example, if the number of reference frames SD1 is 2 and the number of reference frames SD2 is 3, there are 2 X 3 (= 6) combinations. A combination that minimizes the difference in the amount of information between the reference frames is searched. Further, the coincidence detection unit 24 calculates delay amounts DV1 and DV2 based on the time difference between the reference frames obtained as a result of the search. The coincidence detection unit 24 can determine whether or not there is a motion in both the MPEG image and the H.264 image according to the detection result MD by the motion detection unit 19. The coincidence detection unit 24 has a function of interrupting the search process because the coincidence accuracy of the reference frame is low when there is almost no movement in both the MPEG image and the H.264 image. FIG. 4 is a functional block diagram showing another example of the schematic configuration of the delay detection unit 17. In the delay detection unit 17 shown in FIG. 3, the resolution of the MPEG image is converted to that of the H.264 image by the downconverter 21. In the delay detection unit 17 shown in FIG. The resolution is converted to that of an MPEG image. For this reason, the first image extraction unit 22A extracts the reference frame SD1 from the series of image frames constituting the decoded image signal DS1, and the second image extraction unit 23B converts the converted image supplied from the upconverter 27. The reference frame SD2 is extracted from the series of image frames that make up the signal DC1. In addition, the coincidence detection unit 24A executes search processing using the reference frames SD1 and SD2 having high resolution of the MPEG image. The other configuration is the same as the configuration of the delay detection unit 17 shown in FIG.

Next, the delay amount detection processing mainly by the delay detection unit 17 (FIG. 3) will be described below with reference to the flowcharts of FIGS. 5 and 6. The flowcharts of Fig. 5 and Fig. 6 are connected to each other via connectors CI and C2.

Referring to FIG. 5, in step S1, a control circuit (not shown) determines whether or not simulcast is received. If simulcast is not received, the delay amount detection process is terminated. Let For example, a control circuit (not shown) decodes the transport stream for data separated by the demodulation circuit 12 to obtain EPG (electronic program guide) information, and receives simulcast based on this EPG information. It can be determined whether or not. When a simulcast is received, the image size detection unit 20 also obtains the image size of the MPEG image and the image size of the H.264 image for the image parameters PA1 and PA2, and calculates the ratio of these image sizes. (Step S2). The image size detection unit 20 supplies the conversion ratio DR, which is a ratio of the image size, to the down converter 21, and the down converter 21 converts the resolution of the MPEG image (decoded image signal DS1) at a magnification according to the conversion ratio DR. The converted image signal DC1 is generated by converting to the resolution of H.264 image (step S3).

[0033] Further, the image size detection unit 20 acquires the aspect ratio of the MPEG image and the aspect ratio of the H.264 image from the image parameters PA1 and PA2 (step S4), and the data of the aspect ratio AR is obtained. It is given to the coincidence detection unit 24. The coincidence detection unit 24 determines whether these aspect ratios are the same (step S5). If the aspect ratios are not the same, the delay amount detection process is performed. Terminate.

[0034] When it is determined that the aspect ratio of the MPEG image and the aspect ratio of the H.264 image are the same (step S5), the frame rate detection unit 25 calculates the frame rate of the MPEG image from the image parameters PA1 and PA2. And the frame rate of the H.264 image are detected (step S6). The frame rate detection unit 25 further determines whether or not the frame rate of the H.264 image is a fixed rate (step S7). If the frame rate of the H.264 image is variable, the delay amount detection process ends.

[0035] When it is determined that the frame rate of the H.264 image is a fixed rate (step S7), the frame rate detection unit 25 calculates the ratio FR between the frame rate of the MPEG image and the frame rate of the H.264 image. The frame rate ratio FR is calculated (step S8) and supplied to the first image extraction unit 22 and the coincidence detection unit 24. The coincidence detection unit 24 determines whether or not the frame rate ratio FR is an integer ratio (step S9). If the frame rate ratio FR is not an integer ratio, the delay amount detection process is terminated.

In the subsequent step S10 (FIG. 6), the motion detector 19 (FIG. 2) calculates the motion amount of the MPEG image based on the motion amount information MV1 or the decoded image signal DS1 supplied from the first decoder 13. To detect. Next, the motion detector 19 determines whether or not the motion amount of the MPEG image is outside the predetermined range, that is, whether or not there is sufficient motion in the MPEG image to detect the delay amount (step Sl l). ). When the motion amount of the MPEG image is not outside the predetermined range, the motion detection unit 19 returns the process to step S10. On the other hand, when the motion amount of the MPEG image exceeds the predetermined range, the motion detection unit 19 further determines the H.264 image based on the motion amount information MV2 or the decoded image signal DS2 supplied from the second decoder 15. The amount of movement is detected (step S12). Next, the motion detection unit 19 determines whether or not the motion amount of the H.264 image is outside the predetermined range. That is, the motion detection unit 19 determines whether or not the H.264 image has sufficient motion to detect the delay amount. (Step S13). The motion detection unit 19 returns the process to step S10 when the motion amount of the H.264 image is not outside the predetermined range, and performs the process to the next step S14 when the motion amount of the H.264 image exceeds the predetermined range. Transition. The detection result MD by the motion detector 19 is supplied to the coincidence detector 24 (FIG. 3).

[0037] In this manner, the motion detection unit 19 detects MPEG images and H.264 images that should detect an accurate delay amount. If the amount of movement of both images exceeds a certain range, the next step

It is not limited to the case where it is possible to transfer the processing to S14. It is also possible to monitor the motion amount of only one of the MPEG image and the H.264 image and shift the processing to the next step S14 when the motion amount of the one exceeds a predetermined range.

In the subsequent step S 14, the first image extraction unit 22 extracts M (M is a positive integer) reference frames SD 1 from the MPEG image, and provides these reference frames SD 1 to the coincidence detection unit 24. The number M of reference frames SD1 is determined based on the frame rate ratio FR between the MPEG image and the H.264 image. For example, when the frame rate ratio FR force S is “2”, it is possible to extract two (where is a positive integer) reference frames SD1.

[0039] Next, in order to extract the reference frame SD2 from the H.264 image, the second image extraction unit 23 uses the delay information TB indicating the delay amount Δt specific to the selected broadcast station as the delay amount. Obtained from table 26 (step S15). Subsequently, the second image extraction unit 23 determines whether the current time t

A time window (sampling window) having a length T centered around time t delayed by delay amount At from 0

1

) Is set (step S16). The time window will be described with reference to FIG. FIG. 7 shows a series of image frames MO, Ml, M2,... Constituting an MPEG image and a series of image frames HO, HI, H2,. These MPEG images and H.264 images are not synchronized with each other. In addition, the MPEG image

0

The two reference frames M5 and M6 that make up are sampled. At this time, the time window of length T is set around the time t when the current time t force is also delayed by the delay amount At.

0 1

Will be.

Next, the second image extraction unit 23 extracts N (N is a positive integer) image frames included in the time window as reference frames, and supplies these reference frames to the coincidence detection unit 24 (step). S17). In the example of FIG. 7, three reference frames HI, H2, and H3 included in the time window of length T are generated.

Next, the coincidence detection unit 24 searches for a combination that minimizes the difference between the reference frame SD1 from the first image extraction unit 22 and the reference frame SD2 from the second image extraction unit 23 (step). S18). In the example of Fig. 7, the combination (Mx, Hx) of the reference frame Mx of the MPEG image and the reference frame Hx of the H.264 image is (M5, Hl), (M5, H2), (M5, H3) , (M6 , Hl), (M6, H2), and (M6, H3). Of these combinations, the combination that minimizes the difference in the amount of information between the reference frames is searched. Specifically, for example, the luminance difference between the reference frames for each combination may be calculated for each pixel, and the sum of these luminance differences may be calculated to search for a combination that minimizes the sum. Alternatively, it is possible to search for a combination that maximizes the correlation between the reference frames.

Furthermore, the match detection unit 24 determines whether or not the search is successful (step S19). For example, if the sum of the luminance differences exceeds a predetermined threshold or if the correlation is less than a predetermined threshold, it is possible to determine that the search between the reference frames is low and the search has failed. . When the search is not successful, the coincidence detection unit 24 enlarges the time window length T in order to increase the number N of reference frames (step S21), and then returns to step S17. On the other hand, when the search is successful, the match detection unit 24 determines that the two reference frames of the combination obtained as a result of the search match, and calculates the delay amounts DVl and DV2 based on the time difference between these reference frames ( Step S20). In the example of FIG. 7, when a combination of two reference frames M5 and H2 is searched, a time difference between the reference frames M5 and H2 is obtained. The delay amounts DVl and DV2 may be set as appropriate so as to compensate for the time difference between the reference frames. Thus, the delay calculation process ends.

Note that the coincidence detection unit 24 performs a process of obtaining a difference between the reference frames by calculating a luminance difference and a correlation for all the pixels between the reference frames. The luminance difference or correlation may be calculated only for the pixels in the central area excluding the edge image areas at the upper and lower ends or the left and right edges of the image of the reference frame to be improved.

The delay amounts DVl and DV2 calculated as described above are supplied to the first delay unit 14 and the second delay unit 16, respectively. The first delay unit 14 adds the first delay amount DV1 to the time stamp value of the MPEG image, and supplies the delayed image signal LSI to the signal output unit 18 at the timing of the added value. Similarly, the second delay unit 16 adds the second delay amount DV2 to the time stamp value of the H.264 image, and supplies the delayed image signal LS2 to the signal output unit 18 at the timing based on the added value. Become. As the time stamp, PTS (Presentation Time Stamp) defined by the MPEG2 standard and the H.264 standard can be used. [0045] As shown in FIG. 2, the delay units 14 and 16 delay the decoded image signals DS1 and DS2 according to the delay amounts DV1 and DV2, respectively. However, it is not necessary to limit the arrangement to the power arrangement arranged in the subsequent stage. For example, the delay unit 14 may be arranged before the first decoder 13 to adjust the time for decoding the elementary stream ES1, or the delay unit 16 may be arranged before the second decoder 15. The time for decoding the elementary list ES2 may be adjusted. Alternatively, a configuration may be adopted in which the delay units 14 and 16 are removed from the signal processing circuit 3 and the delay detection unit 17 adjusts the decoding times of the decoders 13 and 15, respectively.

[0046] It should be noted that if the delay amounts DV1 and DV2 are calculated once when simultaneous reception of the digital broadcast for the fixed receiver and the digital broadcast for the mobile unit, which are simulcast, is started, in principle, As a result, the delay detection unit 17 does not need to calculate the delay amounts DV1 and DV2. However, the delay amounts DV1 and DV2 may be calculated periodically in a reception environment in which the synchronization error between the decoded image signals DS1 and DS2 may fluctuate.

FIG. 8 is a functional block diagram showing a schematic configuration of the signal output unit 18. The signal output unit 18 includes an up-converter 30, a frame interpolation unit 31, an image division unit 32, and a pixel block selection unit 33. Image parameters PA1 and PA2 are supplied from the first decoder 13 and the second decoder 15 to the up-converter (resolution conversion unit) 30, the frame interpolation unit 31 and the image division unit 32, respectively.

[0048] The up-converter 30 is a pixel interpolation block that converts the resolution of the delayed image signal LS2 into the resolution of the delayed image signal LSI and matches the image size of the delayed image signal LS2 with the image size of the delayed image signal LSI. is there. The frame interpolation unit 31 is a frame rate conversion block that interpolates the output of the up-converter 30 and converts the frame rate of the delayed image signal LS2 to the frame rate of the delayed image signal LSI. Then, the image division unit 32 divides the output of the frame interpolation unit 31 into macro blocks and supplies the macro blocks to the pixel block selection unit 33.

[0049] The pixel block selection unit 33 selects one of the output signal of the image division unit 32 and the delayed image signal LSI in macroblock units according to the macroblock error information MBe, and outputs the selected signal as an output image. Supply as signal CS. Specifically, the pixel block selection unit 33, when there is no error in the macro block of the delayed image signal LSI, the macro block of the delayed image signal LSI is selected and output, while there is an error in the macro block of the delayed image signal LSI. In this case, instead of the macro block in which the error has occurred, the corresponding macro block in the output signal of the image dividing unit 32 is selected and output.

[0050] As described above, only the macro block in which an error has occurred is replaced with the corresponding macro block in the output signal of the image dividing unit 32, so that the output image signal CS that is as high as possible and as natural as possible can be obtained. become. When an error occurs, as shown in FIG. 9, the picture 40 represented by the output image signal CS is a high-quality first macroblock group 41, 41, 41 for broadcasting to a fixed receiver, and for broadcasting to a mobile body. A picture that is composed of low-quality macroblocks 42a and 42b and no errors occur at all is composed of only high-quality macroblocks for broadcasting to fixed receivers. It is possible to supply a good display image.

[0051] Since the delay detection unit 17 detects a synchronization shift between the MPEG image and the H.264 image and supplies delay amounts DV1 and DV2 for compensating for the synchronization shift to the delay units 14 and 16, The delay units 14 and 16 can supply the signal output unit 18 with MPEG images and H.264 images synchronized with each other.

[0052] Furthermore, the motion detector 19 (Fig. 2) detects whether there is enough motion in the MPEG image and H.264 image to calculate the delay amount, and the detection result MD is detected. Supplied to the coincidence detector 24. Since the coincidence detection unit 24 generates the delay amounts DV1 and DV2 only when the detection result MD is positive, it is possible to reliably avoid the generation of the erroneous delay amounts DV1 and DV2.

[0053] Next, some specific methods for calculating the amount of motion detected by the motion detector 19 (Fig. 2) will be described below. The first calculation method is a method of calculating the sum of brightness differences between a plurality of temporally continuous image frames as a motion amount. Specifically, when three temporally continuous image frames P 1, P, and P are monitored, the motion detector 19 detects the image frames P, P,

0 1 2 0

The amount of motion between the total brightness difference DB1 between P and the brightness difference sum DB2 between image frames P and P

1 1

Calculate as The motion detector 19 determines that the motion amounts DB1 and DB2 are within the predetermined range only when the motion amount DB1 is equal to or greater than the predetermined threshold TH1 and the motion amount DB1 is equal to or greater than the predetermined threshold TH2. It is possible to determine that there is motion and the image is outside (steps SI 1 and SI 3; FIG. 6).

[0054] The second calculation method of the motion amount is a method using the number of skip macroblocks. According to the MPE G2 standard and H.264 standard, for example, in the process of encoding a P picture, the macroblock power of the current image (current image) to be encoded Macroblock of the image temporally prior to the current image If the motion vector is zero, the macroblock is not encoded and is skipped. Such skip macroblock information is acquired by the first decoder 13 and the second decoder 15. Therefore, the motion detection unit 19 obtains skip macroblock information from the image parameters PA1 and PA2 supplied from the first decoder 13 and the second decoder 15, and calculates the number of skip macroblocks as a motion amount. Can do. For example, when the number of skip macro blocks in one image frame is smaller than a predetermined threshold, the motion detection unit 19 determines that the amount of motion is outside the predetermined range and the image is moving ( Step Sl l, S13; Fig. 6) is possible.

[0055] The third calculation method of the motion amount is a method using a motion vector. This third calculation method will be described below with reference to the flowchart of FIG. The motion detector 19 can acquire motion vector information from the image parameters PA1 and PA2. Referring to FIG. 10, in step S30, the motion detection unit 19 searches for a macroblock in which the norm of motion beta is greater than the threshold value V in one image frame. Macroblocks whose norm exceeds the threshold can be found

TH

If not, the motion detector 19 determines that the search has failed (step S31), further determines that the amount of motion of the image is within a predetermined range (step S37), and ends the motion detection process. On the other hand, if the motion detection unit 19 finds a macroblock whose norm exceeds the threshold, the motion detection unit 19 determines that the search is successful (step S31), and sets a local region centered on the searched macroblock ( Step S32). This local area may be set to an area including several to several hundred macroblocks. Furthermore, the motion detection unit 19 counts the number of macroblocks in which the norm of the motion vector exceeds the threshold value V among the macroblocks in the local region (score).

TH

Step S33). The motion detector 19 determines whether or not the count value is equal to or greater than the set value (step S34).

[0056] When it is determined that the count value is greater than or equal to the set value (step S34), the motion detection unit 19 moves a moving object (for example, an image of an object moving in a background that does not change) within the local region. Image) exists, the process proceeds to the next step S35. On the other hand, when it is determined that the count value is less than the set value (step S34), the motion detection unit 19 determines that there is no moving object in the local area, and the motion amount of the image is within a predetermined range. Is determined (step S37), and the motion detection process is terminated.

[0057] In step S35, the motion detection unit 19 determines whether or not the angle of the motion vector of all macroblocks in the local region falls within a predetermined angle range (for example, within a range of about ± 15 degrees). judge. If the angles of the motion vectors of all macroblocks are not within the predetermined angle range, the motion detection unit 19 determines that the amount of motion of the image is within the predetermined range (step S37), and ends the motion detection process. . On the other hand, if the angle of the motion beta of all the macroblocks is within the predetermined angle range, the motion detection unit 19 determines that the moving object is moving in approximately one direction, and further, the amount of motion of the image is It is determined that the predetermined range is exceeded (step S36), and the motion detection process is terminated.

[0058] In the search process of step S18 (Fig. 6), the match detection unit 24 searches for a combination that minimizes the difference in the amount of information between the reference frames for only the local region set in step S32. May be. As a result, it is not necessary to calculate the difference between the reference frames for regions other than the local region, so that the processing speed can be improved.

[0059] Various embodiments according to the present invention have been described above. The configuration of the signal processing circuit 3 may be realized by hardware, or may be realized by a program or program code recorded on a recording medium such as an optical disk. Such a program or program code causes a processor such as a CPU to execute all or part of the functions of the signal processing circuit 3.

Claims

The scope of the claims

[1] A signal processing device for receiving a digital broadcast that processes both the received signals of the first digital broadcast and the second digital broadcast transmitted by simulcast,

A first decoder for decoding a received signal of the first digital broadcast according to a first encoding standard to generate a first decoded image signal;

A second decoder for decoding a received signal of the second digital broadcast according to a second encoding standard different from the first encoding standard to generate a second decoded image signal; and the first decoded image A signal output unit that generates an output image signal based on the signal and the second decoded image signal and outputs the output image signal;

The first decoder detects an error in a pixel block unit including a predetermined number of pixels in the decoding process of the received signal,

When the error is not detected, the signal output unit outputs a pixel block of the first decoded image signal.When the error is detected, the signal output unit replaces the pixel block in which the error is detected. A signal processing apparatus that generates the output image signal by outputting a corresponding pixel block in the second decoded image signal.

2. The signal processing apparatus according to claim 1, wherein the first digital broadcast is a higher quality digital broadcast than the second digital broadcast.

[3] The signal processing device according to claim 1 or 2, wherein the signal output unit includes a resolution conversion unit that converts the resolution of the second decoded image signal to the resolution of the first decoded image signal. A signal processing apparatus comprising:

[4] The signal processing device according to any one of claims 1 to 3, wherein the signal output unit interpolates an image frame of the second decoded image signal to perform the second operation. A signal processing apparatus comprising: a frame interpolation unit that converts a frame rate of a decoded image signal into a frame rate of the first decoded image signal.

[5] The signal processing device according to any one of claims 1 to 4, wherein:

A delay detection unit that detects a delay amount corresponding to a synchronization shift between the first decoded image signal and the second decoded image signal;

At least one of the first and second decoded image signals is delayed according to the delay amount. And a delay unit that synchronizes the first and second decoded image signals with each other.

6. The signal processing apparatus according to claim 5, wherein the motion detection detects whether or not a motion amount of an image represented by at least one of the first and second decoded image signals is outside a predetermined range. Further comprising

The signal processing apparatus according to claim 1, wherein the delay detection unit detects the delay amount only when the motion detection unit detects that the motion amount is outside a predetermined range.

[7] The signal processing device according to claim 5 or 6,

The delay detection unit

A resolution converter that converts the resolution of the first decoded image signal to the resolution of the second decoded image signal;

A first reference frame is extracted from a series of image frames constituting the first decoded image signal whose resolution has been converted by the resolution converter, and a first reference frame is extracted from the series of image frames constituting the second decoded image signal. The image extraction unit that extracts the two reference frames and the combination of the two reference frames that minimize the difference between the first and second reference frames are searched, and the time difference between the searched reference frames is calculated. A coincidence detection unit that calculates the delay amount based on:

A signal processing apparatus comprising:

[8] The signal processing device according to claim 5 or 6,

The delay detection unit

A first reference frame is extracted from a series of image frames constituting the first decoded image signal, and a second is extracted from the series of image frames constituting the second decoded image signal subjected to resolution conversion by the resolution converter. An image extraction unit that extracts a reference frame of the second frame, and a combination of two reference frames that minimizes a difference between the first and second reference frames, and based on a time difference between the searched reference frames. A coincidence detection unit for calculating the delay amount, A signal processing apparatus comprising:

[9] The signal processing device according to claim 7 or 8, wherein the image extraction unit extracts an image frame within a preset time window as the second reference frame, and the reference When the search for a combination of frames fails, the image extraction unit expands the time window and extracts the second reference frame.

[10] The signal processing device according to any one of claims 1 to 9, wherein the first digital broadcast is a digital broadcast for a fixed receiver, and the second digital broadcast is mobile. A signal processing device characterized by being a digital broadcast for the body.

[11] A digital broadcast receiver for receiving the first digital broadcast and the second digital broadcast transmitted by simulcast,

A reception circuit that supplies reception signals of the first and second digital broadcasts, and the signal processing device according to any one of claims 1 to 10,

A digital broadcast receiving apparatus comprising:

[12] A signal processing method for receiving a digital broadcast that processes both the received signals of the first digital broadcast and the second digital broadcast transmitted by simulcast,

(a) decoding a received signal of the first digital broadcast according to a first encoding standard to generate a first decoded image signal;

(b) decoding a received signal of the second digital broadcast according to a second encoding standard different from the first encoding standard to generate a second decoded image signal;

(c) a step of detecting an error in units of a pixel block composed of a predetermined number of pixels in the decoding process of step (a);

(d) When the error is not detected, the pixel block of the first decoded image signal is output, while when the error is detected, the pixel block in which the error is detected is replaced with the first block. Generating an output image signal by outputting a corresponding pixel block in the two decoded image signals;

A signal processing method comprising:

[13] A signal processing program for digital broadcast reception that causes the processor to process both the received signals of the first digital broadcast and the second digital broadcast transmitted by simulcast. And the process is

(a) a first decoding process for decoding a received signal of the first digital broadcast according to a first coding standard to generate a first decoded image signal;

(b) a second decoding process for decoding a received signal of the second digital broadcast according to a second encoding standard different from the first encoding standard to generate a second decoded image signal;

(c) an error detection process for detecting an error in a pixel block unit composed of a predetermined number of pixels in the process of the second decoding process;

(d) When the error is not detected, the pixel block of the first decoded image signal is output, while when the error is detected, the pixel block in which the error is detected is replaced with the first block. A signal output process for generating an output image signal by outputting a corresponding pixel block in the decoded image signal of 2.

A signal processing program comprising: