JP2005184457A - Method and apparatus for displaying video image - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for displaying a video image which minimizes the occurrence of an out-of-display period when a program video image is to be switched and displayed, and an apparatus for displaying the video image. <P>SOLUTION: It is assumed that time C0 to switch over a channel to a program B is reached while a program A is displayed. First, the appearance time C1' of the I picture of the program B appearing after the time C0 is predicted. The switchover of the received program is instructed to a tuner at a time C0' that tuner set time t1 is subtracted from the appearance time C1' so that the display is switched at the appearance time C1' of the I picture. Such processing enables the program A to be displayed continuously from the channel switchover time C0 until the actual switchover time C0' (time t2), thereby making the out-of-display period as short as possible. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a video display method and a video display apparatus applicable to a digital television broadcast receiver and the like.

In general, digital television broadcasting uses a digital data signal obtained by multiplexing a plurality of channels of video / audio data signals (MPEG signals) and digital data compressed by the Moving Picture Experts Group (MPEG) method. The digital television broadcast receiver receives this digital data signal with an antenna or the like, and demodulates the digital data signal with a predetermined modulation method such as QPSK (Quadrature Phase Shift Keying) or 16QAM (Quadrature Amplitude Modulation). Further, the digital television broadcast receiver separates video / audio data and digital data of a desired program from the multiplexed signal, decodes the video / audio data compressed by the MPEG method, Output to a monitor or speaker via an audio processing circuit.

As a channel selection method in such a digital television broadcast receiver, for example, techniques disclosed in Patent Documents 1 and 2 are known. In Patent Document 1, a channel selection period, a demodulation period, and a synchronization signal reproduction period at the time of channel change are detected, and a decoded image is displayed at the end of the channel switching period. Further, in Patent Document 2, the frame buffer is configured as a double buffer, and a video (still image) is displayed from the buffer before switching in the channel switching period.
JP-A-8-102894 JP 2002-51325 A

  As shown in FIG. 11, video data 100 compressed by the MPEG2 system is composed of a GOP (Group Of Picture) 104 in which a plurality of pictures are grouped. The GOP 104 includes three types of compressed frames: an I picture 101, a P picture 102, and a B picture 103. With such a configuration, even when a signal cannot be correctly received due to a transmission path failure or the like, it can be recovered in GOP units.

  The I picture 101 is an intra-frame encoded image and can be decoded alone. On the other hand, the P picture 102 and the B picture 103 are inter-frame encoded images (difference data), and it is necessary to refer to other frames for decoding. Since the I picture 101 exists only at the head of the GOP 104, the decoding process starts from the head of the GOP 104.

  Therefore, when channel switching is performed in order to change the program being viewed, the changed program video must be decoded after the appearance of the I picture 101. For example, in general BS digital broadcasting, since the GOP 104 is composed of 15 pictures, the displayed video is interrupted for a maximum of about 0.5 seconds.

  This discontinuity of video is particularly problematic in multi-screen display in which a screen is divided into a plurality of areas and a plurality of program videos are displayed.

  Consider a case where a multi-screen display is performed using a set of a tuner that receives a digital broadcast signal, a modem circuit that demodulates and decodes the received signal, and a decoding circuit. FIG. 12 shows an example of the display. In the example of FIG. 12, the program video is divided into four parts in the vertical and horizontal directions, and 16 program videos are displayed in total.

  In the multi-screen display process, first, the first channel is selected, and the video data obtained by decoding the signal of that channel is reduced to 1/16 and displayed in the corresponding display area. Then, after a lapse of a certain time, it switches to the next channel and displays the reduced image in the same manner. By repeating this process sequentially for 16 channels, program videos of a plurality of channels are displayed in a pseudo manner on one screen. In the example of FIG. 12, A → B → C → D → E → F → G → H → I → J → K → L → M → N → O → P → A → B → C → D →. In order, the channels are switched and displayed at regular time intervals (for example, every few seconds).

  FIG. 13 shows the channel switching timing for multi-screen display. For convenience of explanation, FIG. 13 shows switching of 3 screens / 3 programs, but the same applies to 16 screens. In this example, the channels are switched at time T0 intervals.

  First, the channel is switched from program A to program B at time C0. In order to switch channels, the frequency setting of the tuner is changed so as to receive a transponder including a program to be switched. If the time required for changing the tuner setting is time t1, MPEG video data of program B can be received from time C1. However, as described above, in order to decode MPEG2, it is necessary to wait for the appearance of an I picture. In this example, the I picture is detected for the first time after time t2 after the tuner setting is changed. That is, since there is no video data that can be displayed during the time t1 + t2, only the still image is displayed on all the divided screens during the multi-screen. Channel switching from program B to program C is performed at time C2 after time T0 from time C0. In this case, it takes time t1 required for tuner setting and time t4 until I picture is detected.

  As described above, in the multi-screen display, since the channel is frequently switched, there is a problem that the display impossible period occurs frequently, and the viewer is uncomfortable.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a video display method and a video display apparatus that prevent a display disabled period from being generated as much as possible when switching display of program video. There is.

In order to achieve the above object, a video display method according to the present invention includes:
A video display method for switching and displaying a program video including an intra-frame encoded image and an inter-frame encoded image,
A storage step of detecting an appearance timing of an intra-frame encoded image of each program video to be processed and storing appearance information indicating the appearance timing in a storage unit;
A reference step of referring to the appearance information of the second program video from the storage means when switching the display from the first program video to the second program video;
A switching step of switching the processing target from the first program video to the second program video so that the display is switched in accordance with the appearance timing of the intra-frame encoded image of the second program video based on the referenced appearance information; ,including.

Here, the reference step is
A step of referring to appearance information of a plurality of program videos that are candidates for switching;
Comparing the time until an intra-frame encoded image of each program video appears, and selecting a program video that can be switched in the shortest time as the second program video;
It is preferable to contain.

Moreover, the video display device according to the present invention includes:
A video display device capable of switching and displaying a program video including an intra-frame encoded image and an inter-frame encoded image,
Detecting means for detecting the appearance timing of an intra-frame encoded image of each program video to be processed;
Storage means for storing appearance information indicating the detected appearance timing;
Reference means for referring to the appearance information of the second program video from the storage means when switching the display from the first program video to the second program video;
Switching means for switching a processing target from the first program video to the second program video so that the display is switched in accordance with the appearance timing of the intra-frame encoded image of the second program video based on the referenced appearance information; .

Here, the reference means is
Refer to the appearance information of multiple program videos that are candidates for switching,
It is preferable to compare the time until an intra-frame encoded image of each program video appears and select a program video that can be switched in the shortest time as the second program video.

  According to the present invention, since the process of switching the program video is performed in accordance with the appearance timing of the intra-frame encoded image, it is possible to prevent the display disabled period from being generated as much as possible.

  Exemplary embodiments of the present invention will be described in detail below with reference to the drawings.

(First embodiment)
FIG. 1 shows a configuration of a video display apparatus according to an embodiment of the present invention. This video display device is a digital television broadcast receiver having a function of receiving digital television broadcasts.

  The video display device includes an antenna 1, a tuner 2, a DEMUX circuit (demultiplexer) 3, an audio decoder 4, an audio processing circuit 5, a speaker 6, a video decoder 7, an image processing circuit 8, a video processing circuit 9, a monitor 10, and device control. Unit 11, a free-run counter 12, a RAM (Random Access Memory) 13, a ROM (Read Only Memory) 14, and the like.

  The antenna 1 is a receiving antenna that receives a digital television broadcast signal transmitted from a satellite. The antenna 1 is generally provided with a frequency converter, and receives the frequency-converted signal to the tuner 2.

  The tuner 2 extracts a signal of a specific frequency from the high frequency digital modulation signal including video / audio data. That is, the tuner 2 performs a process of selecting one from a plurality of transponders of a digital television broadcast signal. Further, the tuner 2 includes a deinterleave circuit, an error correction circuit, and the like, thereby demodulating the selected digital modulation signal and outputting a transport stream.

  The DEMUX circuit 3 separates the transport stream received from the tuner 2 into MPEG2 video transport packets, audio transport packets, and PSI (Program Specific Information). The DEMUX circuit 3 supplies the video transport packet and the audio transport packet to the video decoder 7 and the audio decoder 4, respectively, and supplies service information included in the PSI to the device control unit 11.

As described above, a plurality of channels are multiplexed in the transport stream, and the process for selecting an arbitrary channel from among the channels is multiplexed with which packet ID the desired channel is in the transport stream. This is possible by taking out data such as whether or not it has been done from the PSI. Furthermore, selection of a transport stream (selection of a transponder) can also be performed based on PSI information.

  The video decoder 7 decodes video transport packets. The video decoder 7 obtains a quantization coefficient and a motion vector by decoding the input variable length code, and performs motion compensation control based on the inverse DCT transform and the motion vector. The video data generated by the video decoder 7 is output to the image processing circuit 8.

  The frame buffer of the image processing circuit 8 holds video data of other channels that have already undergone video decoding processing. The image processing circuit 8 combines the video data input from the video decoder 7 with the video data held in the frame buffer, and generates video data for multi-screen display. The video data for multi-screen display is output to the video processing circuit 9.

  The audio decoder 4 decodes the audio transport packet. The audio decoder 4 decodes the input encoded signal and generates audio data. The audio data generated by the audio decoder 4 is output to the audio processing circuit 5.

  The video processing circuit 9 receives the video data from the image processing circuit 8, performs D / A conversion, and converts it into, for example, a composite signal in the NTSC format. The video processing circuit 9 includes an output resistor, an amplifier, and the like. The NTSC composite signal output from the video processing circuit 9 is output to the monitor 10 through a video output terminal (not shown). As a result, an image is displayed on the monitor 10.

  On the other hand, the audio processing circuit 5 receives the audio data output from the audio decoder 4, performs D / A conversion, and generates a right (R) sound analog signal and a left (L) sound analog signal. The audio processing circuit 5 includes an output resistor, an amplifier, and the like. The sound analog signal output from the sound processing circuit 5 is output to the speaker 6 through the left and right sound output terminals (not shown). As a result, sound is output from the speaker 6.

  The device control unit 11 controls the operation of the entire digital television broadcast receiver and is constituted by a microcomputer. A RAM 13 and a ROM 14 are connected to the device control unit 11.

  The ROM 14 stores a control program for the digital broadcast receiver of this embodiment. The program video switching control in the multi-screen display executed by the device control unit 11 is performed based on the program stored in the ROM 14.

  The RAM 13 is used as a program memory into which a program stored in the ROM 14 is loaded when the digital television broadcast receiver is turned on. The RAM 13 is also used as a storage area for a program buffer, a variable storage area for program control, a channel switching control table 701 shown in FIG. The free-run counter 12 is used to measure the timing for switching programs.

  Next, a video display method (program video switching control) in the video display device having the above configuration will be described.

  FIG. 2 shows the channel switching timing in this embodiment.

  In FIG. 2, it is assumed that the channel switching time C0 to the program B has arrived while the program A is being displayed. At this time, if the program B is immediately switched to the program B, the program B can be received from the time C1, but in this case, the non-displayable period occurs as described above.

  Therefore, in the present embodiment, first, the appearance time C1 ′ of the I picture of the program B that appears after the time C0 is predicted. Then, the processing target is switched from program A to program B so that the display is switched in accordance with the appearance time C1 ′ of the I picture. Specifically, since the tuner setting time t1 is required to change the setting of the tuner 2, the received program is switched to the tuner 2 at the time C0 ′ obtained by subtracting the tuner setting time t1 from the appearance time C1 ′. Order. By such processing, the program A continues to be displayed as it is between the channel switching time C0 and the actual switching time C0 ′ (time t2), and the non-displayable period is shortened as much as possible (about the tuner setting time t1). Be possible).

  Switching from program B to program C is performed in the same manner. That is, even if the channel switching time C2 comes during the display of the program B, the program is switched after waiting until the time C2 ′ obtained by subtracting the tuner set time t1 from the next appearance time C3 ′ of the I picture of the program C. As a result, the program B continues to be displayed between the time C2 and the time C2 ′ (time t4), and the non-displayable period can be shortened to the tuner setting time t1.

  The prediction of the appearance time of an I picture can be performed as follows, for example. First, in multi-screen display, channels are switched at regular time intervals, and program videos to be processed for multi-screen display are displayed in order. At this time, the appearance timing of the I picture in each program video (for example, the appearance tendency of the I picture (GOP picture structure) and the appearance time of the last I picture) is detected, and the appearance information indicating the appearance timing is stored in the RAM 13. And so on. If channel switching is completed and the channel returns to the first channel again, thereafter, the appearance time of the I picture can be predicted by referring to the appearance information stored in the storage means.

Specifically, when switching the display from program A to program B, the appearance information of program B is referred to from the storage means. Then, an integer N satisfying Equation 1 is calculated from “the last I picture appearance time B1” and “I picture interval Bd” included in the appearance information and “the current time (= channel switching time) C0”. .

| Bl + Bd × N−C0 | <Bd Equation 1

Next, the appearance time C1 ′ of the I picture is calculated from Equation 2 using the calculated integer N.

C1 ′ = Bl + Bd × N Equation 2

  When switching to the same channel in a relatively short cycle as in the multi-screen display, there is a low possibility that a scene change or the like will occur between the previous display and the next display. Therefore, the appearance time of the I picture can be predicted with high accuracy by referring to the appearance information in the previous display. The video display method of this embodiment uses this principle. Note that, when a shift occurs in the appearance time of an I picture due to a scene change or the like, the appearance tendency and the appearance time are corrected and stored.

With reference to FIGS. 3 to 7, the flow of processing of the video display method of this embodiment will be described in detail. FIG. 3 is a flowchart illustrating the video display method according to the present embodiment. FIG. 4 shows an example of variables used in the program, and FIG. 5 shows an example of a channel switching control table. FIG. 6 shows a frame buffer for synthesizing a multi-screen composed of 16 programs. FIG. 7 is a diagram for explaining a method of reducing an image by resolution conversion.

  In step 601, variables used in the program (FIG. 4), channel switching control table 701 (FIG. 5), and frame buffer 710 (FIG. 6) are initialized.

Of the program variables, a variable cTime 734 is set with a time interval (for example, several seconds) for switching channels. This value is a predetermined constant and corresponds to the value of the free-run counter 12. The variable current 730 indicating the program currently being processed (the program being displayed) takes values from “0” to “15”, and these values correspond to the programs A to P. To do. As an initial value, a value “0” representing the program A is set.

The channel switching control table 701 stores program video information corresponding to each of the 16 divided screens. The program video information includes a transponder ID (TSID) 702, a frequency (Fr) 703, a video transport packet ID (VPID) 704, an audio transport packet ID (APID) 705, an I picture appearance time (iTime) 706, and an I picture. An interval 707 is included.

  The transponder ID 702 and the frequency 703 are values set in the tuner 2. Based on such information, the tuner 2 selects one transponder from a digital television broadcast signal including a plurality of transponders. Corresponding to the programs A to P, values of TSID_A to TSID_P are set in the transponder ID 702, and values of Fr_A to Fr_P are set in the frequency 703.

  The video transport packet ID 704 and the audio transport packet ID 705 are IDs for extracting the video transport packet and the audio transport packet corresponding to the program from the transport stream. Corresponding to the programs A to P, the values of VPID_A to VPID_P are set in the video transport packet ID 704, and the values of APID_A to APID_P are set in the audio transport packet ID 705.

  The values of the transponder ID 702, the frequency 703, the video transport packet ID 704, and the audio transport packet 705 can be known by analyzing the aforementioned PSI.

  The I picture appearance time 706 is a variable for storing the time (value of the free-run counter 12) when the I picture of the program video is detected. In step 601, a value “−1” indicating that an I picture has not been detected yet is set as an initial value.

  The I picture interval 707 is a variable for storing a time interval (difference value of the free-run counter 12) between the I picture and the next I picture. In step 601, a value “−1” indicating that an I picture has not been detected yet is set as an initial value.

  In step 601, program areas 711 to 726 of the frame buffer 710 for synthesizing 16 programs are cleared.

  When the initialization is completed, the process proceeds to step 602.

In step 602, the tuner 2 is set. The transponder ID 702 and the frequency 703 are read from the channel switching control table 701 according to the value of the variable current 730 and set in the tuner 2.

  Since the channel switching is set, the free-run counter 12 is read to store the switching time, and the value is stored in the variable sTime 732.

  After a while after setting a desired transponder frequency in the tuner 2, an analog RF circuit (not shown) in the tuner 2 is stabilized and ready to receive. When a digital demodulation circuit (not shown) in the tuner 2 detects that the RF circuit is in a stable state, it generates a lock signal.

In step 603, it is determined whether or not the setting is completed by waiting for detection of the lock signal. Before the value is set in the tuner 2 and when the lock signal is detected, the free run counter 12 is read and the difference is taken to know the time required for changing the setting of the tuner 2 (tuner setting time t1). This tuner setting time t1 is a variable rTime7.
31 is stored.

Since the display has not yet started, the variable status 733 indicating the status is set to a value “0” indicating that the status is not displayed. Since the tuner 2 is set and the channel is set or switched, the value “−1” is set to the I picture appearance time 706 of the program corresponding to the variable current 730.

  In step 604, the digital television broadcast signal is received by the antenna 1.

  Step 605 is processing of the tuner 2. The tuner 2 down-converts the received signal received in step 604 to a signal of a predetermined frequency, performs QPSK demodulation of the signal selected according to the transponder ID 702, and performs error correction.

In step 606, the DEMUX circuit 3 reads the values of the video transport packet ID 704 and the audio transport packet ID 705 of the program corresponding to the variable current 730 from the channel switching control table 701. Then, a video transport stream and an audio transport stream are extracted according to these values.

  In step 607, the video transport stream and the audio transport stream extracted in step 605 are converted into video and audio elementary streams.

  The picture header of the video elementary stream includes a picture coding type indicating the type of picture. In step 608, it is determined whether the picture is an I picture with reference to the picture coding type. If it is an I picture, the process proceeds to step 610. If it is not an I picture, the process proceeds to step 609.

  In step 609, the variable status 733 is checked to determine whether it is currently displayed. If it is not being displayed, it is waiting for detection of an I picture, so the process returns to step 604, and if it is being displayed, the process proceeds to step 612.

  In step 610, a value “1” indicating that the program video is being displayed is set in the variable status 733.

In step 611, in response to the detection of the I picture in step 608, the I picture appearance time 706 and the I picture interval 707 are stored in the channel switching control table 701. Specifically, the value of the free run counter 12 is read and temporarily stored,
The value of the I picture appearance time 706 of the program corresponding to the variable current 730 is read from the channel switching control table 701. When the value of the I picture appearance time 706 is “−1”, it means that the I picture is detected for the first time after setting the tuner, so the I picture interval 707 is not set. When the value of the I picture appearance time 706 is not “−1”, a difference value obtained by subtracting the value of the I picture appearance time 706 from the stored value of the free run counter 12 is stored in the I picture interval 707. . The stored value of the free-run counter 12 is stored in the I picture appearance time 706 regardless of the value of the I picture appearance time 706.

  In steps 612 to 614, video data processing is executed in parallel, and in steps 615 to 616, audio data processing is executed in parallel.

  In step 612, video decoding is performed by performing Huffman decoding, inverse quantization, and IDCT processing. In multi-screen display, it is necessary to divide the screen and perform reduced display. Since the reduction method is generally a method of deleting high frequency components by IDCT processing, this method is also adopted in this embodiment.

  FIG. 7 schematically shows a method for reducing an image by resolution conversion. The MPEG2 video stream is composed of 8 × 8 pixels called macroblocks, and an image is formed by a set of macroblocks. In FIG. 7, a macro block 424 is an enlarged view of one macro block 423 of an image 421. When only the 2 × 2 pixel 425 at the upper left of the low-frequency part of the macroblock 424 is IDCT-processed, a decoded image reduced to ¼ vertical and ¼ horizontal can be obtained. By performing this process for all macroblocks, a 1/16 reduced image 422 can be obtained.

  In step 613, the image processing circuit 8 writes the reduced image 422 into the corresponding program areas 711 to 726 of the frame buffer 710 and performs composition processing. Data in the frame buffer 710 is output to the video processing circuit 9.

  In step 614, the video processing circuit 9 performs D / A conversion on the received data and converts it into a composite signal in the NTSC format. This video signal is output to the monitor 10 through a video output terminal (not shown).

  In step 615, audio decoding is performed. The audio decoder 4 checks the sample frequency and layer from the header information of the audio elementary stream, and decodes the audio elementary stream into audio data based on the scale factor and the sample. This audio data is output to the audio processing circuit 5.

  In step 616, the audio processing circuit 5 performs D / A conversion on the audio data received from the audio decoder 4 to generate a right (R) sound analog signal and a left (L) sound analog signal. The sound analog signal output from the sound processing circuit 5 is output as sound to the speaker 6 through left and right sound output terminals (not shown).

  In step 617, the free run counter 12 is read to know the current time. The value obtained by adding the channel switching interval cTime 734 to the channel switching time sTime 732 is compared with the current time. If the current time is smaller, the switching time has not yet been reached, and the process returns to step 604. When equal or larger, it indicates that the switching time is reached. The program to be switched next is obtained by adding “1” to the value of the variable current 730. However, if the value of the variable current 730 is “15”, the value is set to “0” in order to return to the program A.

If it is the switching time, the channel switching control table 701 shows the I of the next program.
The values of the I picture appearance time 706 and the I picture interval 707, which are picture appearance information, are read. Then, it is examined whether or not those values satisfy the following formula 3. However, all values are converted into values of the free-run counter 12.

iTime + interval-rTime-current time <1/30 seconds ... Equation 3

If Equation 3 is satisfied, the process proceeds to Step 618. In step 618, the variable current73 is set.
The value of 0 is updated to the value of the next program obtained in step 617, and the processing target is switched to the next program. Then, the process returns to step 602 and steps 602 to 618 are repeated. Thereby, the display is switched according to the appearance time of the I picture of the next program.

  On the other hand, if Expression 3 is not satisfied, an I picture does not appear within one frame even if switching is performed, and the process returns to step 604 without switching the processing target. In this case, the current program is continuously displayed.

  As described above, according to the present embodiment, the process of switching the program video in accordance with the appearance timing of the I picture that is the intra-frame encoded image is executed, so that it is possible to prevent the non-displayable period from being generated as much as possible.

(Second Embodiment)
In the first embodiment, programs are switched in the order of A → B → C → D → E →... → O → P → A →. However, when switching to the next program, the appearance of an I picture is predicted, and switching is performed after that time, so that the display time for each program may not be constant.

  Therefore, in this embodiment, the appearance information of a plurality of programs that are candidates for switching is referred to, and the time until the I picture of each program appears is compared, and the program that can be switched in the shortest time is selected as the switching destination. To. As a result, when the channel switching time arrives, the program can be switched to the optimum program (which can be switched in the shortest time), so that the display time for each program can be made constant to some extent. However, the display order changes.

  FIG. 8 shows the channel switching timing in this embodiment.

  In FIG. 8, it is assumed that the channel switching time C0 arrives while the program A is being displayed. At this time, the tuner set time t1 is added to the time C0 to calculate the reference time, and the I picture appearance times after the reference time are predicted for all the programs to be switched using the above-described equations 1 and 2. . Then, the time from the reference time to the I picture appearance time is compared, and the program with the shortest time is selected as the switching destination.

  In the example of FIG. 8, program B is time t10, program C is time t11, and when both are compared, time t11 is smaller. Therefore, the program A is switched to the program C. Also in this case, as in the first embodiment, instead of immediately switching to the time C0, switching is performed to the time C0 + t11 to shorten the display disabled period as much as possible.

When the time T0 further elapses and the channel switching time C6 comes again, similarly, the switching destination program is selected based on the reference time obtained by adding the tuner setting time t1 to the time C6. However, the programs whose display has already been updated (program A and program C in the example of FIG. 8) are excluded from the switching targets at this time. In other words, in order to prevent a situation in which only a specific program is switched under a certain condition and a program that hardly switches is generated, the same program is not switched until the update of all programs is completed.

  For example, in the example of FIG. 8, the I picture of program A appears immediately after time t1 from time C6, and the I picture of program B does not appear unless waiting for time t12, but program A has already updated its display. Therefore, switching to program B is performed. In this case as well, switching is performed not at time C6 but at time C6 + t12.

  With reference to FIG. 9 and FIG. 10, the flow of processing of the video display method of this embodiment will be described in detail. FIG. 9 is a diagram showing a flowchart of the video display method of the present embodiment. FIG. 10 shows an example of the channel switching control table. In this embodiment, the same program variables (FIG. 4) as those in the first embodiment are used.

  In step 801, variables used in the program (FIG. 4), channel switching control table 751 (FIG. 10), and frame buffer 710 (FIG. 6) are initialized.

Of the program variables, a variable cTime 734 is set with a time interval (for example, several seconds) for switching channels. This value is a predetermined constant and corresponds to the value of the free-run counter 12. The variable current 730 indicating the program currently being processed (the program being displayed) takes values from “0” to “15”, and these values correspond to the programs A to P. To do. As an initial value, a value “0” representing the program A is set.

The channel switching control table 751 stores program video information corresponding to each of the 16 divided screens. The program video information includes a transponder ID (TSID) 752, a frequency (Fr) 753, a video transport packet ID (VPID) 754, an audio transport packet ID (APID) 755, an I picture appearance time (iTime) 756, and an I picture. An interval 757 and a determination flag 758 are included.

  The transponder ID 752 and the frequency 753 are values set in the tuner 2. Based on such information, the tuner 2 selects one transponder from a digital television broadcast signal including a plurality of transponders. Corresponding to the programs A to P, the values of TSID_A to TSID_P are set in the transponder ID 752, and the values of Fr_A to Fr_P are set in the frequency 753.

  The video transport packet ID 754 and the audio transport packet ID 755 are IDs for extracting the video transport packet and the audio transport packet corresponding to the program from the transport stream. Corresponding to the programs A to P, values of VPID_A to VPID_P are set in the video transport packet ID 754, and values of APID_A to APID_P are set in the audio transport packet ID 755.

  The values of the transponder ID 752, the frequency 753, the video transport packet ID 754, and the audio transport packet 755 can be known by analyzing the aforementioned PSI.

  The I picture appearance time 756 is a variable for storing the time (value of the free-run counter 12) when the I picture of the program video is detected. In step 801, a value “−1” indicating that an I picture has not yet been detected is set as an initial value.

  The I picture interval 757 is a variable for storing a time interval (difference value of the free-run counter 12) between the I picture and the next I picture. In step 801, a value “−1” indicating that an I picture has not yet been detected is set as an initial value.

  The determination flag 758 is a flag for determining whether the display update has been completed. In step 801, a value “0” is set as an initial value.

  In step 801, the program areas 711 to 726 of the frame buffer 710 for synthesizing 16 programs are cleared.

  When the initialization is completed, the process proceeds to step 802.

In step 802, the tuner 2 is set. The transponder ID 752 and the frequency 753 are read from the channel switching control table 751 according to the value of the variable current 730 and set in the tuner 2.

  Since the channel switching is set, the free-run counter 12 is read to store the switching time, and the value is stored in the variable sTime 732.

  After a while after setting a desired transponder frequency in the tuner 2, an analog RF circuit (not shown) in the tuner 2 is stabilized and ready to receive. When a digital demodulation circuit (not shown) in the tuner 2 detects that the RF circuit is in a stable state, it generates a lock signal.

In step 803, it is determined whether the setting is completed by waiting for detection of the lock signal. Before the value is set in the tuner 2 and when the lock signal is detected, the free run counter 12 is read and the difference is taken to know the time required for changing the setting of the tuner 2 (tuner setting time t1). This tuner setting time t1 is a variable rTime7.
31 is stored.

Since the display has not yet started, the variable status 733 indicating the status is set to a value “0” indicating that the status is not displayed. Since the tuner 2 is set and the channel is set or switched, the value “−1” is set to the I picture appearance time 756 of the program corresponding to the variable current 730.

  In step 804, the digital television broadcast signal is received by the antenna 1.

  Step 805 is processing of the tuner 2. The tuner 2 down-converts the received signal received in step 804 to a signal having a predetermined frequency, performs QPSK demodulation of the signal selected according to the transponder ID 752, and performs error correction.

In step 806, the DEMUX circuit 3 reads the values of the video transport packet ID 754 and audio transport packet ID 755 of the program corresponding to the variable current 730 from the channel switching control table 751. Then, a video transport stream and an audio transport stream are extracted according to these values.

  In step 807, the video transport stream and audio transport stream extracted in step 805 are converted into video and audio elementary streams.

  The picture header of the video elementary stream includes a picture coding type indicating the type of picture. In step 808, it is determined whether the picture is an I picture with reference to the picture coding type. If it is an I picture, the process proceeds to step 810. If it is not an I picture, the process proceeds to step 809.

  In step 809, the variable status 733 is checked to determine whether it is currently being displayed. If it is not being displayed, it is waiting for detection of an I picture, so the process returns to step 804, and if it is being displayed, the process proceeds to step 812.

  In step 810, a value “1” indicating that the program video is being displayed is set in the variable status 733.

In step 811, in response to the detection of the I picture in step 808, the I picture appearance time 756 and the I picture interval 757 are stored in the channel switching control table 751. Specifically, the value of the free run counter 12 is read and temporarily stored, and the value of the I picture appearance time 756 of the program corresponding to the variable current 730 is read from the channel switching control table 751. When the value of the I picture appearance time 756 is “−1”, it means that the I picture is detected for the first time after setting the tuner, so the I picture interval 757 is not set. If the value of the I picture appearance time 756 is not “−1”, a difference value obtained by subtracting the value of the I picture appearance time 756 from the stored value of the free run counter 12 is stored in the I picture interval 757. . Then, regardless of the value of the I picture appearance time 756, the stored value of the free run counter 12 is stored in the I picture appearance time 756.

  In steps 812 to 814, video data processing is executed in parallel, and in steps 815 to 816, audio data processing is executed in parallel.

  In step 812, video decoding is performed by performing Huffman decoding, inverse quantization, and IDCT processing. Also in this embodiment, since it is necessary to divide the screen and display it in a reduced manner, the high-frequency component is deleted by IDCT processing to reduce the image as in the first embodiment. In step 813, the image processing circuit 8 writes the reduced image into the corresponding program areas 711 to 726 of the frame buffer 710 and performs a composition process. Data in the frame buffer 710 is output to the video processing circuit 9.

  In step 814, the video processing circuit 9 performs D / A conversion on the received data and converts it into a composite signal in the NTSC format. This video signal is output to the monitor 10 through a video output terminal (not shown).

  In step 815, audio decoding is performed. The audio decoder 4 checks the sample frequency and layer from the header information of the audio elementary stream, and decodes the audio elementary stream into audio data based on the scale factor and the sample. This audio data is output to the audio processing circuit 5.

  In step 816, the audio processing circuit 5 performs D / A conversion on the audio data received from the audio decoder 4 to generate a right (R) sound analog signal and a left (L) sound analog signal. The sound analog signal output from the sound processing circuit 5 is output as sound to the speaker 6 through left and right sound output terminals (not shown).

  In step 817, the free run counter 12 is read to know the current time. A value obtained by adding the channel switching interval cTime 734 to the channel switching time sTime 732 is compared with the current time. If the current time is smaller, the switching time has not yet been reached, and the process returns to step 804. If they are equal or larger, it indicates that it is the switching time, and the process proceeds to step 818 to select the program to be switched next.

In step 818, the value of the determination flag 758 of each program (excluding the currently displayed program) in the channel switching control table 751 is checked. When the value of the determination flag 758 is “0”, it indicates that the display has not been updated, and when it is “1”, it indicates that the display has been updated. Here, programs whose determination flag 758 value is “0” are selected as switching candidates, and the I picture appearance time 756 and I picture interval 757 values of those programs are read from the channel switching control table 751.

Then, a value T of the following formula 4 is calculated for each program as a candidate for switching. This value T represents the waiting time until the first I picture appears from the current time. In the calculation of Expression 4, the value of the integer N is sequentially increased from 1, and the value when the right side is changed to a positive value is adopted as the appearance waiting time T. However, all values are converted into values of the free-run counter 12.

T = iTime + interval × N−rTime−current time (Formula 4)

  When the appearance waiting time T is obtained for each switching candidate program whose value of the determination flag 758 is “0”, the process proceeds to step 819. In step 819, the appearance waiting time T of each program is compared, and the smallest one is selected.

  If the appearance waiting time T of the selected program is longer than 1/30 second, an I picture does not appear within one frame even if switching is performed, and the process returns to step 804 without switching the processing target. In this case, the current program is continuously displayed.

  When the appearance waiting time T of the selected program is within 1/30 seconds, the processing target is switched to that program. When there are a plurality of programs having the same appearance waiting time T, the upper one in the channel switching control table 751, that is, the one on the upper side and the left side in the screen division position is selected. .

In step 820, a value representing the selected program is set in a variable current 730, and a determination flag 758 for the program is set to “1”. After that, it is checked whether the display update has been completed, that is, whether the determination flags 758 of all programs are “1”. If all the determination flags are “1”, the flags 758 of all programs are set to “0”. To "". And it returns to step 802 and repeats steps 802-820. Thereby, the display is switched according to the appearance time of the I picture of the next program.

  As described above, according to the present embodiment, the process of switching the program video in accordance with the appearance timing of the I picture that is the intra-frame encoded image is executed, so that it is possible to prevent the non-displayable period from being generated as much as possible.

  In the present embodiment, a program that can be switched in the shortest time is selected as a switching destination from among a plurality of programs that are candidates for switching, so that when the channel switching time arrives, the optimum (with the shortest time) The display time of each program can be made constant to some extent.

It is a figure which shows the structure of the video display apparatus which concerns on embodiment of this invention. It is a figure which shows the channel switching timing in 1st Embodiment. It is a figure which shows the flowchart of the video display method of 1st Embodiment. It is a figure which shows an example of the variable used by a program. It is a figure which shows an example of the channel switching control table of 1st Embodiment. It is a figure which shows the frame buffer for synthesize | combining the multiscreen which consists of 16 programs. It is a figure for demonstrating the reduction method of the image by resolution conversion. It is a figure which shows the channel switching timing in 2nd Embodiment. It is a figure which shows the flowchart of the video display method of 2nd Embodiment. It is a figure which shows an example of the channel switching control table of 2nd Embodiment. It is a figure which shows the structure of the digital image data of an MPEG system. It is a figure which shows the example of a display of a multiscreen display. It is a figure which shows the conventional channel switching timing.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Antenna 2 Tuner 3 DEMUX circuit 4 Audio decoder 5 Audio processing circuit 6 Speaker 7 Video decoder 8 Image processing circuit 9 Video processing circuit 10 Monitor 11 Equipment control part 12 Free run counter 13 RAM
14 ROM
100 Video data 101 I picture 102 P picture 103 B picture 104 GOP
421 image 422 image reduced to 1/16 (reduced image)
423 Macroblock 424 Enlarged macroblock 425 Pixel of low frequency part of macroblock 701 Channel switching control table 702 Transponder ID
703 Frequency 704 Video transport packet ID
705 Audio transport packet ID
706 I picture appearance time 707 I picture interval 710 Frame buffer 711 to 721 Program area 730 Variable indicating the program being displayed current
731 Variable rTime indicating tuner setting time
732 Variable sTime indicating channel switching time
733 Status variable
734 Variable cTime indicating channel switching interval
751 Channel switching control table 752 Transponder ID
753 Frequency 754 Video transport packet ID
755 Audio transport packet 756 I picture appearance time 757 I picture interval 758 Judgment flag

Claims (4)

A video display method for switching and displaying a program video including an intra-frame encoded image and an inter-frame encoded image,
A storage step of detecting an appearance timing of an intra-frame encoded image of each program video to be processed and storing appearance information indicating the appearance timing in a storage unit;
A reference step of referring to the appearance information of the second program video from the storage means when switching the display from the first program video to the second program video;
A switching step of switching the processing target from the first program video to the second program video so that the display is switched in accordance with the appearance timing of the intra-frame encoded image of the second program video based on the referenced appearance information; ,
A video display method comprising: The reference step includes
A step of referring to appearance information of a plurality of program videos that are candidates for switching;
Comparing the time until an intra-frame encoded image of each program video appears, and selecting a program video that can be switched in the shortest time as the second program video;
The video display method according to claim 1, further comprising: A video display device capable of switching and displaying a program video including an intra-frame encoded image and an inter-frame encoded image,
Detecting means for detecting the appearance timing of an intra-frame encoded image of each program video to be processed;
Storage means for storing appearance information indicating the detected appearance timing;
Reference means for referring to the appearance information of the second program video from the storage means when switching the display from the first program video to the second program video;
Switching means for switching a processing target from the first program video to the second program video so that the display is switched in accordance with the appearance timing of the intra-frame encoded image of the second program video based on the referenced appearance information; ,
A video display device comprising: The reference means includes
Refer to the appearance information of multiple program videos that are candidates for switching,
4. The video display according to claim 3, wherein the time until the intra-frame encoded image of each program video appears is compared, and the program video that can be switched in the shortest time is selected as the second program video. apparatus.

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