JPWO2006057394A1 - はんだバンプの形成方法及び装置 - Google Patents

はんだバンプの形成方法及び装置 Download PDF

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Publication number
JPWO2006057394A1
JPWO2006057394A1 JP2006547921A JP2006547921A JPWO2006057394A1 JP WO2006057394 A1 JPWO2006057394 A1 JP WO2006057394A1 JP 2006547921 A JP2006547921 A JP 2006547921A JP 2006547921 A JP2006547921 A JP 2006547921A JP WO2006057394 A1 JPWO2006057394 A1 JP WO2006057394A1
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Prior art keywords
solder
fine particles
forming
inert gas
substrate
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English (en)
Japanese (ja)
Inventor
小野崎　純一
純一 小野崎
坂本　伊佐雄
伊佐雄 坂本
大 白井
大 白井
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Tamura Corp
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Tamura Corp
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
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  • Engineering & Computer Science (AREA)
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  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
JP2006547921A 2004-11-29 2005-11-29 はんだバンプの形成方法及び装置 Withdrawn JPWO2006057394A1 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004343471 2004-11-29
JP2004343471 2004-11-29
PCT/JP2005/021833 WO2006057394A1 (ja) 2004-11-29 2005-11-29 はんだバンプの形成方法及び装置

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JPWO2006057394A1 true JPWO2006057394A1 (ja) 2008-08-07

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JP2006547921A Withdrawn JPWO2006057394A1 (ja) 2004-11-29 2005-11-29 はんだバンプの形成方法及び装置

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CN (1) CN101124669A (zh)
WO (1) WO2006057394A1 (zh)

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Publication number Priority date Publication date Assignee Title
JP5573792B2 (ja) * 2011-07-25 2014-08-20 Ｔｄｋ株式会社 はんだバンプ形成方法

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JP2002076043A (ja) * 2000-08-28 2002-03-15 Mitsubishi Electric Corp バンプ形成方法、半導体装置、およびバンプ形成装置

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CN101124669A (zh) 2008-02-13

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