JPWO2005099057A1 - Nitride semiconductor light emitting device wafer, manufacturing method thereof, and nitride semiconductor light emitting device obtained from the wafer - Google Patents

Abstract

Provided are a nitride semiconductor light emitting device formed on a crystal substrate such as a GaN substrate, an Al2O3 substrate, a ZrB2 substrate, etc., having a device yield of 80% or more and high reliability, and a device wafer thereof. The present invention relates to a nitride semiconductor light emitting device wafer in which the wafer thickness is reduced by polishing the back surface of the substrate using at least chemical mechanical polishing, and the wafer thickness d and the substrate surface in a direction perpendicular to the substrate surface The curvature radius R of the warp is characterized in that the curvature radius R is 0.5 m or more and the wafer thickness is 145 μm or less, or the thickness of the strained strain layer by chemical mechanical polishing on the back surface of the substrate is 5 μm or less. This is a nitride semiconductor light emitting device wafer.

Description

  The present invention relates to a nitride semiconductor light emitting device wafer applied to a blue laser light source used for an optical disk or the like, a method for manufacturing the same, and a nitride semiconductor light emitting device obtained from the nitride semiconductor light emitting device wafer.

  Semiconductor light-emitting elements and semiconductor laser diodes (LD) that output blue light are attracting attention as light sources for optical display and next-generation optical disks. These blue semiconductor light emitting devices are mainly formed on a sapphire substrate by laminating materials such as GaN, InGaN, and AlGaN by an epitaxial crystal growth technique. On the other hand, with the recent development of technology, a blue semiconductor laser formed on a GaN substrate has been reported. For example, in September 2001, Applied Physics Letters, Vol. 79, pages 1948 to 1950, there is a report entitled “Characteristics of InGaN laser diode in the pure blue region”. It is reported that a blue semiconductor laser formed on a 150 μm thick GaN substrate operated with an estimated lifetime of 3000 hours with an optical output of 5 mW at an environmental temperature of 50 ° C.

The substrate used here is an ELO (Epitaxial Lateral Overgrowth) GaN substrate having a thickness of 165 μm. In the above literature, the GaN substrate of ELO is a low-temperature growth of 2.5 μm-thick GaN on a sapphire substrate, a 12 μm-wide SiO ₂ mask (0.1 μm thickness) is applied to the surface in a cycle of 20 μm, and further 15 μm-thick A 200 μm thick GaN thick film is formed by hydride vapor deposition on an ELO substrate formed by MOVPE (metal organic chemical vapor deposition) growth, and then the sapphire substrate is removed to obtain a 150 μm thick GaN thick film. Further, an GaN substrate of ELO having a thickness of 165 μm is formed by applying a SiO ₂ mask having a width of 8 μm at a period of 20 μm thereon to form GaN having a thickness of 15 μm by MOVPE growth.

FIG. 1 is a cross-sectional view of the nitride semiconductor laser disclosed in the above document. The nitride semiconductor laser of the above document includes an n-electrode 101, an n-type ELO-GaN substrate 102 having a layer thickness of 165 μm, an n-Al _0.05 Ga _0.95 N clad layer 103 having a thickness of 5 μm, and an n-layer having a thickness of 100 nm. In _0.1 Ga _0.9 N layer 104, Al _0.1 Ga _0.9 N (2.5 nm) / n-GaN (2.5 nm) period n-type modulation doped superlattice cladding with a total thickness of 1 μm Layer 105, In _x Ga _1-x N / In _0.05 Ga _0.95 N (40 nm) active layer 106, 10 nm thick p-Al _0.3 Ga _0.7 N current overflow prevention layer 107, 150 nm thick GaN layer 108, Al _0.1 Ga _0.9 N (2.5 nm) / p-GaN (2.5 nm) period ridge type p-type modulation doped superlattice with a total thickness of 0.5 μm Clad layer 109, 15 nm thick SiO ₂ current confinement mask 111 of the p-GaN contact layer 110,300nm thickness, p electrode 112, made of. The total thickness of the AlGaN cladding layer is extremely thick at 6.5 μm. The ridge width is 2.5 μm, the resonator is cleaved, and the resonator length is 675 μm.

  In order to remove the sapphire substrate, there is a method of melting GaN at the interface by laser irradiation in addition to the method by etching. In the manufacturing method using a GaN substrate of ELO, a high device lifetime is obtained by forming a region having a low dislocation density in the substrate and forming a device thereon. Crystal growth of the LD portion is performed by the MOVPE method. Mg (magnesium) is used for the p dopant, and Si (silicon) is used for the n dopant. The ridge-type p-cladding layer 109 for confining light in the stripe direction is formed by dry etching. In the case of a blue LD, a typical stripe width is 1.8 μm to 2.6 μm in order to obtain a basic transverse mode oscillation.

  A blue laser using an ELO GaN substrate has the advantage that a highly reliable laser can be obtained. After a GaN film having a thickness of 150 to 170 μm is grown on a sapphire substrate, a semiconductor laser layer is formed. Furthermore, since the sapphire substrate has to be removed, it has the disadvantage that the manufacturing TAT is long and the product yield is poor.

  On the other hand, blue lasers will be used in large quantities for future recording and reading of digital storage media. For this reason, an attempt has been made to separate the manufacture of the GaN substrate from the manufacture of the blue laser. In this case, a GaN film having a thickness of 450 μm or more was grown on a substrate such as sapphire or GaAs, and then the substrate was removed. A non-warped GaN substrate having a substrate size of 2 cm to 5 cm in diameter and a film thickness of 300 μm to 450 μm is used.

For LD elements on a GaN substrate, for example, a step of forming an LD structure on the surface of the GaN substrate by epi-growth, a step of forming a ridge-type stripe by dry etching, a step of forming a p-electrode on the stripe, and etching the back surface Alternatively, it comprises a step of polishing and thinning, a step of depositing an n-electrode on the back surface, a step of forming a resonator by cleavage, and a step of obtaining an element of a desired size by element isolation. In a typical LD, the active layer has an InGaN / InGaN quantum well structure, the oscillation wavelength is 390 to 410 nm or 410 to 465 nm, and is determined by controlling the quantum well well and barrier layer thickness and the In composition. The A typical element size is a resonator length of 500 μm to 1000 μm and a width of 250 μm to 400 μm.
Shin-ichi Nakagawa, Tomoya Ynamoto, Masahiko Sano and Takashi Mukai, Applied Physics Letters, vol. 79, Number 13, Sept. 2001, p1948-p1950, “Characteristics of GaN laser diodes in the pure blue region”

  However, when a semiconductor laser is manufactured on a non-warped GaN substrate having a thickness of 300 μm to 450 μm, it is necessary to thin the substrate after forming a semiconductor layer on the substrate.

  In the conventional optical device, the substrate is a GaAs substrate or an InP substrate, and these substrates are relatively soft materials. Therefore, wafer warpage due to polishing distortion has not been a problem. However, since the GaN substrate is a hard material, it has become clear that wafer warpage due to polishing strain is an important problem to be solved.

  When the thickness of the substrate is reduced to about 150 μm by polishing the GaN substrate, the wax that has fixed the wafer after the polishing is melted and the wafer is significantly warped and cracked when the wafer is removed from the polishing jig. Warpage is suppressed while the wafer is fixed with wax, but when the wax is melted and the wafer is removed from the polishing jig, the polishing strain layer formed on the back surface of the substrate by mechanical polishing causes the polishing surface to be convex. This is because the wafer is warped remarkably by applying a force to warp the wafer in the direction of.

  Cracks due to wafer warpage have three problems.

  The first problem is that the device yield is extremely low.

  Although the in-plane cleavage direction of the GaAs (100) substrate, which is a zinc blende crystal, is orthogonal, the normal GaN substrate is hexagonal, and the three in-plane cleavage directions form an angle of 60 °. ing. For this reason, if the warpage on the GaN substrate is large, cracks are likely to occur in the 60 ° direction, and are easily cracked in a triangular shape. The larger the warp of the wafer, the more it breaks. As a result, parallel resonator surfaces cannot be formed, and the yield is significantly reduced.

  The second problem is that sufficient reliability cannot be obtained.

  There are two causes, and the first cause is that a crack or a non-light emitting center is generated in the epi layer due to the warp or crack of the LD wafer. The second cause is that the contact area between the LD element and the heat sink for heat dissipation is reduced due to the warp of the element, and the heat dissipation efficiency is lowered, so that the active layer temperature rises. Since a GaN substrate usually has a region with a high dislocation density, if the warp is large, dislocations may enter the current injection region of the active layer from the high dislocation density region, thereby reducing the device life.

  A third problem is that cleavage defects tend to occur. Cleavage defects reduce device yield and device characteristics. In the case of GaN, when the wafer thickness is 150 μm or more, it is easy to cause a cleavage failure such that it cannot be cleaved, cannot be cleaved at a desired position, and even if cleaved at a desired position, it is difficult to obtain a flat resonator surface.

  The cleavage failure causes a deterioration in LD characteristics such as deterioration of the shape of the light spot, or an increase in reflection loss and an increase in current threshold. In order to form a resonator with high yield by cleavage, the thickness of the LD wafer needs to be at least 150 μm or less.

  Hereinafter, the cause of the wafer warp will be described.

  The first cause of wafer warpage is distortion on the back surface of the substrate due to mechanical polishing with respect to the wafer thickness. The mechanically polished strained layer produced on the back surface by this polishing has a high defect density and thickness. Since GaN is a hard material as compared with other III-V materials, a polishing strain layer in which polishing scratches and crystal structure are disordered is likely to be deeply formed on the polishing surface of GaN. For example, when thinning an LD wafer formed on a GaN substrate by mechanical polishing, a polishing strain layer having a large strain is introduced from the polishing surface to a depth of about 5 μm to 20 μm. This polished strained layer is lattice mismatched to the unstrained crystal region. Therefore, when the wafer is cleaved to a thickness of 150 μm or less, a significant warp is generated in the direction in which the polished surface becomes convex.

  On the other hand, polishing scratches caused by mechanical polishing usually occur at a depth of about 2 μm at the maximum, although it depends on the grain size of the abrasive grains.

  The reason why the wafer breaks due to warping is that the internal stress increases beyond the bonding force of the crystals. GaN is hard but very brittle compared to sapphire, so it easily breaks when the wafer is warped. In particular, since the stress is easily concentrated in the portion of the polishing flaw, the wafer is easily cracked from there. Polishing scratches are in all directions, complicating wafer cracking. Furthermore, the polishing flaw causes a phenomenon such as cracking in the direction of the polishing flaw when the wafer is cleaved, so that the device yield is lowered.

  The second cause of wafer warpage is due to lattice mismatch of the AlGaN cladding layer with respect to the GaN substrate. The AlGaN cladding layer warps the wafer in the same direction as the warp caused by the polishing strain layer, that is, the direction in which the wafer back surface is convex. Therefore, when the thickness of the AlGaN cladding layer and the Al composition are increased, the wafer warpage increases. However, if the thickness or Al composition of the AlGaN cladding layer is limited to be small in order to reduce wafer warpage, the LD characteristics will be degraded. This is because light confinement in the active layer decreases and the current threshold value increases.

  Wafer warpage caused by distortion due to lattice mismatch with respect to the GaN substrate is, for example, G.M. H. Olsen et al., Entitled “Calculated Strain in Multilayer Heteroepitaxial Structure”, can be calculated by the method reported in 1997, Journal of Applied Physics, Volume 48, pages 2543-2547.

  The third cause of wafer warpage is the same in the ELO GaN substrate, but the GaN substrate itself used in the wafer has a defect density distribution in the growth direction. In order to reduce the defect density in the growth direction, a GaN thick film is formed on the sapphire substrate, and then the sapphire substrate is removed to obtain a GaN substrate. Even in this case, a defect density distribution in the growth direction is formed in the GaN thick film due to lattice mismatch between sapphire and GaN. Therefore, when the sapphire substrate is removed, a large warp occurs in the GaN thick film.

  After forming a semiconductor layer on a GaN substrate with no warp of 300 μm to 450 μm, the polishing strain layer by mechanical polishing, which is the first cause of warpage when the substrate is thinned, is obtained by chemically mechanically polishing the back surface. The surface portion with the largest strain is removed, and the strain due to mechanical polishing is eliminated. The strained strain layer by chemical mechanical polishing has a small strain and is thin as compared with the case of polishing distortion by mechanical polishing. The second cause is that the warpage of the wafer is reduced by optimizing the strain of the AlGaN layer. Furthermore, by increasing the thickness of GaN to 300 μm to 450 μm, even in the case of using the ELO method, the third cause of the backside of the substrate is a defect in the growth direction due to lattice mismatch between sapphire and GaN as the substrate. The inventor has found that a wafer having a small warp can be obtained by removing a high density region by polishing.

  Conventional mechanical polishing employs a polishing method in which the size of diamond abrasive grains used for polishing is reduced stepwise to reduce polishing scratches generated on the back surface. In this polishing method, reducing the grain size of the diamond abrasive grains to 2 μm or less has the effect of reducing and shallowing the polishing damage occurring on the back surface, but prevents wafer cracking that occurs when the wafer is removed from the polishing jig. Since this was not possible, it is considered that the thickness of the strained polishing layer produced by mechanical polishing could not be reduced or the magnitude of strain could not be reduced.

  There are methods for thinning the wafer other than polishing, but they are not practical. For example, as a method of making an LD wafer formed on a GaN substrate having a thickness of 300 μm to 450 μm to a thickness of about 100 μm, there is a method in which the back surface is wet-etched with a mixed solution of phosphoric acid and sulfuric acid at a temperature of 200 ° C. However, this method causes the phenomenon that the surface-side electrode is eroded, the threading dislocation in the C-axis direction is enlarged, or the remarkable unevenness is formed on the etching surface, so that the device yield is reduced or the thermal resistance is increased. Problems such as shortening the service life. When dry etching is used, since the etching rate is low, processing time and cost are required, which is not suitable for mass production. After all, as a method of making the LD wafer on the GaN substrate to a thickness of about 100 μm, polishing the back surface of the LD wafer has the highest yield, and the processing cost can be reduced.

  Even in a nitride semiconductor light emitting device on a sapphire substrate, it is necessary to polish the sapphire substrate for device isolation. Even in this case, the warpage of the wafer due to polishing distortion reduces the yield and the device life. Or the nitride semiconductor light emitting element on a zirconium boride board | substrate has the same problem.

  An object of the present invention is to provide a nitride semiconductor light emitting device and device wafer having high productivity, reliability, and performance, and a method for manufacturing the same.

  The present invention relates to a substrate thickness d and a substrate surface in a direction perpendicular to the substrate surface of a nitride semiconductor light emitting device wafer in which the wafer thickness is reduced by polishing the back surface of the substrate using at least chemical mechanical polishing. The nitride semiconductor light emitting device wafer is characterized in that the curvature radius R of the warpage is 0.5 m or more and the thickness of the substrate is 145 μm or less. Furthermore, the present invention relates to the thickness of the strained strain layer by chemical mechanical polishing of the back surface of the substrate of a nitride semiconductor light emitting device wafer that is thinned by polishing the back surface of the substrate using at least chemical mechanical polishing. Is a nitride semiconductor light emitting device wafer characterized by having a thickness of 5 μm or less, and the back surface of the nitride semiconductor light emitting device wafer is a mirror surface.

The nitride semiconductor wafer of the present invention preferably has a light emitting layer containing at least Ga and nitrogen on a GaN substrate, a sapphire substrate, an Al ₂ O ₃ substrate, or a ZrB ₂ substrate. The ZrB ₂ substrate preferably has an inclination angle with respect to the C plane of greater than 0 degrees and less than or equal to 10 degrees, and an inclination angle with respect to the C plane of greater than 0 degrees and less than or equal to 1 degree or an inclination angle with respect to the C plane of 2 degrees to 10 degrees. More preferably.

As the sum of products x · d of the Al composition x (0 <x ≦ 1) and the layer thickness d (μm) of all Al _x Ga _1-x N layers on the nitride semiconductor light emitting device wafer of the present invention The lattice mismatch dLM (μm) with respect to at least the GaN substrate or the GaN layer formed on the substrate is preferably 0.08 ≦ dLM ≦ 0.35.

  Furthermore, the present invention has a mechanical polishing step for polishing the back surface of the substrate by a mechanical polishing method, and a chemical mechanical polishing step for polishing using a chemical mechanical polishing method, and the thickness of the wafer in a direction perpendicular to the substrate surface. A method of manufacturing a wafer for a nitride semiconductor light emitting device, wherein the curvature radius R of the curvature d and the curvature of the substrate surface is 0.5 m or more and the thickness of the substrate is 145 μm or less. The present invention also includes a mechanical polishing step of polishing the back surface of the substrate by a mechanical polishing method, and a chemical mechanical polishing step of polishing using a chemical mechanical polishing method, and a polishing strain layer by chemical mechanical polishing of the back surface of the substrate. The method of manufacturing a wafer for a nitride semiconductor light emitting device is characterized in that the thickness of the substrate is 5 μm or less, and the present invention further comprises a mechanical polishing step of polishing the back surface of the substrate by a mechanical polishing method, and then a chemical machine And a chemical mechanical polishing step for polishing using a polishing method, wherein the back surface of the substrate by chemical mechanical polishing is a mirror surface.

In this case, it is preferable polishing pressure during chemical mechanical polishing is ^{0.05kg / cm 2 ~5kg / cm 2} . In chemical mechanical polishing, at least one abrasive selected from the group consisting of SiO ₂ , CeO ₂ , ZrO ₂ , Al ₂ O ₃ and Mn ₂ O ₃ having an average particle diameter of 5 nm to 100 nm, KOH, NH ₄ It is preferable to use a slurry containing at least one chemical solution selected from the group consisting of OH, NaOH, H ₂ O ₂ , Fe (NO) ₂ and KIO _3. It is preferably any one of artificial leather and foamed structure, and the polishing rate is preferably 1 nm / min to 100 nm / min.

  It is preferable to have a polishing strain layer removing step of removing the polishing strain layer formed by chemical mechanical polishing after the chemical mechanical polishing. The polishing strain layer removing step is preferably wet etching, Ar ion milling, reactive ion etching, or dry etching. In the polishing strain removing step, it is preferable to remove a region of 1 μm or more from the polishing surface.

  The present invention includes a step of forming a wax or an adhesive layer on a polishing holder in a back surface polishing step of a nitride semiconductor light emitting device wafer, and a surface of the nitride semiconductor light emitting device wafer on the surface of the wax or adhesive layer. Mounting the wafer for nitride semiconductor light emitting devices so that the wafer contacts with each other, a wax or an adhesive is sandwiched between the wafer for nitride semiconductor light emitting devices and the polishing holder, and the wafer for nitride semiconductor light emitting devices The thickness of the wax or adhesive layer t at the center of the substrate is 5 μm ≦ t ≦ 50 μm. The wax or adhesive is formed adjacent to the outer periphery of the nitride semiconductor light emitting device wafer, and the width W of the wax or adhesive formed adjacent to the outer periphery of the nitride semiconductor light emitting device wafer is 1 mm. It is preferable that ≦ W ≦ 20 mm, and the curvature radius R1 of the warp of the nitride semiconductor light emitting device wafer before polishing the back surface and the curvature radius R2 of the wafer warp when the polishing holder is attached with wax are R1 < R2 is preferred.

  Further, the wax or adhesive is preferably resistant to an alkaline solution (PH8 to PH11), has a melting point tm of 70 ° C. ≦ tm ≦ 200 ° C., and is soluble in an organic solvent other than alcohol. The thermal expansion coefficient K1 of the material of the polishing holder is preferably K1 <6 × K0 with respect to the thermal expansion coefficient K0 of the substrate of the nitride semiconductor light emitting device wafer.

  The nitride semiconductor light emitting device of the present invention is preferably obtained from the above nitride semiconductor light emitting device wafer.

  In the LD of the conventional manufacturing method that does not use chemical mechanical polishing, polishing flaws are observed and the effective thickness of the polishing strain layer is as large as 5 μm to 20 μm. Therefore, the curvature radius of a wafer having a thickness of 150 μm or less was 0.5 m or less. Conventionally, since the wafer warpage is large, the wafer is cracked. As a result, the device yield was 22% or less for the thick substrate and 10% or less for the thin substrate of about 90 μm.

  On the other hand, the wafer according to the present invention has no polishing scratches and the effective thickness of the polishing strain layer is as small as 2 μm. Therefore, the curvature radius of the wafer having a substrate thickness of 145 μm or less was 1 m or more. Since the wafer warpage is small, the wafer is not cracked and the epi layer is not cracked. As a result, a high device yield of 80% or more or 98% or more was realized.

  Furthermore, on the back surface in the mirror state, ohmic connection could not be taken between the back surface of the substrate and the metal layer in the conventional mechanically polished substrate, but by making the back surface of the substrate into a mirror surface using chemical mechanical polishing, An ohmic connection can be established between the substrate and the metal layer, and an n-electrode can be formed on the back surface of the substrate.

  If the thickness of the substrate is 145 μm or less, it can be divided along the cleavage when the wafer is cut into chips, and the thermal resistance is not increased.

  Regarding the reliability, the conventional LD has a device life of about 100 hours at a light output of 100 mW, but in the present invention, a device life of 1000 hours or more was obtained. The nitride semiconductor laser of the present invention showed an improvement of about 10 times in device yield and reliability as compared with the prior art.

  GaN substrates are 50 to 100 times more expensive than GaAs substrates used for red light emitting devices of the same size, so device yield is very important for commercialization as a replacement for red light emitting devices. is there. It is considered that a practical nitride semiconductor light emitting device can be provided by the present invention.

Sectional drawing of the nitride semiconductor laser of a prior art example. 1 is a cross-sectional view of a nitride semiconductor laser that is a first embodiment of the present invention. The implementation drawing of the chemical mechanical polishing which is the manufacturing method of the nitride semiconductor light-emitting device of this invention. Sectional drawing of the wafer for nitride semiconductor light-emitting devices of this invention. The figure which shows the layer thickness dependence of the curvature radius of the wafer for nitride semiconductor lasers of the Example of this invention. The figure which shows the LD wafer thickness dependence of the element yield of the nitride semiconductor laser of the Example of this invention. The figure which shows the LD wafer thickness dependence of the element lifetime of the nitride semiconductor laser of the Example of this invention. Sectional drawing of the nitride semiconductor laser which is the 10th Example of this invention. Sectional drawing of the nitride semiconductor laser which is the 11th Example of this invention. The figure which shows the state which affixed the nitride semiconductor light-emitting device wafer of this invention on the grinding | polishing holder. Sectional drawing of FIG. It is a figure which shows the resonator length L dependence of the curvature radius R of a laser diode chip | tip in a resonator direction. It is the figure which expanded the horizontal axis | shaft of FIG. 12 in the range of 0 <L <5.

Explanation of symbols

101 n electrode 102 n-type ELO-GaN substrate 103 n-Al _0.05 Ga _0.95 N clad layer 104 n-In _0.1 Ga _0.9 N layer 105 n-type modulated doped superlattice clad layer 106 multiple Quantum well active layer 107 p-Al _0.3 Ga _0.7 N current overflow prevention layer 108 GaN layer 109 Ridge type p-type modulation doped superlattice cladding layer 110 p-GaN contact layer 111 SiO ₂ current confinement mask 112 p electrode 201 n electrode 202 polishing strained layer 203 GaN substrate 204 n-GaN buffer layer 205 n-Al _0.07 Ga _0.93 N cladding layer 206 active layer 207 of three quantum wells p-Al _0.14 Ga _0.86 N current overflow prevention layer 208 p-GaN layer 209 Ridge type p-Al _0.07 Ga _0.93 N layer Pad layer 210 p-GaN contact layer 211 SiO ₂ current confinement mask 212 p electrode 301 edged polishing disk 302 polishing pad 303 colloidal silica solution 304 polishing jig 305 arm 306 LD wafer 401 N electrode 402 polishing strained layer 403 GaN substrate 404 AlGaN LD epilayer 405 P electrode 405
406 Warpage 1 / R
407 radius of curvature R
408 LD wafer thickness d
409 Deflection amount δ
501 With chemical mechanical polishing 502 Without chemical mechanical polishing 503 Without polishing strain layer 504 Polishing strain layer thickness 2 μm
505 Polishing strain layer thickness 3μm
506 Polishing strain layer thickness 4μm
507 First range 508 Second range 509 Third range 510 Fourth range 601 With chemical mechanical polishing 602 Without chemical mechanical polishing 701 With chemical mechanical polishing 702 Without chemical mechanical polishing 800 Polishing strained layer 801 Sapphire substrate 802 n− GaN layer 803 n-Al _0.07 Ga _0.93 N cladding layer 804 Three quantum well active layers 805 p-Al _0.14 Ga _0.86 N current overflow prevention layer 806 p-GaN layer 807 p-Al _{0 0.07} Ga _0.93 N clad layer 808 p-GaN contact layer 809 SiO ₂ mask 810 P electrode 811 n electrode 812 n-GaN layer 901 ZrB ₂ polishing strain layer 902 110 μm thick ZrB ₂ substrate 903 n-GaN layer 904 n-type superlattice layer 905 _n-Al 0.1 _{Ga 0.9} n cladding layer 906 Active layer 907 _{p-Al 0.14 Ga 0.86} N current overflow prevention layer 908 p-GaN layer 909 ridged _{p-Al 0.07 Ga 0.93} N cladding layer 910 p-GaN contact layer of the quantum well layer 911 SiO ₂ current confinement mask 912 p-electrode

The nitride semiconductor light emitting device wafer of the present invention (hereinafter sometimes abbreviated as wafer)
1. A nitride semiconductor light emitting device wafer having a thickness reduced by polishing the back surface of the substrate using at least chemical mechanical polishing has a thickness of 5 μm or less of the polishing strain layer by chemical mechanical polishing of the back surface of the substrate. A nitride semiconductor light emitting device wafer characterized by the above.
2. At least the wafer thickness d and the curvature of the warp of the substrate surface in the direction perpendicular to the substrate surface of the wafer for nitride semiconductor light emitting device in which the wafer thickness is reduced by polishing the back surface of the substrate using chemical mechanical polishing. A wafer for a nitride semiconductor light emitting device, wherein the radius R is a curvature radius R of 0.5 m or more and the thickness of the substrate of the wafer is 145 μm or less.
It is.

  Furthermore, the amount of warpage of the wafer thinned by polishing is determined by the degree of lattice mismatch with respect to the substrate of the AlGaN cladding layer, that is, the product of the thickness of the AlGaN cladding layer and the size of the Al composition, and the polishing strain relative to the wafer thickness. Determined by layer thickness. That is, the greater the AlGaN cladding layer thickness and Al composition, the smaller the wafer thickness, and the greater the polishing strain layer thickness, the greater the wafer warpage.

  The nitride semiconductor light emitting device wafer of the present invention further considered AlGaN lattice mismatch and cleavage yield. With an element structure in which the AlGaN lattice mismatch degree is limited to a small thickness with respect to the thickness of the wafer substrate in the range of 75 μm or more and 145 μm or less, an element structure in which the polishing strain layer is extremely thin, and a structure having no polishing scratches on the polishing surface, The curvature radius of the wafer and device warpage could be controlled to 0.5 m ≦ R ≦ 20 m. The wafer according to the present invention has a small warp and a characteristic that there are no polishing flaws, so that the internal stress does not increase beyond the bonding force of the wafer crystal and the stress does not concentrate on the polishing flaws. For this reason, the yield of the device was improved to 5 to 20 times that of the conventional device.

  The curvature radius R is proportional to the thickness of the substrate, and it is not necessary to provide an upper limit for the curvature radius R. However, if the curvature radius R is increased, the substrate becomes thicker and no problem in wafer yield occurs. As a result, the problem arises that the lifespan is shortened. The lifetime due to thermal resistance is related to the light emission output, and it is possible to set the thickness of the substrate in the case of low output to be thicker than the thickness of the substrate in the case of high output, but in recent DVDs (Digital Versatile Disk) In the case of a blue semiconductor laser diode that meets the demand for higher density, since an output exceeding 100 mw is required during recording, the thickness of the wafer is preferably 145 μm or less. When the thickness of the wafer is 145 μm or less, the yield is not lowered when the semiconductor laser device is manufactured from the wafer.

  On the other hand, the lower limit of the thickness of the substrate is determined by the handling property of the wafer and the semiconductor laser chip obtained from the wafer. If the wafer thickness is 75 μm or more, the handling property is not deteriorated. Further, if the curvature radius is 0.5 m or more, the wafer is not cracked when the wafer is removed from the jig after the wafer is thinned by etching or polishing.

  Hereinafter, a wafer attaching process which is a part of the manufacturing method of the present invention will be described in detail with reference to FIGS. FIG. 10 shows a state where a nitride semiconductor light emitting device wafer is attached to a polishing holder. Polishing is performed in a state in which the back surface 104 of the element wafer is attached to the polishing holder 951 with the wax width W 953 using the attached wax 952. FIG. 11 shows a cross-sectional view thereof. The nitride semiconductor light emitting device wafer is bonded almost horizontally to the holder 951 with a wax thickness t955. The surface of the bonded wafer before polishing has a radius of curvature R956. Here, the thickness t of the wax is defined by a value at the center of the wafer.

  The present invention has the characteristics of controlling the wax thickness t955 and the wax width W953, the radius of curvature R956 of the attached wafer surface, the properties of the attached wax 952, and the thermal expansion coefficient (material) of the polishing holder 101.

  In the manufacturing method of the present invention, a wax that is resistant to an alkaline solution of CMP, has a strong adhesive force, and is hard is used. However, a wax that is soluble in an organic solvent such as methanol, ethanol, or isopropyl alcohol is used. For example, one that is soluble in methyl ethyl ketone is used. A typical wax has a melting point of 80 ° C to 160 ° C. A higher wax melting point is preferred because it tends to be harder.

When affixing the wax, hold the center of the wafer to remove the bubbles between the wafer and the wax, fill the wafer with melted wax and attach it to the holder, and then place the holder downward in the guide ring. Then, place it on a horizontal and clean table, and cool and paste it vertically from above by applying a load of 100 g / cm ² or more and 500 g / cm ² or less. By this method, the wafer is warped and bonded horizontally. Also, the wax covers the side surface around the wafer, and the wafer and the wax surface are aligned. In the manufacturing method of the present invention, the holder with the polished wafer is heated with a heater to melt the wax, and the wafer is pushed out so as to be displaced, and the wafer is removed from the holder. The removed wafer is immersed in methyl ethyl ketone and subjected to ultrasonic cleaning to remove the wax. Thereafter, it is washed with alcohol and dried by nitrogen blowing.

(Wax thickness t)
In a conventional GaAs or InP substrate wafer, the thickness of the wax for attaching the device wafer to the polishing holder is about 2 μm and 5 μm or less. This is because the thinner the wax, the smaller the thickness variation in the wafer surface and the more uniform the wafer thickness. However, in the wafer backside polishing process of the present invention, the layer thickness t of the wax or adhesive for attaching the device wafer to the polishing holder is 5 μm ≦ t ≦ 50 μm, preferably 8 μm ≦ t ≦ 30 μm, more preferably 10 μm ≦ t. It is preferable that ≦ 20 μm.

  In the present invention, the holder with the polished wafer is heated with a heater to melt the wax, and the wafer is pushed out so as to be displaced, and the wafer is removed from the holder. The polished wafer is thin and easily broken by warping. When the wafer diameter is 15 mm or more, if the wax thickness t is 5 μm or less, the wafer cracks during removal. When the wax thickness is 5 μm or more, the wax becomes a lubricant and can prevent the wafer from being cracked during removal. The wax thickness t of the present invention has an advantage that the wafer having a diameter of 50 mm before polishing is warped and can be attached even when there is a deflection of 5 μm to 30 μm in the center of the wafer.

(Wax width W)
As shown in FIGS. 10 and 11, the wax or adhesive is formed adjacent to the periphery of the side surface of the element wafer. The width W of the waxes formed adjacent to each other is 1 mm ≦ W, preferably 2 mm ≦ W ≦ 20 mm, more preferably 3 mm ≦ W ≦ 8 mm. Although GaN is a strong material, it is a material that is liable to be cracked due to defects or polishing scratches upon impact during polishing. In particular, the periphery of the wafer is liable to be damaged by an impact with an abrasive such as a diamond embedded in the polishing board. In the present invention, the peripheral portion of the wafer can be protected with a hard wax, so that it is difficult for defects to occur. The width W of the wax varies depending on the location, but at least 1 mm ≦ W is necessary. When 20 mm ≦ W, the wax accumulates on the polishing disk (see FIG. 3), or the polishing load is applied to the wax other than the wafer, and the polishing rate is remarkably lowered. Considering the fluctuation of W, 2 mm ≦ W ≦ 20 mm is preferable, and 3 mm ≦ W ≦ 8 mm is more preferable.

(Curve radius R of the surface of the bonded wafer)
The curvature radius R1 of the warp before polishing the back surface of the wafer and the curvature radius R2 of the warp of the wafer when the polishing holder is attached with wax are R1 <R2, preferably 1.5 · R1 <R2, more preferably 3. R1 <R2, most preferably 6R1 <R2.

  Table 1 shows the relationship between the amount of deflection and the radius of curvature in a 50 mm diameter wafer. A typical value of the curvature radius R1 of the warp before polishing the back surface of the wafer is 10 m. For a wafer having a diameter of 50 mm, if the curvature radius R2 of the wafer warp after bonding is 1.5 · R1 or more, the amount of deflection is 20 μm. If the wafer is bonded horizontally, the thickness at the center of the wafer is Is 100 μm, it becomes 120 μm at the wafer edge. Since the cleavage yield is high within 120 μm, the production method of the present invention is effective in improving the yield. If the curvature radius R2 of the wafer warp after bonding is 3 · R1 or more, the deflection amount is 10 μm, and the in-plane uniformity of the wafer is improved. If the curvature radius R2 of the wafer warp after pasting is 6 · R1 or more, the amount of deflection is 5 μm, and even if the wafer horizontality is slightly lowered, a high yield is obtained, which is most preferable.

(Characteristics of pasted wax)
The affixing wax or adhesive is resistant to alkaline solutions (PH8 to PH11) such as chemical mechanical polishing (CMP) abrasives, and its melting point tm is 70 ° C. ≦ tm ≦ 200 ° C., Preferably, 100 ° C. ≦ tm ≦ 170 ° C., more preferably 140 ° C. ≦ tm ≦ 160 ° C., and a material soluble in an organic solvent other than alcohol is preferably used.

  The higher the melting point of the wax, the stronger the adhesive force and the tendency to become harder, which is effective in preventing wafer defects. However, those having a melting point of 200 ° C. or more are difficult to handle. Since the wax does not dissolve in the alcohol, the abrasive can be removed by wiping the wafer, holder and wax surface with the alcohol during polishing.

(Coefficient of thermal expansion of polishing holder (material))
It is preferable to use a polishing holder whose thermal expansion coefficient is close to that of the wafer. The thermal expansion coefficient K1 of the material of the polishing holder to which the element wafer is attached is K1 <6 · K0, preferably K1 <3 · K0, and more preferably K1 <2 · K0 with respect to the thermal expansion coefficient K0 of the wafer substrate. It has the characteristic which is.

  Table 2 shows the amount of holder shrinkage at a 50 mm size for the holder material when a 100 ° C melting point wax is used, and Table 3 shows the holder shrinkage at a 50 mm size for the holder material when a 150 ° C melting point wax is used. Indicates the amount.

  The case of a wafer using a GaN substrate will be described. When the wafer on the GaN substrate is affixed to the aluminum holder with wax, stress distribution resulting from the difference in thermal expansion between the holder and the wafer occurs in the affixing wax of the thin film in the process of returning from the melting point to room temperature.

  In the case of a 50 mm diameter wafer, the aluminum holder contracts by 99 μm and GaN contracts by 12 μm, so the contraction difference becomes 88 μm. Compressive stress is applied to the wafer, which can cause substrate cracking. In addition, when a thin wax having a thickness of about 10 μm is strained, wax cracking occurs. As a result, the alkaline solution of CMP erodes the electrode portion on the front surface of the wafer, so that the yield decreases. This tendency increases as the melting point of the wax increases. For example, since the shrinkage difference between an aluminum holder and GaN is 145 μm, an aluminum holder is not suitable. In the case of a GaN wafer, the holder material satisfies K1 <6 · K0 when SiC is used, K1 <3 · K0 when alumina is used, and K1 <6 · K0 when stainless steel is used. However, among these, an alumina holder is suitable from the viewpoint of workability and cost.

  In the present invention, in addition to the conventional mechanical polishing method for gradually reducing the particle size of diamond abrasive grains used for mechanical polishing, since there is a step of performing chemical mechanical polishing on the back surface of the wafer, there are no polishing scratches, The thickness of the polishing strain layer can be 2 μm or less. As a result, even if the polishing strain layer is removed by etching, there is no noticeable unevenness formed on the etched surface, or threading dislocations in the C-axis direction are not enlarged.

  In the present invention, since the wafer warpage is suppressed to a minimum and no crack occurs when the wafer is removed after polishing, a high device yield can be realized.

Chemical mechanical polishing is a chemical process in which a product formed by reaction with an alkaline aqueous solution is mainly formed on the polishing surface, and physical that is removed by rubbing the reaction product with fine particles such as SiO _2. Process. Since the bond between the reaction product and the substrate crystal is weaker than the atomic bond in the substrate crystal, it is easier to remove the reaction product than to directly remove the surface layer. The reason why chemical mechanical polishing of GaN with softer SiO ₂ grains is included is because such chemical action is included. Therefore, chemical mechanical polishing has a characteristic that the polishing rate is low, but distortion does not easily occur inside the crystal.

  Mechanical polishing is a process of physically removing the polished surface by rubbing abrasive grains such as diamond harder than the substrate on the substrate. Mechanical polishing has a high polishing rate but has a drawback in that polishing distortion is noticeably generated. On the other hand, wet chemical etching does not cause distortion inside the crystal, but surface unevenness after mechanical polishing tends to remarkably expand.

  Unlike mechanical chemical etching, chemical mechanical polishing preferentially processes and removes convex portions of minute irregularities. As a result, flatness is realized, and the most strained surface of the polishing strain layer formed by mechanical polishing is removed by chemical mechanical polishing, and the strain applied to the substrate is recovered. As a result, the thickness of the polishing strain layer is reduced, and at the same time, the strain amount is extremely reduced. For this reason, by performing chemical mechanical polishing subsequent to mechanical polishing, scratches generated on the back surface of the substrate by mechanical polishing can be removed, the back surface can be smoothed to obtain a mirror surface state, and further, 5 to 20 μm by mechanical polishing can be obtained. The thickness of the strain layer can be a strain layer having a thickness of 2 to 5 μm. If the thickness of the strained layer by chemical mechanical polishing is 5 μm or less, the wafer will not crack due to warpage, but it is more preferably 3 μm or less, and even more preferably 2 μm or less.

The abrasive grain type for chemical mechanical polishing may be any of SiO ₂ , CeO ₂ , ZrO ₂ , Al ₂ O _3, Mn ₂ O ₃ , or a combination thereof. The average particle diameter of the abrasive grains is preferably 5 nm to 100 nm, and more preferably 5 nm to 50 nm. The working fluid may be KOH, NH ₄ OH, NaOH, H ₂ O ₂ , Fe (NO) 2, KIO ₃ , or a combination thereof. The polishing pad may be a suede, non-woven fabric, artificial leather, or foam structure. Pressure during chemical mechanical polishing, so too low, the polishing rate is low, load on the substrate is suitably ^{0.1kg / cm 2 ~5kg / cm 2} . The polishing rate is preferably 5 nm / min to 100 nm / min, and more preferably 5 nm / min to 20 nm / min.

  In order to thin the polishing strain layer by chemical mechanical polishing, after the chemical mechanical polishing is completed, the back surface of the substrate can be etched to remove the polishing strain layer. Etching can be wet etching, Ar ion milling, reactive ion etching, or dry etching.

  In contrast, etching by Ar ion milling, reactive ion etching, or dry etching causes etching damage to the substrate, but the thickness is one or more orders of magnitude smaller than the polished strained layer, and is usually about 0.001 to 0.01 μm. It has a merit that it can be etched without protecting the wafer surface like wet etching because the degree of distortion is even lower than the distortion caused by chemical mechanical polishing, and the influence on the warpage of the substrate is small. Yes.

  FIG. 12 is a diagram showing the resonator length L dependence of the radius of curvature R in the LD resonator direction of a laser diode (hereinafter abbreviated as LD) chip having a substrate thickness of 108 μm using CMP. As the resonator length L decreases, the radius of curvature of the element decreases. Specifically, when the wafer size is L = 40 mm, R = 3.4 m. However, when an LD chip is used, R = 0.67 m when L = 1.5 mm, and R = 0 when L = 0.85 mm. At 0.31 m and L = 0.60 mm, R = 0.22 m. FIG. 13 shows an enlarged view of the horizontal axis of FIG. 12 in the range of 0 <L <5.

  In the range of 0 <L <5, the experimental value satisfied the relationship of R = 0.387 · L. Therefore, it is estimated that R = 0.116 m when L = 0.3 mm. Since the resonator length of the LD chip is usually 0.3 mm or more, the curvature radius R of the LD chip using CMP in this case is 0.1 m or more. In a typical size L = 0.6 mm, the radius of curvature R of the LD chip is 0.2 m or more. Therefore, the curvature radius R of the LD chip is an order of magnitude smaller than that of the LD wafer.

  In the experience so far, the radius of curvature of a 40 mm diameter wafer using CMP is 0.5 m or more due to the influence of wafer thickness, epi thickness, damaged layer thickness after mechanical polishing, CMP time, substrate dislocation density, etc. . With a typical resonator length L = 0.6 mm, the radius of curvature R of the LD chip obtained from the LD wafer is 0.05 m or more.

  Even when a wafer having a radius of curvature of 0.5 m or more is used, the curvature of the LD chip in the resonator length direction becomes small.

(First embodiment)
FIG. 2 shows a cross-sectional view of the nitride semiconductor laser according to the first embodiment of the present invention.

The nitride semiconductor laser according to the present embodiment includes an n electrode 201, a polishing strain layer 202 of a GaN substrate, a GaN substrate 203 having a layer thickness of 110 μm, an n-GaN buffer layer 204, and n-Al ₀ having a thickness of 1.2 μm. _0.07 Ga _0.93 N clad layer 205, In _0.2 Ga _0.8 N (2.5 nm) / GaN (10 nm) three-layer quantum well active layer 206, 8 nm thick p-Al _0.14 Ga _0.86 N current overflow prevention layer 207, 100 nm thick p-GaN layer 208, 0.6 μm thick ridge type p-Al _0.07 Ga _0.93 N cladding layer 209, p-GaN contact layer 210, 300 nm It consists of a thick SiO ₂ current confinement mask 211 and a p-electrode 212. The ridge width is 1.8 μm to 2.3 μm. Mg (magnesium) is used for the p-punt and Si (silicon) is used for the n-punt, but O (oxygen) may be used. Atomic concentration of Mg is in the p-GaN contact layer 210 1 × ¹⁰ 20 ^{cm -3,} for others a 2 × ^{1019 cm} -3, all atomic concentration of Si is 2 × ¹⁰ 18 ^{cm -3.} Crystal growth was performed by MOVPE growth. The growth temperature is 600 ° C. for the n-GaN buffer layer 204, 1050 ° C. for the n-clad layer 205 and the p-clad layer 209, and 800 ° C. for the active layer 6. Ammonia was used as the N raw material, nitrogen was used in the active layer, and hydrogen was used in the other cases.

After the above structure is grown on a GaN substrate having a thickness of 300 to 450 μm, a ridge-type p-cladding layer 209 is formed by dry etching. Or after the growth of the 100nm thick p-GaN layer 208, to form a SiO ₂ current confinement mask 210 of 300nm thick, by selective growth, it may be formed by growing a p-cladding layer 209.

Instead of the p-Al _0.07 Ga _0.93 N layer, the p-clad layer 209 has a large number of p-Al _0.14 Ga _0.86 N (2.5 nm) / p-GaN (2.5 nm). A superlattice clad layer having a period may be used. In this case, in order to maintain optical confinement, the average Al composition is the same with the same layer thickness. In the present invention, it is preferable to reduce the lattice mismatch degree of the AlGaN layer in order to reduce warpage. When an LD formed on a GaN substrate has a dn (μm) -thick n-Al _x Ga _1-x N layer and a dp (μm) -thick p-AlyGa 1-yN layer, the lattice loss of the AlGaN layer The degree of matching dLM is defined by dLM = x · dn and + y · dp. In the example of the present invention, since dLM = 0.07 · 1.2 + 0.07 · 0.6 = 0.126, the degree of lattice mismatch is 0.126 (μm). In applying the present invention, the degree of lattice mismatch dLM needs to be 0.08 ≦ dLM ≦ 0.35, preferably 0.09 ≦ dLM ≦ 0.20, and more preferably 0.10 ≦ dLM ≦ 0.15. preferable.

  FIG. 4 is a cross-sectional view of the nitride semiconductor light emitting device wafer of the present invention. In the nitride semiconductor light emitting device wafer, an AlGaN-based LD epitaxial layer 404 and a P electrode 405 are formed on the surface of the GaN substrate 403, and a polishing damage layer 402 is formed on the back side of the GaN substrate 403. An N electrode 401 is formed thereon. The radius of curvature is defined as shown in FIG. 4 using the degree of bending of the front and back surfaces of the LD wafer and the LD element or the degree of inclination of the C-axis of the crystal. Wafer warpage 1 / R 406 is represented by a radius of curvature R 407 of the most warped portion in the wafer. In other words, the smaller the radius of curvature R407, the greater the warp. The reason why it is locally defined is that the wafer warp is not necessarily a perfect spherical surface over the entire surface of the wafer. Since the warpage of the wafer center is usually large, the warpage of the substrate surface, not the electrode surface, is measured at the center. When the wafer deflection amount δ 409 and the wafer size is L, the radius of curvature R is given by R = 2L / 8δ. Deflection amount δ 409 is the distance from the horizontal plane to the edge of the wafer when the wafer is placed on the horizontal plane with the projection down as shown in FIG.

  A method for manufacturing a wafer according to the present embodiment will be described.

  An LD structure was grown by an MOVPE method on an n-type GaN substrate having a thickness of 300 μm to 450 μm to obtain an LD wafer. Further, a ridge structure was formed on the p side of the LD wafer to form a p electrode. The process up to here is the same as the conventional manufacturing method.

  Next, the wafer back surface is polished to reduce the wafer thickness to a desired thickness. First, using an alkali-resistant wax, the p-electrode side of the LD wafer was attached to a polishing jig.

Next, the wafer was pressed against a diamond baking grinder having an abrasive grain size of 60 μm at a load of 300 g / cm ² and held, and mechanically polished by rotating the grinder at a speed of 30 revolutions / minute. The polishing rate was 10 μm / min, and the wafer thickness was mechanically polished from 450 μm to 140 μm. Thereafter, mechanical polishing was performed to a thickness of 114 μm using diamond slurry having a diameter of 6 μm and a diameter of 2 μm, a copper disk and a tin disk, and then chemical mechanical polishing was performed as a finish.

FIG. 3 shows an embodiment of chemical mechanical polishing. The chemical mechanical polishing includes a rimmed polishing disk 301, a polishing pad 302, a colloidal silica solution 303, a polishing jig 304, an arm 305, and an LD wafer 306. The colloidal silica solution 303 is filled in the edged polishing disk 301 to which the polishing pad 302 is attached, and the LD wafer 306 is immersed therein and pressed at a load of 300 g / cm ² while the edged polishing disk 301 is rotated at a speed of 20 revolutions / minute. Then it was rotated. The polishing rate at that time was 2 μm / hour.

In the case of a GaN substrate or a sapphire substrate, it is appropriate to use a colloidal silica solution 303 in which SiO ₂ abrasive grains having an average particle diameter of about 20 nm are dispersed in an alkaline solution as a slurry solution for chemical mechanical polishing. For the polishing pad 302, a polyethylene foam structure called surf fin was used. By chemical mechanical polishing for about 1 hour, polishing scratches were hardly seen even when observed in detail with an optical microscope, and a mirror surface was obtained. A polishing jig was placed on the heater, the wax was melted, and the wafer was removed from the polishing jig 304, but the wafer did not crack. When the thickness was measured after organic cleaning of the wafer, the layer thickness of the wafer was 112 μm, and the uniformity was ± 1 μm with a diameter of 40 mm. The curvature radius of warpage obtained from the degree of bending of the substrate was as small as 5 m.

  In order to further reduce the warpage of the wafer, the substrate side surface of the wafer is polished using chemical mechanical polishing, and then Ar ion milling is used at a high frequency power of 400 W for 1 hour, with a depth of 2 μm from the surface. The abrasive strain layer was removed. This backside treatment step can be performed by using phosphoric acid sulfuric acid wet etching, dry etching using chlorine plasma, reactive ion etching, or the like in addition to Ar ion milling. The conditions for chlorine dry etching are, for example, chlorine 20 cc / min, pressure 1.0 Pa, and high frequency power of 400 W for 1 hour. Even when the depth of 5 μm or more was removed by Ar ion milling, the amount of warpage of the wafer did not change, and therefore the thickness of the polishing strain layer in the back surface treatment step after chemical mechanical polishing is considered to be 5 μm or less.

  After thinning the wafer by polishing, an n-electrode is formed on the backside of the wafer, heat-treated at 500 ° C. for 15 minutes, and then the edge of the wafer is 1 mm long with a diamond cutter so that the resonator length is 650 μm. After scorching, the wafer was cleaved by pressing the edge along the scribing line. When the cleavage plane was observed with a scanning electron microscope, a perfect mirror surface was obtained with most of the elements. An LD element was obtained by dividing the LD bar. A device yield of 98% was obtained by using chemical mechanical polishing which is a manufacturing method of the present invention.

In mechanical polishing, when the pad moves on the wafer back surface, wear occurs due to sliding friction between the pad and abrasive grains pressed on the wafer surface. The removal speed is determined by the load, contact area, and pad moving speed. To prevent the edge of the wafer to whom, to the thin hard deformation amount is small ^{pads, 100g / cm 2 ~400g / cm} 2 about the lower pressure it is preferable uniformly applied to the entire wafer.

The abrasive grain type for chemical mechanical polishing is not limited to SiO ₂ but may be any one of CeO ₂ , ZrO ₂ , Al ₂ O ₃ , Mn ₂ O ₃ , or a combination thereof. The average particle diameter of the abrasive grains is 5 nm to 100 nm or more desirably 5 nm to 50 nm. The working fluid is KOH, NH ₄ OH,
Any of NaOH, H ₂ O ₂ , Fe (NO) ₂ , KIO ₃ or a combination thereof may be used. The polishing pad may be any of suede, non-woven fabric, artificial leather, and foam structure. Pressure during chemical mechanical polishing, so too low, the polishing rate is ^{small, 0.1kg / cm 2 ~5kg / cm} 2 are suitable. The polishing rate is preferably 5 nm / min to 100 nm / min, and more preferably 5 nm / min to 20 nm / min.

  The obtained device was subjected to AR-HR coating. The threshold value of the element was 45 mA, the slope efficiency was 1.2 W / A, the operating current at 5 mW was about 50 mA, and the operating current at 100 mW was about 130 mA.

  The life test was performed with 20 lines under the operating conditions of 50 ° C., 5 mW or 60 ° C., 100 mW, and the failure (disqualification) judgment standard was defined as the point when the operating current increased by 20%.

  As a result, an average estimated lifetime (MTTF: Mean Time To Failure) of 6000 hours or more is achieved at 50 ° C. and a low output of 5 mW, and has a lifetime that is twice that of 3000 hours described in Non-Patent Document 1. . Further, an estimated average life of 700 hours or more was obtained even at a high output of 60 ° C. and 100 mW, which was accelerated about 8.6 times with respect to the conditions of 50 ° C. and 5 mW.

  In the nitride semiconductor laser device having a layer thickness of 112 μm and a curvature radius of 5.0 m, a high device yield of 98% and an average lifetime of 1160 hours were obtained at a high output of 100 mW. By optimizing other factors such as the growth conditions of the active layer, it is expected that a long-life device will be obtained as a high-power device in the future.

  Hereinafter, the manufacturing method of the present embodiment will be described in detail. When the manufacturing method of the present embodiment is used, the substrate thickness d of the wafer and the radius of curvature R of the wafer are 75 μm ≦ d ≦ 145 μm and 0.5 m, respectively. An LD wafer and an LD element satisfying the condition of ≦ R ≦ 20 m, or an LD element obtained from the LD wafer satisfying the above condition can be obtained.

  The effective strain amount of the polishing strained layer 202 of the LD obtained by the manufacturing method of the present invention is about 0.165%, and the effective layer thickness at that time is as extremely small as 2 μm to 5 μm. Therefore, it is possible to obtain an LD wafer and an LD element having a curvature radius of warpage of 1 m or more, or an LD element obtained from an LD wafer that satisfies the above conditions.

  The warp of the present invention is a warp having a radius of curvature of 1 m or more, and can be confirmed with a normal wafer size or element size. For example, when the wafer size is 1 cm, the deflection amount of the wafer having a curvature radius of 1 m is 12.5 μm. This is a value that can be sufficiently measured with a normal film thickness meter. In the case of the LD element, when the element size is 650 μm, the deflection amount of the element having a curvature radius of 1 m is 52.8 nm. This is a value that can be measured by observing the cross-sectional shape with a scanning electron microscope. Specifically, the blue LD element is placed adjacent to a flat GaAs substrate and placed in a scanning electron microscope apparatus to measure the amount of deflection, and the warp of the element can be obtained from the obtained amount of deflection. Alternatively, laser beam reflection may be used. When the local warpage is obtained, the warpage can be obtained by cooling the element and measuring the strain amount of the crystal from optical measurement. Alternatively, the warpage of the element or the wafer can be obtained from the tilt of the crystal axis by a method using X-ray diffraction. Alternatively, if it is an element on a GaN substrate, it can be cooled to 5K, and the residual strain of GaN can be obtained from the exciton energy change using the linear relationship between the exciton energy and the C-axis lattice constant. . Thereby, the polishing strain layer thickness can be estimated.

  Although all the descriptions in the embodiments are based on the thickness of the wafer, the thickness of the substrate can be obtained by subtracting the thickness of the epitaxial growth layer grown on the substrate from the thickness of the wafer.

(Another embodiment of the invention)
In the embodiment of the present invention, there are no particular restrictions on the element growth method, the layer structure, the structure of the optical waveguide, the presence or absence of a resonator, the presence or absence of a structure for controlling dislocation distribution, and the like. However, in order to reduce warpage, it is desirable that the degree of lattice mismatch of the cladding layer is as described in the claims. In the embodiment of the present invention, the type and plane orientation of the nitride semiconductor substrate are not particularly limited. For example, the substrate material is not limited to a GaN substrate, but may be an AlGaN substrate, an InN substrate, a GaInN substrate, an AlInN substrate, or an AlGaInN substrate. In the present invention, the epi layer only needs to have at least one nitride semiconductor layer, and there is no particular limitation on the type of substrate and the plane orientation. For example, the substrate material may be an Al ₂ O ₃ substrate, a ZrB ₂ substrate, a SiC substrate, or a Si substrate. However, regarding the ZrB ₂ substrate, the SiC substrate, and the Si substrate, it is desirable to use an inclined substrate. Nitride semiconductor elements using a ZrB ₂ substrate have excellent reliability, nitride semiconductor elements using a SiC substrate have excellent heat dissipation characteristics, and nitride semiconductor elements using a Si substrate have excellent low cost characteristics Because it has, you can use properly according to the purpose.

  Next, nine embodiments having different LD thicknesses and curvature radii will be described. Table 4 shows the yield and average life with respect to the substrate thickness and curvature R of the nitride semiconductor laser wafer according to the nine embodiments of the present invention. The fourth example has already been described in detail in the first embodiment. In the following nine examples, each layer thickness and the radius of curvature are different, but the other structures are all the same as those in the first embodiment.

  Table 4 shows the yield and average life with respect to the substrate thickness and curvature R of the nitride semiconductor laser wafer according to the embodiment of the present invention.

第１の実施例は、ウエハの基板厚１３６μｍ、曲率半径８．３ｍの窒化物半導体レーザ素子である。素子歩留まりは８１％、素子の平均寿命は７００時間であった。

The first embodiment is a nitride semiconductor laser device having a wafer substrate thickness of 136 μm and a curvature radius of 8.3 m. The element yield was 81% and the average life of the elements was 700 hours.

  The second embodiment is a nitride semiconductor laser device having a wafer substrate thickness of 128 μm and a curvature radius of 7.0 m. The device yield was 89% and the average life of the device was 1030 hours.

  The third embodiment is a nitride semiconductor laser device having a wafer substrate thickness of 119 μm and a curvature radius of 6.2 m. The device yield was 94% and the average life of the device was 1100 hours.

  The fourth embodiment is a nitride semiconductor laser device having a wafer substrate thickness of 112 μm and a curvature radius of 5.0 m. The device yield was 98% and the average life of the device was 1160 hours.

  The fifth embodiment is a nitride semiconductor laser device having a wafer substrate thickness of 108 μm and a curvature radius of 4.3 m. The element yield was 99%, and the average lifetime of the elements was 1150 hours.

  The sixth embodiment is a nitride semiconductor laser device having a wafer substrate thickness of 105 μm and a curvature radius of 3.8 m. The device yield was 98.5% and the average life of the device was 1200 hours.

  The seventh embodiment is a nitride semiconductor laser device having a wafer substrate thickness of 94 μm and a curvature radius of 2.9 m. The device yield was 98% and the average life of the device was 1150 hours.

  The eighth embodiment is a nitride semiconductor laser device having a wafer substrate thickness of 83 μm and a curvature radius of 1.5 m. The element yield was 89% and the average life of the element was 1050 hours.

  The ninth embodiment is a nitride semiconductor laser device having a wafer substrate thickness of 75 μm and a curvature radius of 1.0 m. The device yield was 80% and the average life of the device was 800 hours.

  FIG. 5 shows the substrate thickness dependence of the radius of curvature of the nitride semiconductor laser wafer according to the embodiment of the present invention. The diamonds in FIG. 5 indicate the values of the LD wafer using chemical mechanical polishing, which is an embodiment of the present invention, and the white circles indicate the values according to the LD of the conventional manufacturing method that does not use chemical mechanical polishing. The radius of curvature of the LD tended to increase with the substrate thickness of the wafer.

  When chemical mechanical polishing was used, the polishing surfaces were all mirror surfaces, and almost no polishing scratches were seen even with an optical microscope. In the present invention, the mirror surface refers to a state in which chemical mechanical polishing is performed using an optical microscope until no polishing scratches are observed. When the surface is mirror-like, it almost coincides with a state in which no flaws are observed on the substrate surface with the naked eye when oblique light is applied to the surface. There may be a case where no scratches are observed with the naked eye in a state where the surface is irradiated with oblique light. However, in the conventional lapping-only polishing without using chemical mechanical polishing, polishing flaws are observed, the curvature radius of a wafer having a thickness of 150 μm or less is 0.5 μm or less, and warpage is large. On the other hand, the curvature radius of the LD wafer of the embodiment of the present invention is 1 m or more, and the warpage is clearly smaller than that of the LD of the conventional manufacturing method.

  In the LD of the conventional manufacturing method that does not use chemical mechanical polishing, the effective thickness of the polishing strain layer is as large as 5 μm to 20 μm. Therefore, when the wafer substrate thickness d is 70 μm ≦ d ≦ 145 μm, the curvature radius is 0.5 m or less, and the warp is warped. As a result, the wafer cracked significantly, and the yield decreased to 22% or less. On the other hand, in the wafer with a small warp of the present invention, a remarkably high element yield of 80% or more was obtained.

  FIG. 5 shows a calculated value of the curvature radius with respect to the LD wafer layer thickness when there is no polishing distortion, by a one-dot chain line 503. In the LD on the GaN substrate of this embodiment, there is an AlGaN layer having an Al composition of 0.07 having a total thickness of 1.8 μm, and this alternate long and short dash line 503 is an AlGaN lattice mismatching layer having a strain amount of 0.05% and a layer thickness of 1.8 μm. It represents the warp due to. When the wafer is thinned, the warpage increases due to the influence of the AlGaN layer. In order to obtain an LD with a small curvature with a curvature radius of 3 m or more, the substrate thickness of the wafer needs to be 70 μm or more. When the substrate thickness of the wafer exceeds 145 μm, the cleavage yield decreases. Therefore, in the present invention, the substrate thickness d of the wafer is limited to 70 μm ≦ d ≦ 145 μm.

  A solid line 504 in FIG. 5 is a calculated value of the radius of curvature with respect to the LD layer thickness when a polishing strain layer having a strain amount of 0.165% has a layer thickness of 2 μm. Similarly, the broken line 505 is a calculated value of the curvature radius with respect to the LD wafer layer thickness when the polishing strained layer has a layer thickness of 3 μm, and the dotted line 506 is the thickness of the LD wafer layer. The calculated strain value of the polishing strained layer almost coincided with the example was about 0.165%. The polishing strain layer thickness of the LD of an example with a small curvature with a curvature radius of 3 m or more is estimated to be 2 μm to 3 μm. In order to obtain an LD with a small warp, a polishing strain layer of about 2 μm exists even if the polishing surface is a mirror surface, and the layer thickness must be determined in consideration of this. Further, if the polishing strain layer of about 2 μm is removed by dry etching or wet etching, an LD having a smaller warpage can be obtained.

  FIG. 6 shows the dependency of the element yield of the nitride semiconductor laser according to the embodiment of the present invention on the substrate thickness of the LD wafer. The conventional LD has an element yield of 10% or less or 20% or less, whereas the present invention has realized an element yield of 80% or more or 98% or more.

  FIG. 7 shows the dependence of the device lifetime of the nitride semiconductor laser according to the embodiment of the present invention on the thickness of the LD wafer. A conventional LD has a device life of about 100 hours at 100 mW, but in the present invention, a device life of 1000 hours or more was obtained.

  6 and 7, it was found that the substrate thickness of the LD wafer is most preferably 100 μm to 115 μm in terms of device yield and lifetime. The nitride semiconductor laser of the present invention showed an improvement of about 10 times in device yield and reliability as compared with the prior art.

  FIG. 5 is a diagram showing the correlation between the thickness d in the direction perpendicular to the substrate surface and the curvature radius R of the warpage of the substrate surface. When the first range 507, that is, the substrate thickness d in the direction perpendicular to the substrate surface and the curvature radius R of the substrate surface warp are 70 μm ≦ d ≦ 145 μm and 0.5 m ≦ R ≦ 20 m, 80% or more of the elements A yield and an average life of 700 hours or more were obtained at 100 mW. In the case of the second range 508, that is, 80 μm ≦ d ≦ 135 μm and 1 m ≦ R ≦ 15 m, an element yield of 89% or more and an average life of 1000 hours or more at 100 mW were obtained. In the third range 509, ie, 90 μm ≦ d ≦ 125 μm and 2 m ≦ R ≦ 9 m, an element yield of 94% or more and an average life of 1100 hours or more at 100 mW were obtained. In the fourth range 510, that is, 100 μm ≦ d ≦ 115 μm and 3 m ≦ R ≦ 8 m, an element yield of 98% or more and an average life of 1150 hours or more at 100 mW were obtained.

  As described above, the chemical mechanical polishing of the present invention eliminates scratches caused by polishing and reduces the strain depth. As a result, the warpage of the wafer is reduced, and the generation of cracks and the cracking of the wafer can be prevented, so that the yield and reliability of the device are remarkably improved. By flattening the back surface of the device, mounting the device on the base (which may also serve as a heat sink) reduces the contact resistance between the metal electrode formed on the back surface of the device and the base, and reduces the operating voltage of the device. The voltage can be reduced by 1 V, and the conduction deterioration of the n electrode is eliminated.

FIG. 8 is a sectional view of a nitride semiconductor laser according to the tenth embodiment of the present invention. The nitride semiconductor laser of this example is formed on a sapphire substrate, and its structure is a polishing strain layer 800 of a sapphire substrate having a thickness of 2 μm, a sapphire substrate 801 having a thickness of 80 μm, and an n-GaN layer having a thickness of 5 μm. 812, 2 μm thick n-GaN layer 802, 1.2 μm thick n-Al _0.07 Ga _0.93 N cladding layer 803, In _0.2 Ga _0.8 N (2.5 nm) / GaN (10 nm) Active layer 804 of three quantum wells, p-Al _0.14 Ga _0.86 N current overflow prevention layer 805 of 8 nm thickness, p-GaN layer 806 of 100 nm thickness, ridge type p-Al of 0.6 μm thickness _{A 0.07} Ga _0.93 N clad layer 807, a p-GaN contact layer 808, a 300 nm thick SiO ₂ current confinement mask 809, a p electrode 810, and an n electrode 811. The ridge width is 2.3 μm. Mg (magnesium) is used for the p-type dopant, and Si (silicon) is used for the n-type dopant. The atomic concentration of Mg is 1 × 10 ²⁰ cm ^{−3 for} the p-GaN contact layer 210, 2 × 10 ¹⁹ cm ⁻³ otherwise, and the atomic concentration of Si is all 2 × 10 ¹⁸ cm ⁻³ . Crystal growth was performed by the MOVPE method as in the previous example.

Using dry etching, the n-GaN layer 802 having a thickness of 2 μm is removed for the n-electrode, the surface of the n-GaN layer 812 is exposed, and an n-electrode 811 is formed using a SiO ₂ mask 809 on the surface. . Similarly, a dry etching is used to form a ridge-type p-Al _0.07 Ga _0.93 N clad layer 807 having a thickness of 0.6 μm. As a mask for dry etching, a striped ridge structure can be formed using ZrO ₂ or the like in addition to SiO ₂ . Further, a p-electrode 810 was formed using a SiO ₂ mask 809. Next, the sapphire substrate 801 was ground and polished. The feature of this embodiment is that the thickness of the sapphire substrate 801 of the element is 80 μm, and the curvature radius of warpage of the original wafer is 1.5 m. The manufacturing method is characterized in that chemical mechanical polishing is used on the back surface of the sapphire substrate 801 after a polishing process using conventional diamond abrasive grains. Thereby, the curvature radius of curvature was as small as 1.5 m. The thickness of the polishing strain layer 800 at this time is considered to be within 2 μm even in the sapphire substrate.

The manufacturing process of the embodiment of the present invention will be described in detail. Although the thickness of the sapphire substrate (C surface) was 350 μm in the initial stage, the device wafer was reduced to 110 μm by grinding the back surface. Then, using a diamond slurry having a particle size of 6 μm and 2 μm in order, the slurry was polished to a thickness of 82 μm on a tin polishing board, and further polished to a thickness of 80 μm using chemical mechanical polishing. Grinding was performed at an average speed of 0.4 μm / sec at 1500 revolutions using a diamond grinder with a particle size of 60 μm. Chemical mechanical polishing was performed using colloidal silica having a particle size of 30 nm at a pressure of 700 g / cm ² at a speed of 50 revolutions / minute for 1 hour. The warpage of the obtained wafer was 1.5 m, and the warpage was reduced as compared with the conventional one. The wafer was diced with diamond to obtain a nitride semiconductor light emitting device having a width of 300 μm and a vertical width of 600 μm in the stripe direction. Controlling the reflectance with a multilayer film of TiO2 and SiO ₂ on the element end face was removed spontaneous emission light from the end face of the other. Since the end face of the active layer portion was not a complete cleavage plane, it did not oscillate, but strong blue spontaneous emission light of 5 mW was obtained. Since this element is capable of high-speed modulation operation at 10 GHz, it can be used for broadband wireless optical communication indoors. Or the Example of this invention can be utilized as a white light source with a low voltage and a long lifetime by combining with a fluorescent substance.

FIG. 9 shows a cross-sectional view of a nitride semiconductor laser according to an eleventh embodiment of the present invention. The nitride semiconductor laser of this example was formed on a zirconium boride (ZrB ₂ ) substrate tilted 4 degrees from the C-plane in the [11-20] direction, which is the cleavage direction. The eleventh embodiment of the present invention includes a ZrB ₂ substrate polishing strain layer 901, a ZrB ₂ substrate 902 having a thickness of 110 μm, an n-GaN layer 903 having a thickness of _0.1 μm, and an n-Al _0.1 Ga _0.9 N. 120 nm thick n-type superlattice layer 904 consisting of 20 cycles of (3 nm) / n-GaN (3 nm), 1.7 μm thick n-Al _0.1 Ga _0.9 N cladding layer 905, In _0.2 Ga _0.8 N (2.5 nm) / GaN (10 nm) three-layered quantum well active layer 906, 8 nm p-Al _0.14 Ga _0.86 N current overflow prevention layer 907, 100 nm Thick p-GaN layer 908, 0.6 μm thick ridge type p-Al _0.07 Ga _0.93 N cladding layer 909, p-GaN contact layer 910, 300 nm thick SiO ₂ current confinement mask 911, p electrode 912. The wafer of this example has a wafer thickness of 110 μm and a curvature radius of the wafer warp of 3.5 m.

Using a ZrB ₂ substrate tilted from 0 degrees to 10 degrees or less in the [11-20] direction, which is the cleavage direction from the C-plane, and using the MOVPE method for step flow growth, the GaN growth plane becomes a Ga plane in a wide range. In the case of 0 degree to 1 degree or less, the steepness of the quantum well interface can be obtained. When the temperature is set to 2 degrees to 10 degrees, for example, when magnesium (Mg) is diffused by hydrogen passivation, Mg easily enters the crystal site, and the p-type impurity is easily activated.

As in the previous examples, a ridge for an optical waveguide was formed on the obtained epi-wafer, a p-electrode was attached, and the back surface of the wafer was polished. Chemical mechanical polishing was performed as the backside polishing finish. Chemical mechanical polishing was performed for 1 hour using colloidal silica on a surf fin under the conditions of a pressure of 500 g / cm ² and a rotation speed of 30 rotations / minute. A laser resonator surface was formed by cleavage, and element separation was performed to obtain a laser element. Cleavage direction of the ZrB ₂ GaN epitaxial layer epitaxially grown on the substrate in order to match the cleavage direction [11-20] of ZrB ₂ substrate, a flat cavity surface is obtained. The dislocation density of the LD crystal grown on the ZrB ₂ substrate was 5 × 10 6 cm −2, and a device level quality was obtained.

ZrB ₂ (zirconium boride) single crystal is a floating zone melting method (FZ method, floating zone method) using a melt, and has a temperature of 3250 ° C., a thermal gradient of 150 ° C./mm, and a drawing speed of 20 mm / hour. It is nurtured on condition.

The ZrB ₂ substrate has excellent characteristics as a substrate for a nitride semiconductor light emitting device having a high light output. The ZrB ₂ substrate is hexagonal like GaN and has a feature of lattice matching with a lattice constant difference of 0.6% with respect to GaN and a feature of thermal expansion with a difference in thermal expansion coefficient of 5%. It is possible to grow GaN crystals with much better quality than the above GaN. The ZrB ₂ substrate has higher electrical conductivity than the metal Cu, and the ZrB ₂ / n-GaN interface is ohmic-bonded, so that the substrate can be used as an electrode as it is. Further, since the ZrB ₂ substrate has almost the same high thermal conductivity as that of the metal Mo, it is excellent in heat dissipation.

ZrB ₂ substrate is hard and brittle like GaN. Therefore, polishing distortion is likely to be deeply formed, and in conventional polishing, the wafer warp is large, cracking occurs when the wafer is removed from the polishing jig, and the yield is markedly reduced. By applying the chemical mechanical polishing of the present invention, even when the wafer thickness was 110 μm, the curvature radius of the warpage of the wafer was as small as 3.5 m, there was no wafer cracking, and good cleavage was achieved. As a result, a GaN-based semiconductor laser formed on the ZrB ₂ substrate could be obtained with a yield of 80% or more. The ZrB ₂ substrate used had a diameter of 2 cm, but in the future, a larger diameter is possible, and a low-cost element can be realized.

Claims (54)

  The thickness d of the substrate in the direction perpendicular to the substrate surface and the warpage of the substrate surface of the wafer for a nitride semiconductor light emitting device in which the wafer thickness is reduced by polishing the back surface of the substrate using at least chemical mechanical polishing. A wafer for a nitride semiconductor light emitting device, wherein the curvature radius R is 0.5 m or more and the thickness of the substrate is 145 μm or less.   The nitride semiconductor light emitting device wafer according to claim 1, wherein a back surface of the nitride semiconductor light emitting device wafer is a mirror surface.   The nitride semiconductor light emitting device wafer according to claim 1, wherein the nitride semiconductor wafer has a light emitting layer containing at least Ga and nitrogen on a GaN substrate.   2. The nitride semiconductor light emitting device wafer according to claim 1, wherein the nitride semiconductor wafer has a light emitting layer containing at least a GaN layer, Ga and nitrogen on a sapphire substrate. _2. The nitride semiconductor light emitting device according to claim 1, wherein the nitride semiconductor wafer has at least a GaN layer and a light emitting layer containing Ga and nitrogen on an Al ₂ O ₃ substrate. Wafer. The nitride semiconductor light emitting device wafer according to claim 1, wherein the nitride semiconductor wafer has a GaN layer and a light emitting layer containing Ga and nitrogen on a ZrB ₂ substrate. The nitride semiconductor light emitting device wafer according to claim 6, wherein the ZrB ₂ substrate has an inclination angle with respect to the C plane of greater than 0 degree and 10 degrees or less. The nitride semiconductor light emitting device wafer according to claim 6, wherein the ZrB ₂ substrate has an inclination angle with respect to the C plane of greater than 0 degree and less than or equal to 1 degree. The nitride semiconductor light emitting device wafer according to claim 6, wherein the ZrB ₂ substrate has an inclination angle with respect to the C plane of 2 degrees or more and 10 degrees or less. Sum of products x · d of Al composition x (0 <x ≦ 1) and layer thickness d (μm) of all Al _x Ga _1-x N layers formed on the nitride semiconductor light emitting device wafer 2. The nitride semiconductor light emitting device according to claim 1, wherein the degree of lattice mismatch dLM (μm) with respect to a GaN layer formed on a substrate defined as follows: 0.08 ≦ dLM ≦ 0.35 Wafers.   At least a nitride semiconductor light emitting device wafer whose thickness is reduced by polishing the back surface of the substrate using chemical mechanical polishing has a thickness of 5 μm or less of the polishing strain layer formed by chemical mechanical polishing of the back surface of the substrate. A wafer for a nitride semiconductor light emitting device characterized by the above.   The nitride semiconductor light emitting device wafer according to claim 11, wherein a back surface of the nitride semiconductor light emitting device wafer is a mirror surface.   The nitride semiconductor light emitting device wafer according to claim 11, wherein the nitride semiconductor wafer has a light emitting layer containing at least Ga and nitrogen on a GaN substrate.   The nitride semiconductor light emitting device wafer according to claim 11, wherein the nitride semiconductor wafer has a light emitting layer containing at least a GaN layer, Ga, and nitrogen on a sapphire substrate. The nitride semiconductor light emitting device according to claim 11, wherein the nitride semiconductor wafer has at least a GaN layer and a light emitting layer containing Ga and nitrogen on an Al ₂ O ₃ substrate. Wafer. The nitride semiconductor light emitting device wafer according to claim 11, wherein the nitride semiconductor wafer has at least a GaN layer and a light emitting layer containing Ga and nitrogen on a ZrB ₂ substrate. The nitride semiconductor light emitting device wafer according to claim 16, wherein the ZrB ₂ substrate has an inclination angle with respect to the C plane of greater than 0 degree and equal to or less than 10 degrees. The nitride semiconductor light emitting device wafer according to claim 16, wherein the ZrB ₂ substrate has an inclination angle with respect to a C plane of greater than 0 degree and less than or equal to 1 degree. The ZrB ₂ substrate, a nitride semiconductor light emitting device wafer according to claim 16, wherein the angle of inclination with respect to the C-plane is less than 10 degrees twice. Sum of products x · d of Al composition x (0 <x ≦ 1) and layer thickness d (μm) of all Al _x Ga _1-x N layers formed on the nitride semiconductor light emitting device wafer The nitride semiconductor light-emitting device according to claim 11, wherein the degree of lattice mismatch dLM (μm) for a GaN layer formed on a substrate defined as: 0.08 ≦ dLM ≦ 0.35 Device wafer. A mechanical polishing process for polishing the back surface of the substrate by a mechanical polishing method;
And then having a chemical mechanical polishing step for polishing using a chemical mechanical polishing method,
Nitride semiconductor, characterized in that the wafer thickness d in the direction perpendicular to the substrate surface and the curvature radius R of the curvature of the substrate surface are 0.5 m or more and the substrate thickness is 145 μm or less. Manufacturing method of wafer for light emitting element.   The nitride semiconductor light emitting device wafer according to claim 21, wherein the nitride semiconductor wafer has a light emitting layer containing at least Ga and nitrogen on a GaN substrate. Method of manufacturing a wafer for a nitride semiconductor light emitting device according to claim 21, wherein the polishing pressure to the substrate during the chemical mechanical polishing is ^{0.05kg / cm 2 ~5kg / cm 2} . In the chemical mechanical polishing, at least one abrasive selected from the group consisting of SiO ₂ , CeO ₂ , ZrO ₂ , Al ₂ O ₃ and Mn ₂ O ₃ having an average particle diameter of 5 nm to 100 nm, KOH, NH The nitride semiconductor according to claim 21, wherein a slurry containing at least one chemical solution selected from the group consisting of ₄ OH, NaOH, H ₂ O ₂ , Fe (NO) ₂ and KIO ₃ is used. Manufacturing method of wafer for light emitting element.   The method for manufacturing a wafer for a nitride semiconductor light emitting device according to claim 21, wherein the chemical mechanical polishing pad is any one of suede, non-woven fabric, artificial leather, and foam structure.   The method for manufacturing a wafer for a nitride semiconductor light emitting device according to claim 21, wherein a polishing rate during the chemical mechanical polishing is 1 nm / min to 100 nm / min.   The method for producing a nitride semiconductor light emitting device wafer according to claim 21, further comprising a polishing strain layer removing step of removing a polishing strain layer formed by the chemical mechanical polishing after the chemical mechanical polishing.   28. The method of manufacturing a wafer for a nitride semiconductor light emitting device according to claim 27, wherein the polishing strain layer removing step is wet etching, Ar ion milling, reactive ion etching, or dry etching.   28. The method of manufacturing a wafer for a nitride semiconductor light emitting device according to claim 27, wherein a polishing strain removal region of 1 [mu] m or more is removed from the polishing surface in the polishing strain removal step. A mechanical polishing process for polishing the back surface of the substrate by a mechanical polishing method;
And then having a chemical mechanical polishing step for polishing using a chemical mechanical polishing method,
A method of manufacturing a wafer for a nitride semiconductor light emitting device, wherein the thickness of a strained strain layer formed by chemical mechanical polishing on the back surface of the substrate is 5 μm or less.   The nitride semiconductor light emitting device wafer according to claim 30, wherein the nitride semiconductor wafer has a light emitting layer containing at least Ga and nitrogen on a GaN substrate. 30. The nitride semiconductor light emitting method of manufacturing a device for wafer, wherein the polishing pressure to the substrate during the chemical mechanical polishing is ^{0.05kg / cm 2 ~5kg / cm 2} . In the chemical mechanical polishing, at least one abrasive selected from the group consisting of SiO ₂ , CeO ₂ , ZrO ₂ , Al ₂ O ₃ and Mn ₂ O ₃ having an average particle diameter of 5 nm to 100 nm, KOH, NH 31. The nitride semiconductor light emitting device according to claim 30, wherein a slurry containing at least one chemical solution selected from the group consisting of ₄ OH, NaOH, H ₂ O ₂ , Fe (NO) ₂ and KIO ₃ is used. A method for manufacturing an element wafer.   31. The method of manufacturing a wafer for a nitride semiconductor light emitting device according to claim 30, wherein the chemical mechanical polishing polishing pad is one of suede, non-woven fabric, artificial leather, and foam structure.   31. The method for producing a nitride semiconductor light emitting device wafer according to claim 30, wherein a polishing rate during the chemical mechanical polishing is 1 nm / min to 100 nm / min.   31. The method for producing a nitride semiconductor light emitting device wafer according to claim 30, further comprising a polishing strain layer removing step of removing a polishing strain layer formed by the chemical mechanical polishing after the chemical mechanical polishing.   37. The method for producing a nitride semiconductor light emitting device wafer according to claim 36, wherein the polishing strain layer removing step is wet etching, Ar ion milling, reactive ion etching, or dry etching.   37. The method of manufacturing a wafer for a nitride semiconductor light emitting device according to claim 36, wherein a polishing strain removal region of 1 μm or more is removed from the polishing surface in the polishing strain removal step. A mechanical polishing process for polishing the back surface of the substrate by a mechanical polishing method;
And then having a chemical mechanical polishing step for polishing using a chemical mechanical polishing method,
A method for producing a wafer for a nitride semiconductor light emitting device, wherein the back surface of the substrate by chemical mechanical polishing is a mirror surface.   40. The nitride semiconductor light emitting device wafer according to claim 39, wherein the nitride semiconductor wafer has a light emitting layer containing at least Ga and nitrogen on a GaN substrate. 39. The nitride semiconductor light-emitting device manufacturing method of the wafer, wherein the polishing pressure to the substrate during the chemical mechanical polishing is ^{0.05kg / cm 2 ~5kg / cm 2} . In the chemical mechanical polishing, at least one abrasive selected from the group consisting of SiO ₂ , CeO ₂ , ZrO ₂ , Al ₂ O ₃ and Mn ₂ O ₃ having an average particle diameter of 5 nm to 100 nm, KOH, NH 40. The nitride semiconductor light emitting device according to claim 39, wherein a slurry containing at least one chemical liquid selected from the group consisting of ₄ OH, NaOH, H ₂ O ₂ , Fe (NO) ₂ and KIO ₃ is used. A method for manufacturing an element wafer.   40. The method for producing a wafer for a nitride semiconductor light emitting device according to claim 39, wherein the chemical mechanical polishing polishing pad is one of suede, non-woven fabric, artificial leather, and foam structure.   40. The method for producing a wafer for a nitride semiconductor light emitting device according to claim 39, wherein a polishing rate during the chemical mechanical polishing is 1 nm / min to 100 nm / min.   40. The method for producing a wafer for a nitride semiconductor light emitting device according to claim 39, further comprising a polishing strain layer removing step of removing a polishing strain layer formed by the chemical mechanical polishing after the chemical mechanical polishing.   44. The method for manufacturing a nitride semiconductor light emitting device wafer according to claim 43, wherein the polishing strain layer removing step is wet etching, Ar ion milling, reactive ion etching, or dry etching.   46. The method of manufacturing a wafer for a nitride semiconductor light emitting device according to claim 45, wherein a polishing strain removal region of 1 [mu] m or more is removed from the polishing surface in the polishing strain removal step. In the backside polishing process of the nitride semiconductor light emitting device wafer,
Forming a wax or adhesive layer on the polishing holder;
Placing the nitride semiconductor light emitting device wafer so that the surface of the wax or adhesive layer is in contact with the surface of the nitride semiconductor light emitting device wafer;
The wax or adhesive is sandwiched between the nitride semiconductor light emitting element wafer and the polishing holder, and the layer thickness t of the wax or adhesive layer at the center of the nitride semiconductor light emitting element wafer is 5 .mu.m.ltoreq.t.ltoreq.50 .mu.m, a method for producing a nitride semiconductor light emitting device wafer,   The wax or adhesive is formed adjacent to the outer periphery of the nitride semiconductor light emitting device wafer, and the width of the wax or adhesive formed adjacent to the outer periphery of the nitride semiconductor light emitting device wafer. The method for producing a nitride semiconductor light emitting device wafer according to claim 48, wherein W is 1 mm ≤ W ≤ 20 mm.   The curvature radius R1 of the warp of the nitride semiconductor light emitting device wafer before polishing the back surface and the curvature radius R2 of the warp of the wafer in the state where the polishing holder is attached with wax are R1 <R2. 49. A method for manufacturing a wafer for a nitride semiconductor light emitting device according to claim 48.   The wax or adhesive is resistant to an alkaline solution (PH8 to PH11), has a melting point tm of 70 ° C. ≦ tm ≦ 200 ° C., and is soluble in an organic solvent other than alcohol. The method for manufacturing a nitride semiconductor light emitting device wafer according to claim 48.   49. The nitriding according to claim 48, wherein a thermal expansion coefficient K1 of the material of the polishing holder is K1 <6 × K0 with respect to a thermal expansion coefficient K0 of the substrate of the nitride semiconductor light emitting device wafer. For manufacturing a semiconductor light emitting device wafer.   A nitride semiconductor light emitting device obtained from the wafer for nitride semiconductor light emitting device according to claim 1. A nitride semiconductor light-emitting device obtained from the nitride semiconductor light-emitting device wafer according to claim 11.

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