JPS6491273A - Memory access control system - Google Patents
Memory access control systemInfo
- Publication number
- JPS6491273A JPS6491273A JP24885687A JP24885687A JPS6491273A JP S6491273 A JPS6491273 A JP S6491273A JP 24885687 A JP24885687 A JP 24885687A JP 24885687 A JP24885687 A JP 24885687A JP S6491273 A JPS6491273 A JP S6491273A
- Authority
- JP
- Japan
- Prior art keywords
- processing unit
- data bus
- access
- vector
- memory access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Complex Calculations (AREA)
Abstract
PURPOSE:To minimize the deterioration of a throughput by providing the storage devices of more than one, and the first and second access request device groups of more than one, and dividing data buses into the number of the kinds of the memory access requesting device groups with respect to the access requests of respective groups. CONSTITUTION:The storage controllers 1 divide the data buses of inter-main storage device into two kinds of the memory access requesting device, a central processing unit 3, for example, and a vector processing unit 2, and classifies into a read data bus (dot lines) and a write data bus, where the access pipe lines of the central processing unit and the vector processing unit 2 can be used, and a read data bus and a write data bus (solid lines), where only the access pipe line of the vector processing unit can be used. Thus, either of two access pipe lines in the vector processing unit 2 is operated since the appearance frequency of a vector compression/enlargement conversion instruction is less compared to a general vector load/store instruction at the time of executing said instruction, for example.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24885687A JPH0690711B2 (en) | 1987-10-01 | 1987-10-01 | Memory access control method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24885687A JPH0690711B2 (en) | 1987-10-01 | 1987-10-01 | Memory access control method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6491273A true JPS6491273A (en) | 1989-04-10 |
JPH0690711B2 JPH0690711B2 (en) | 1994-11-14 |
Family
ID=17184441
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP24885687A Expired - Lifetime JPH0690711B2 (en) | 1987-10-01 | 1987-10-01 | Memory access control method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0690711B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8483873B2 (en) | 2010-07-20 | 2013-07-09 | Innvo Labs Limited | Autonomous robotic life form |
-
1987
- 1987-10-01 JP JP24885687A patent/JPH0690711B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8483873B2 (en) | 2010-07-20 | 2013-07-09 | Innvo Labs Limited | Autonomous robotic life form |
Also Published As
Publication number | Publication date |
---|---|
JPH0690711B2 (en) | 1994-11-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |