JPS6489758A - Facsimile signal sending control circuit - Google Patents
Facsimile signal sending control circuitInfo
- Publication number
- JPS6489758A JPS6489758A JP62244396A JP24439687A JPS6489758A JP S6489758 A JPS6489758 A JP S6489758A JP 62244396 A JP62244396 A JP 62244396A JP 24439687 A JP24439687 A JP 24439687A JP S6489758 A JPS6489758 A JP S6489758A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- data
- sending
- facsimile
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Facsimiles In General (AREA)
- Facsimile Transmission Control (AREA)
Abstract
PURPOSE:To match the sending speed of a facsimile signal with the recording speed of a facsimile picture receiving device and to execute high-speed sending and efficient transmission by counting the number of scanning lines multiplexed in a packet and controlling the sending interval of the packet based on this. CONSTITUTION:Picture transmitting data B, a data gate signal D from a data gate 21, and a strobe signal C for a sample are supplied to an inter-scanning line detecting circuit 22, and a scanning line identifying signal 2 is fetched in the timing of the strobe signal C. The picture transmitting data for 1 packet are stored in a data buffer 27 in the timing of the strobe signal C in a clock signal G, and the stored data are read in the timing of a clock from a clock generating circuit 29 in the clock signal G and supplied to a data converting circuit 30. When a page completing detecting circuit 32 detects the prescribed number of scanning line identifying signal pulses E, it generates a page completing signal Q. By supplying this page completing signal Q to a facsimile picture transmitting device 11, the sending of the facsimile picture signal for a next page is permitted.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62244396A JP2573253B2 (en) | 1987-09-30 | 1987-09-30 | Facsimile signal transmission control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62244396A JP2573253B2 (en) | 1987-09-30 | 1987-09-30 | Facsimile signal transmission control circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6489758A true JPS6489758A (en) | 1989-04-04 |
JP2573253B2 JP2573253B2 (en) | 1997-01-22 |
Family
ID=17118050
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62244396A Expired - Lifetime JP2573253B2 (en) | 1987-09-30 | 1987-09-30 | Facsimile signal transmission control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2573253B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0455838U (en) * | 1990-09-17 | 1992-05-13 |
-
1987
- 1987-09-30 JP JP62244396A patent/JP2573253B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0455838U (en) * | 1990-09-17 | 1992-05-13 |
Also Published As
Publication number | Publication date |
---|---|
JP2573253B2 (en) | 1997-01-22 |
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