JPS6489464A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS6489464A
JPS6489464A JP24406287A JP24406287A JPS6489464A JP S6489464 A JPS6489464 A JP S6489464A JP 24406287 A JP24406287 A JP 24406287A JP 24406287 A JP24406287 A JP 24406287A JP S6489464 A JPS6489464 A JP S6489464A
Authority
JP
Japan
Prior art keywords
film
drain
gate
decrease
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24406287A
Other languages
Japanese (ja)
Inventor
Naoyuki Shigyo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP24406287A priority Critical patent/JPS6489464A/en
Publication of JPS6489464A publication Critical patent/JPS6489464A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78612Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device for preventing the kink- or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile

Abstract

PURPOSE:To decrease an electric field in the vicinity of a drain, to decrease impact ionization, to prevent kink in a thin film SOIMOSFET, and to make it possible to suppress the decrease in breakdown strength, by offsetting a gate electrode and source and drain regions. CONSTITUTION:A CVD oxide film 2 and a polycrystalline silicon film 3 are sequentially deposited on a single crystal silicon substrate 1. The polycrystalline silicon film 3 is made to be a single crystal film by laser beam annealing technology and the like. Then, B ions are implanted, and the film is made to be a p-type SOI layer. Thermal oxidation is further performed. A gate oxide film 4 is formed. Then, a polycrystalline film 5 is deposited. A gate is formed by patterning. Then, a CVD oxide film 7 is deposited. Etching is performed by RIE. The CVD film is made to remain on the side wall of the gate. Thereafter, As ions are implanted, and source and drain regions 6 are formed. The gate electrode 5 and the drain layer 6 are offset. Thus an electric field in the vicinity of the drain can be decreased. As a result, impact ionization is weakened, and the generation of kink of current and voltage characteristics can be suppressed.
JP24406287A 1987-09-30 1987-09-30 Semiconductor device and manufacture thereof Pending JPS6489464A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24406287A JPS6489464A (en) 1987-09-30 1987-09-30 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24406287A JPS6489464A (en) 1987-09-30 1987-09-30 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS6489464A true JPS6489464A (en) 1989-04-03

Family

ID=17113166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24406287A Pending JPS6489464A (en) 1987-09-30 1987-09-30 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS6489464A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5208476A (en) * 1990-06-08 1993-05-04 Seiko Epson Corporation Low leakage current offset-gate thin film transistor structure
JPH05232515A (en) * 1991-09-25 1993-09-10 Semiconductor Energy Lab Co Ltd Semiconductor integrated circuit and its production
WO1997006564A1 (en) * 1995-08-07 1997-02-20 Hitachi, Ltd. Semiconductor device and method for manufacturing the same
US5821584A (en) * 1995-12-06 1998-10-13 Micron Technology, Inc. Thin film transistors comprising drain offset regions
KR100224664B1 (en) * 1996-11-20 1999-10-15 윤종용 Soi transistor and the manufacturing method thereof
US6013928A (en) * 1991-08-23 2000-01-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having interlayer insulating film and method for forming the same
US6476447B1 (en) 1992-02-05 2002-11-05 Semiconductor Energy Laboratory Co., Ltd. Active matrix display device including a transistor
US6979840B1 (en) 1991-09-25 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having anodized metal film between the gate wiring and drain wiring
KR100566311B1 (en) * 1999-07-30 2006-03-30 주식회사 하이닉스반도체 Method for forming semiconductor device having CMOS transistor and method of it

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5208476A (en) * 1990-06-08 1993-05-04 Seiko Epson Corporation Low leakage current offset-gate thin film transistor structure
US5482870A (en) * 1990-06-08 1996-01-09 Seiko Epson Corporation Methods for manufacturing low leakage current offset-gate thin film transistor
US6013928A (en) * 1991-08-23 2000-01-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having interlayer insulating film and method for forming the same
JPH05232515A (en) * 1991-09-25 1993-09-10 Semiconductor Energy Lab Co Ltd Semiconductor integrated circuit and its production
US6979840B1 (en) 1991-09-25 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having anodized metal film between the gate wiring and drain wiring
US6476447B1 (en) 1992-02-05 2002-11-05 Semiconductor Energy Laboratory Co., Ltd. Active matrix display device including a transistor
WO1997006564A1 (en) * 1995-08-07 1997-02-20 Hitachi, Ltd. Semiconductor device and method for manufacturing the same
US5821584A (en) * 1995-12-06 1998-10-13 Micron Technology, Inc. Thin film transistors comprising drain offset regions
US6013543A (en) * 1995-12-06 2000-01-11 Micron Technology, Inc. Methods of forming thin film transistors
KR100224664B1 (en) * 1996-11-20 1999-10-15 윤종용 Soi transistor and the manufacturing method thereof
KR100566311B1 (en) * 1999-07-30 2006-03-30 주식회사 하이닉스반도체 Method for forming semiconductor device having CMOS transistor and method of it

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