JPS6488615A - Stand-by control circuit for microcomputer - Google Patents

Stand-by control circuit for microcomputer

Info

Publication number
JPS6488615A
JPS6488615A JP62245662A JP24566287A JPS6488615A JP S6488615 A JPS6488615 A JP S6488615A JP 62245662 A JP62245662 A JP 62245662A JP 24566287 A JP24566287 A JP 24566287A JP S6488615 A JPS6488615 A JP S6488615A
Authority
JP
Japan
Prior art keywords
stand
signal
control
comparator
received
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62245662A
Other languages
Japanese (ja)
Inventor
Shigeki Hosogoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62245662A priority Critical patent/JPS6488615A/en
Publication of JPS6488615A publication Critical patent/JPS6488615A/en
Pending legal-status Critical Current

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  • Microcomputers (AREA)

Abstract

PURPOSE:To control the stand-by states of plural slave CPUs independently of each other through a single control line by providing a function to release a stand-by state in case a received signal and a prescribed signal coincide with each other. CONSTITUTION:A serial signal 1 is received by a serial signal reception register 2, and inputted to the comparison input of a comparator 3. A register 4 for comparison receives a preliminarily set signal to be compared with the serial signal from an internal bus 5, and inputs this signal to the other comparison input of the comparator 3. The comparator 3 compares the received serial signal and this output signal of the register 4 with each other, and only in case the two signals coincide with each other, resets a stand-by control flip-flop to release the stand-by state. As a result, a master CPU can control the stand-by states of plural slave CPUs through only one control terminal and control line.
JP62245662A 1987-09-29 1987-09-29 Stand-by control circuit for microcomputer Pending JPS6488615A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62245662A JPS6488615A (en) 1987-09-29 1987-09-29 Stand-by control circuit for microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62245662A JPS6488615A (en) 1987-09-29 1987-09-29 Stand-by control circuit for microcomputer

Publications (1)

Publication Number Publication Date
JPS6488615A true JPS6488615A (en) 1989-04-03

Family

ID=17136954

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62245662A Pending JPS6488615A (en) 1987-09-29 1987-09-29 Stand-by control circuit for microcomputer

Country Status (1)

Country Link
JP (1) JPS6488615A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6986070B2 (en) 2000-12-28 2006-01-10 Denso Corporation Microcomputer that cooperates with an external apparatus to be driven by a drive signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6986070B2 (en) 2000-12-28 2006-01-10 Denso Corporation Microcomputer that cooperates with an external apparatus to be driven by a drive signal

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